Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	6443	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	6619	1			T1	7		T2	24		T13	19
len_5001_7500	11626	1			T1	14		T2	24		T13	18
len_2501_5000	7076	1			T1	3		T2	24		T13	18
len_1025_2500	4198	1			T1	2		T2	14		T13	11
len_769_1024	6276	1			T2	2		T3	24		T13	2
len_513_768	6630	1			T1	1		T2	3		T3	25
len_257_512	13745	1			T2	2		T3	23		T13	2
len_0_256	146731	1			T1	4		T2	211		T3	34
len_keccak_block_sizes[72]	549	1			T2	2		T13	2		T14	2
len_keccak_block_sizes[104]	448	1			T2	2		T13	2		T15	1
len_keccak_block_sizes[136]	355	1			T13	2		T18	2		T47	2
len_keccak_block_sizes[144]	253	1			T47	2		T204	1		T32	1
len_keccak_block_sizes[168]	154	1			T205	3		T206	3		T207	3
len_1	583	1			T2	2		T13	2		T14	2
len_0	986	1			T1	2		T2	2		T13	2