Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	644	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5476	1			T1	7		T3	12		T15	23
len_601_800	12017	1			T1	12		T3	34		T15	41
len_401_600	8023	1			T1	5		T3	16		T15	27
len_201_400	8269	1			T1	5		T3	9		T15	19
len_65_200	35578	1			T1	2		T3	5		T15	9
len_min_for_xof_require_squeeze	466	1			T51	1		T205	9		T209	2
len_keccak_block_sizes[72]	387	1			T139	1		T140	3		T205	9
len_keccak_block_sizes[104]	370	1			T205	9		T209	1		T210	2
len_keccak_block_sizes[136]	371	1			T55	1		T139	1		T82	1
len_keccak_block_sizes[144]	122	1			T16	1		T204	1		T206	5
len_keccak_block_sizes[168]	127	1			T51	1		T206	5		T211	1
len_datapath_width	13695	1			T14	246		T23	1		T44	246
len_2_63	131767	1			T2	310		T3	5		T13	374
len_1	54	1			T139	2		T29	1		T211	1