Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	6085	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	6738	1			T14	17		T16	17		T80	19
len_5001_7500	11856	1			T14	17		T16	59		T80	18
len_2501_5000	7141	1			T14	17		T16	8		T80	18
len_1025_2500	4182	1			T14	10		T16	4		T80	11
len_769_1024	6165	1			T2	26		T12	8		T13	26
len_513_768	6385	1			T2	24		T12	20		T13	39
len_257_512	12364	1			T2	31		T12	19		T13	41
len_0_256	139693	1			T2	42		T3	9		T12	20
len_keccak_block_sizes[72]	532	1			T14	2		T80	2		T82	3
len_keccak_block_sizes[104]	437	1			T14	2		T80	2		T82	3
len_keccak_block_sizes[136]	342	1			T14	2		T80	2		T82	3
len_keccak_block_sizes[144]	236	1			T14	2		T82	3		T84	2
len_keccak_block_sizes[168]	144	1			T17	2		T82	3		T27	1
len_1	583	1			T14	2		T80	2		T81	1
len_0	947	1			T14	2		T16	4		T80	2