Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	655	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5503	1			T2	21		T12	8		T13	18
len_601_800	12233	1			T2	39		T12	24		T13	57
len_401_600	8024	1			T2	28		T12	18		T13	41
len_201_400	8875	1			T2	15		T12	11		T13	14
len_65_200	32600	1			T2	11		T12	3		T13	7
len_min_for_xof_require_squeeze	442	1			T12	1		T13	1		T16	1
len_keccak_block_sizes[72]	335	1			T2	1		T82	9		T83	1
len_keccak_block_sizes[104]	335	1			T82	9		T83	2		T100	1
len_keccak_block_sizes[136]	345	1			T82	9		T83	1		T25	3
len_keccak_block_sizes[144]	126	1			T177	5		T124	5		T178	1
len_keccak_block_sizes[168]	128	1			T2	1		T28	1		T179	1
len_datapath_width	13697	1			T2	1		T3	3		T16	1
len_2_63	124918	1			T2	70		T3	6		T12	18
len_1	53	1			T83	1		T25	1		T24	1