Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	5389	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	6168	1			T2	19		T3	16		T4	24
len_5001_7500	10925	1			T2	18		T3	38		T4	63
len_2501_5000	6767	1			T2	18		T3	9		T4	15
len_1025_2500	3980	1			T2	11		T3	10		T4	10
len_769_1024	6190	1			T2	2		T3	50		T4	22
len_513_768	6671	1			T2	2		T3	46		T4	21
len_257_512	10350	1			T2	2		T3	38		T4	16
len_0_256	122848	1			T2	274		T3	189		T4	123
len_keccak_block_sizes[72]	509	1			T2	2		T15	2		T182	2
len_keccak_block_sizes[104]	411	1			T2	2		T182	2		T24	1
len_keccak_block_sizes[136]	313	1			T2	2		T14	1		T27	1
len_keccak_block_sizes[144]	220	1			T18	1		T27	1		T182	2
len_keccak_block_sizes[168]	119	1			T100	1		T183	3		T184	3
len_1	554	1			T2	2		T4	1		T13	1
len_0	930	1			T2	2		T3	6		T4	4