Summary for Variable entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
202276 |
1 |
|
|
T1 |
72 |
|
T2 |
18 |
|
T3 |
18 |
auto[1] |
193434 |
1 |
|
|
T14 |
160 |
|
T15 |
98 |
|
T25 |
314 |
Summary for Variable prescaler_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for prescaler_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
99011 |
1 |
|
|
T1 |
18 |
|
T2 |
6 |
|
T3 |
6 |
lower_val |
97819 |
1 |
|
|
T1 |
21 |
|
T3 |
4 |
|
T13 |
38 |
zero_val |
1435 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable wait_timer_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for wait_timer_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
198100 |
1 |
|
|
T1 |
44 |
|
T2 |
10 |
|
T3 |
8 |
lower_val |
197608 |
1 |
|
|
T1 |
28 |
|
T2 |
8 |
|
T3 |
10 |
zero_val |
2 |
1 |
|
|
T142 |
2 |
|
- |
- |
|
- |
- |
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
18 |
5 |
13 |
72.22 |
5 |
Automatically Generated Cross Bins for entropy_timer_cross
Element holes
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | NUMBER | STATUS |
[higher_val] |
[zero_val] |
* |
-- |
-- |
2 |
|
[zero_val] |
[zero_val] |
* |
-- |
-- |
2 |
|
Uncovered bins
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | NUMBER | STATUS |
[lower_val] |
[zero_val] |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
higher_val |
auto[0] |
25198 |
1 |
|
|
T1 |
12 |
|
T2 |
3 |
|
T3 |
3 |
higher_val |
higher_val |
auto[1] |
24481 |
1 |
|
|
T14 |
26 |
|
T15 |
12 |
|
T25 |
57 |
higher_val |
lower_val |
auto[0] |
25231 |
1 |
|
|
T1 |
6 |
|
T2 |
3 |
|
T3 |
3 |
higher_val |
lower_val |
auto[1] |
24101 |
1 |
|
|
T14 |
12 |
|
T15 |
12 |
|
T25 |
49 |
lower_val |
higher_val |
auto[0] |
24875 |
1 |
|
|
T1 |
12 |
|
T3 |
1 |
|
T13 |
16 |
lower_val |
higher_val |
auto[1] |
24110 |
1 |
|
|
T14 |
25 |
|
T15 |
13 |
|
T25 |
37 |
lower_val |
lower_val |
auto[0] |
24727 |
1 |
|
|
T1 |
9 |
|
T3 |
3 |
|
T13 |
22 |
lower_val |
lower_val |
auto[1] |
24106 |
1 |
|
|
T14 |
23 |
|
T15 |
17 |
|
T25 |
47 |
lower_val |
zero_val |
auto[0] |
1 |
1 |
|
|
T142 |
1 |
|
- |
- |
|
- |
- |
zero_val |
higher_val |
auto[0] |
589 |
1 |
|
|
T2 |
1 |
|
T13 |
1 |
|
T14 |
1 |
zero_val |
higher_val |
auto[1] |
135 |
1 |
|
|
T22 |
1 |
|
T23 |
5 |
|
T42 |
1 |
zero_val |
lower_val |
auto[0] |
556 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T16 |
1 |
zero_val |
lower_val |
auto[1] |
155 |
1 |
|
|
T39 |
2 |
|
T23 |
4 |
|
T24 |
2 |