Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	5726	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	6685	1			T17	19		T68	24		T69	24
len_5001_7500	11863	1			T17	18		T68	24		T69	24
len_2501_5000	7046	1			T17	18		T68	24		T69	24
len_1025_2500	4201	1			T17	11		T68	14		T69	14
len_769_1024	5864	1			T1	8		T13	9		T15	12
len_513_768	6312	1			T1	7		T13	20		T15	12
len_257_512	10766	1			T1	4		T13	13		T15	12
len_0_256	132562	1			T1	13		T2	9		T3	9
len_keccak_block_sizes[72]	522	1			T17	2		T68	2		T69	2
len_keccak_block_sizes[104]	425	1			T17	2		T68	2		T69	2
len_keccak_block_sizes[136]	327	1			T17	2		T38	1		T24	1
len_keccak_block_sizes[144]	229	1			T25	1		T163	3		T164	2
len_keccak_block_sizes[168]	140	1			T26	1		T23	2		T24	1
len_1	558	1			T17	2		T68	2		T69	2
len_0	956	1			T17	2		T68	2		T69	2