Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	621	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5393	1			T1	6		T13	11		T15	5
len_601_800	12031	1			T1	11		T13	26		T15	8
len_401_600	8102	1			T1	3		T13	10		T15	15
len_201_400	9241	1			T1	4		T13	6		T15	5
len_65_200	29989	1			T13	1		T15	1		T25	6
len_min_for_xof_require_squeeze	392	1			T163	9		T54	1		T165	1
len_keccak_block_sizes[72]	298	1			T22	1		T85	2		T123	1
len_keccak_block_sizes[104]	288	1			T22	1		T163	9		T166	1
len_keccak_block_sizes[136]	282	1			T85	1		T23	1		T163	9
len_keccak_block_sizes[144]	145	1			T54	1		T167	1		T168	5
len_keccak_block_sizes[168]	134	1			T168	5		T169	1		T170	5
len_datapath_width	13587	1			T2	3		T3	3		T16	3
len_2_63	117659	1			T1	2		T2	6		T3	6
len_1	46	1			T83	1		T46	1		T171	2