Summary for Variable entropy_edn_mode_enabled
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 2 | 0 | 2 | 100.00 | 
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 285034 | 1 |  |  | T1 | 4674 |  | T2 | 116 |  | T3 | 2 | 
| auto[1] | 338748 | 1 |  |  | T3 | 214 |  | T13 | 260 |  | T15 | 16 | 
Summary for Variable prescaler_val
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 3 | 0 | 3 | 100.00 | 
User Defined Bins for prescaler_val
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 156947 | 1 |  |  | T1 | 1160 |  | T2 | 34 |  | T3 | 62 | 
| lower_val | 154007 | 1 |  |  | T1 | 1160 |  | T2 | 30 |  | T3 | 43 | 
| zero_val | 1636 | 1 |  |  | T1 | 17 |  | T2 | 1 |  | T3 | 1 | 
Summary for Variable wait_timer_val
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 3 | 0 | 3 | 100.00 | 
User Defined Bins for wait_timer_val
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 311498 | 1 |  |  | T1 | 2228 |  | T2 | 68 |  | T3 | 110 | 
| lower_val | 312280 | 1 |  |  | T1 | 2446 |  | T2 | 48 |  | T3 | 106 | 
| zero_val | 4 | 1 |  |  | T172 | 2 |  | T173 | 2 |  | - | - | 
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 18 | 2 | 16 | 88.89 | 2 | 
Automatically Generated Cross Bins for entropy_timer_cross
Element holes
| prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | NUMBER | STATUS | 
| [zero_val] | [zero_val] | * | -- | -- | 2 |  | 
Covered bins
| prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | higher_val | auto[0] | 35851 | 1 |  |  | T1 | 583 |  | T2 | 24 |  | T14 | 4 | 
| higher_val | higher_val | auto[1] | 42802 | 1 |  |  | T3 | 30 |  | T13 | 33 |  | T15 | 2 | 
| higher_val | lower_val | auto[0] | 35855 | 1 |  |  | T1 | 577 |  | T2 | 10 |  | T3 | 1 | 
| higher_val | lower_val | auto[1] | 42437 | 1 |  |  | T3 | 31 |  | T13 | 29 |  | T15 | 4 | 
| higher_val | zero_val | auto[0] | 1 | 1 |  |  | T172 | 1 |  | - | - |  | - | - | 
| higher_val | zero_val | auto[1] | 1 | 1 |  |  | T173 | 1 |  | - | - |  | - | - | 
| lower_val | higher_val | auto[0] | 34942 | 1 |  |  | T1 | 520 |  | T2 | 14 |  | T14 | 2 | 
| lower_val | higher_val | auto[1] | 41605 | 1 |  |  | T3 | 26 |  | T13 | 37 |  | T16 | 62 | 
| lower_val | lower_val | auto[0] | 35417 | 1 |  |  | T1 | 640 |  | T2 | 16 |  | T14 | 2 | 
| lower_val | lower_val | auto[1] | 42041 | 1 |  |  | T3 | 17 |  | T13 | 29 |  | T15 | 3 | 
| lower_val | zero_val | auto[0] | 1 | 1 |  |  | T172 | 1 |  | - | - |  | - | - | 
| lower_val | zero_val | auto[1] | 1 | 1 |  |  | T173 | 1 |  | - | - |  | - | - | 
| zero_val | higher_val | auto[0] | 603 | 1 |  |  | T1 | 6 |  | T2 | 1 |  | T13 | 1 | 
| zero_val | higher_val | auto[1] | 206 | 1 |  |  | T13 | 1 |  | T17 | 1 |  | T174 | 3 | 
| zero_val | lower_val | auto[0] | 620 | 1 |  |  | T1 | 11 |  | T3 | 1 |  | T17 | 1 | 
| zero_val | lower_val | auto[1] | 207 | 1 |  |  | T13 | 1 |  | T17 | 3 |  | T174 | 3 |