Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	9176	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8303	1			T1	30		T3	24		T17	8
len_5001_7500	13185	1			T1	30		T3	57		T16	33
len_2501_5000	8726	1			T1	30		T3	9		T16	34
len_1025_2500	5086	1			T1	16		T3	6		T16	20
len_769_1024	6130	1			T1	4		T2	11		T3	2
len_513_768	6560	1			T1	2		T2	15		T3	1
len_257_512	17670	1			T1	244		T2	15		T3	3
len_0_256	230351	1			T1	1897		T2	9		T3	6
len_keccak_block_sizes[72]	683	1			T1	3		T13	1		T16	2
len_keccak_block_sizes[104]	577	1			T1	3		T19	2		T40	2
len_keccak_block_sizes[136]	473	1			T1	3		T19	2		T100	2
len_keccak_block_sizes[144]	376	1			T1	3		T19	2		T54	1
len_keccak_block_sizes[168]	278	1			T1	3		T194	3		T174	3
len_1	710	1			T1	3		T16	2		T19	2
len_0	1128	1			T1	3		T3	1		T16	2