Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg
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Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 14 0 14 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
output_digest_len 14 0 14 100.00 100 1 1 0


Summary for Variable output_digest_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 14 0 14 100.00


User Defined Bins for output_digest_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 602 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_801_1000 5250 1 T2 6 T3 30 T13 20
len_601_800 11759 1 T2 21 T3 39 T13 34
len_401_600 7931 1 T2 13 T3 12 T13 24
len_201_400 16269 1 T2 6 T3 10 T13 9
len_65_200 63889 1 T1 685 T2 2 T3 12
len_min_for_xof_require_squeeze 878 1 T1 9 T18 1 T194 9
len_keccak_block_sizes[72] 622 1 T1 9 T194 9 T174 9
len_keccak_block_sizes[104] 624 1 T1 9 T194 9 T174 9
len_keccak_block_sizes[136] 618 1 T1 9 T194 9 T174 9
len_keccak_block_sizes[144] 283 1 T72 5 T74 5 T195 5
len_keccak_block_sizes[168] 288 1 T72 5 T74 5 T44 1
len_datapath_width 13864 1 T1 9 T3 1 T14 3
len_2_63 191140 1 T1 1643 T2 5 T3 3
len_1 55 1 T43 1 T23 1 T196 3

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