Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 330 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 2770 1 T17 20 T19 37 T22 10
len_5001_7500 6820 1 T2 33 T17 77 T19 71
len_2501_5000 1611 1 T2 34 T17 14 T19 19
len_1025_2500 931 1 T2 20 T17 7 T19 17
len_769_1024 5249 1 T1 24 T2 4 T3 22
len_513_768 5802 1 T1 21 T2 3 T3 29
len_257_512 5804 1 T1 27 T2 4 T3 20
len_0_256 17714 1 T1 22 T2 2 T3 30
len_keccak_block_sizes[72] 42 1 T18 1 T35 1 T163 1
len_keccak_block_sizes[104] 38 1 T3 1 T22 1 T75 1
len_keccak_block_sizes[136] 26 1 T129 1 T27 1 T164 1
len_keccak_block_sizes[144] 25 1 T1 1 T25 1 T165 1
len_keccak_block_sizes[168] 20 1 T74 1 T166 1 T167 1
len_1 54 1 T99 1 T163 1 T75 1
len_0 433 1 T1 1 T16 2 T17 6

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%