Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	646	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5409	1			T1	20		T3	16		T13	7
len_601_800	12314	1			T1	34		T3	20		T13	18
len_401_600	8070	1			T1	18		T3	17		T13	12
len_201_400	4143	1			T1	14		T3	13		T13	7
len_65_200	6831	1			T1	6		T3	2		T13	3
len_min_for_xof_require_squeeze	78	1			T17	1		T61	1		T22	1
len_keccak_block_sizes[72]	72	1			T16	1		T61	1		T22	1
len_keccak_block_sizes[104]	72	1			T16	1		T61	1		T22	1
len_keccak_block_sizes[136]	75	1			T99	1		T75	1		T134	1
len_keccak_block_sizes[144]	38	1			T16	3		T169	1		T24	1
len_keccak_block_sizes[168]	33	1			T76	1		T74	1		T170	1
len_datapath_width	972	1			T2	100		T13	1		T14	3
len_2_63	15086	1			T1	35		T3	11		T13	25
len_1	48	1			T99	1		T77	1		T80	1