Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	396	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2585	1			T2	15		T12	29		T16	25
len_5001_7500	6209	1			T2	40		T12	66		T15	33
len_2501_5000	1523	1			T2	10		T12	13		T15	34
len_1025_2500	908	1			T2	4		T12	9		T15	20
len_769_1024	5295	1			T1	11		T12	32		T13	34
len_513_768	5880	1			T1	15		T12	37		T13	20
len_257_512	5911	1			T1	18		T2	1		T12	27
len_0_256	19693	1			T1	60		T2	14		T3	175
len_keccak_block_sizes[72]	31	1			T82	1		T27	2		T108	1
len_keccak_block_sizes[104]	22	1			T82	1		T106	1		T22	1
len_keccak_block_sizes[136]	28	1			T105	2		T106	1		T157	1
len_keccak_block_sizes[144]	20	1			T75	1		T177	1		T24	1
len_keccak_block_sizes[168]	21	1			T106	1		T24	1		T25	1
len_1	61	1			T3	1		T67	2		T82	1
len_0	463	1			T1	1		T2	1		T3	2