Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	660	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5396	1			T1	6		T2	13		T12	37
len_601_800	11790	1			T1	18		T2	26		T12	107
len_401_600	7987	1			T1	13		T2	26		T12	69
len_201_400	4297	1			T1	11		T2	11		T12	23
len_65_200	8053	1			T1	27		T2	3		T3	99
len_min_for_xof_require_squeeze	82	1			T16	1		T37	1		T66	1
len_keccak_block_sizes[72]	86	1			T1	1		T3	2		T12	1
len_keccak_block_sizes[104]	81	1			T12	1		T67	2		T72	1
len_keccak_block_sizes[136]	71	1			T3	1		T12	1		T67	1
len_keccak_block_sizes[144]	34	1			T3	2		T12	1		T66	1
len_keccak_block_sizes[168]	44	1			T1	2		T37	1		T66	1
len_datapath_width	1045	1			T1	7		T2	1		T3	3
len_2_63	14917	1			T1	49		T2	4		T3	70
len_1	66	1			T1	1		T3	3		T83	1