Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	173	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2194	1			T3	22		T17	10		T135	4
len_5001_7500	5639	1			T3	81		T17	39		T135	10
len_2501_5000	1367	1			T3	16		T17	8		T135	3
len_1025_2500	780	1			T3	10		T17	11		T135	1
len_769_1024	5266	1			T2	25		T3	3		T9	3
len_513_768	5741	1			T2	23		T3	1		T9	5
len_257_512	5741	1			T2	32		T3	1		T9	3
len_0_256	19232	1			T2	26		T3	18		T9	5
len_keccak_block_sizes[72]	40	1			T15	1		T163	1		T75	1
len_keccak_block_sizes[104]	31	1			T30	1		T163	1		T70	1
len_keccak_block_sizes[136]	31	1			T2	1		T40	1		T163	1
len_keccak_block_sizes[144]	39	1			T163	1		T176	1		T177	1
len_keccak_block_sizes[168]	33	1			T15	1		T163	1		T176	1
len_1	58	1			T41	1		T163	1		T75	1
len_0	463	1			T3	2		T16	1		T17	2