Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	578	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	4882	1			T2	20		T3	19		T9	4
len_601_800	11352	1			T2	32		T3	47		T9	8
len_401_600	7634	1			T2	23		T3	45		T9	2
len_201_400	3778	1			T2	17		T3	25		T14	1
len_65_200	7153	1			T2	8		T3	10		T9	1
len_min_for_xof_require_squeeze	74	1			T70	1		T44	1		T83	1
len_keccak_block_sizes[72]	84	1			T15	1		T141	1		T44	1
len_keccak_block_sizes[104]	71	1			T16	1		T28	1		T29	1
len_keccak_block_sizes[136]	78	1			T27	1		T141	1		T86	1
len_keccak_block_sizes[144]	33	1			T30	1		T27	1		T178	1
len_keccak_block_sizes[168]	41	1			T2	1		T16	1		T40	1
len_datapath_width	1071	1			T16	3		T18	3		T28	3
len_2_63	15088	1			T2	4		T3	2		T9	12
len_1	52	1			T28	1		T153	1		T179	1