Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 248 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 2599 1 T19 21 T23 3 T78 1
len_5001_7500 6433 1 T19 71 T23 17 T78 13
len_2501_5000 1435 1 T19 10 T23 3 T78 4
len_1025_2500 879 1 T19 7 T78 6 T37 1
len_769_1024 5309 1 T2 1 T3 17 T4 23
len_513_768 5770 1 T2 4 T3 12 T4 19
len_257_512 5966 1 T3 5 T4 17 T14 28
len_0_256 20140 1 T2 3 T3 16 T4 20
len_keccak_block_sizes[72] 38 1 T18 1 T23 2 T26 1
len_keccak_block_sizes[104] 40 1 T18 1 T24 1 T66 1
len_keccak_block_sizes[136] 35 1 T18 1 T35 1 T172 1
len_keccak_block_sizes[144] 31 1 T18 1 T173 1 T174 1
len_keccak_block_sizes[168] 33 1 T18 1 T30 1 T175 1
len_1 66 1 T17 1 T18 1 T62 1
len_0 518 1 T17 6 T18 1 T19 3

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%