Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	666	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5319	1			T2	2		T3	12		T4	12
len_601_800	12185	1			T2	3		T3	18		T4	29
len_401_600	7896	1			T2	3		T3	13		T4	13
len_201_400	4307	1			T3	1		T4	9		T14	6
len_65_200	7601	1			T3	2		T4	9		T14	6
len_min_for_xof_require_squeeze	87	1			T14	1		T71	1		T23	1
len_keccak_block_sizes[72]	67	1			T17	1		T71	1		T23	1
len_keccak_block_sizes[104]	78	1			T17	1		T71	1		T79	1
len_keccak_block_sizes[136]	84	1			T71	3		T23	2		T79	1
len_keccak_block_sizes[144]	41	1			T4	1		T144	5		T24	1
len_keccak_block_sizes[168]	37	1			T17	1		T23	1		T80	1
len_datapath_width	1087	1			T3	1		T17	5		T19	2
len_2_63	15223	1			T2	4		T3	1		T4	5
len_1	53	1			T71	1		T79	1		T24	2