Summary for Variable entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
56122 |
1 |
|
|
T1 |
126 |
|
T2 |
2 |
|
T3 |
6 |
auto[1] |
54996 |
1 |
|
|
T2 |
4 |
|
T15 |
4 |
|
T17 |
208 |
Summary for Variable prescaler_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for prescaler_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
27679 |
1 |
|
|
T1 |
30 |
|
T2 |
2 |
|
T12 |
1 |
lower_val |
27365 |
1 |
|
|
T1 |
24 |
|
T2 |
3 |
|
T3 |
2 |
zero_val |
831 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable wait_timer_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for wait_timer_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
55104 |
1 |
|
|
T1 |
74 |
|
T2 |
2 |
|
T3 |
2 |
lower_val |
56012 |
1 |
|
|
T1 |
52 |
|
T2 |
4 |
|
T3 |
4 |
zero_val |
2 |
1 |
|
|
T146 |
2 |
|
- |
- |
|
- |
- |
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
18 |
5 |
13 |
72.22 |
5 |
Automatically Generated Cross Bins for entropy_timer_cross
Element holes
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | NUMBER | STATUS |
[lower_val , zero_val] |
[zero_val] |
* |
-- |
-- |
4 |
|
Uncovered bins
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | NUMBER | STATUS |
[higher_val] |
[zero_val] |
[auto[0]] |
0 |
1 |
1 |
|
Covered bins
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
higher_val |
auto[0] |
6971 |
1 |
|
|
T1 |
16 |
|
T13 |
7 |
|
T5 |
1 |
higher_val |
higher_val |
auto[1] |
6758 |
1 |
|
|
T2 |
1 |
|
T15 |
2 |
|
T17 |
24 |
higher_val |
lower_val |
auto[0] |
7050 |
1 |
|
|
T1 |
14 |
|
T12 |
1 |
|
T13 |
8 |
higher_val |
lower_val |
auto[1] |
6899 |
1 |
|
|
T2 |
1 |
|
T17 |
25 |
|
T77 |
31 |
higher_val |
zero_val |
auto[1] |
1 |
1 |
|
|
T146 |
1 |
|
- |
- |
|
- |
- |
lower_val |
higher_val |
auto[0] |
6793 |
1 |
|
|
T1 |
16 |
|
T13 |
2 |
|
T15 |
1 |
lower_val |
higher_val |
auto[1] |
6781 |
1 |
|
|
T2 |
1 |
|
T15 |
2 |
|
T17 |
14 |
lower_val |
lower_val |
auto[0] |
6902 |
1 |
|
|
T1 |
8 |
|
T2 |
1 |
|
T3 |
2 |
lower_val |
lower_val |
auto[1] |
6889 |
1 |
|
|
T2 |
1 |
|
T17 |
24 |
|
T77 |
28 |
zero_val |
higher_val |
auto[0] |
351 |
1 |
|
|
T1 |
1 |
|
T4 |
1 |
|
T15 |
1 |
zero_val |
higher_val |
auto[1] |
86 |
1 |
|
|
T17 |
2 |
|
T37 |
2 |
|
T147 |
3 |
zero_val |
lower_val |
auto[0] |
321 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T12 |
1 |
zero_val |
lower_val |
auto[1] |
73 |
1 |
|
|
T147 |
1 |
|
T148 |
1 |
|
T149 |
1 |