Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	169	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2697	1			T89	2		T51	18		T154	8
len_5001_7500	6488	1			T89	3		T51	54		T154	15
len_2501_5000	1481	1			T51	13		T154	2		T199	2
len_1025_2500	907	1			T89	1		T51	7		T154	1
len_769_1024	5409	1			T16	2		T30	15		T36	6
len_513_768	5855	1			T22	2		T30	9		T36	19
len_257_512	5861	1			T16	2		T22	3		T81	16
len_0_256	22039	1			T1	3		T2	3		T13	73
len_keccak_block_sizes[72]	42	1			T13	1		T90	1		T91	1
len_keccak_block_sizes[104]	42	1			T91	1		T93	1		T94	1
len_keccak_block_sizes[136]	32	1			T93	1		T94	1		T92	1
len_keccak_block_sizes[144]	26	1			T93	1		T94	1		T81	1
len_keccak_block_sizes[168]	14	1			T81	1		T31	1		T153	1
len_1	56	1			T13	1		T90	1		T91	1
len_0	486	1			T13	1		T90	1		T91	1