Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	635	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5458	1			T16	3		T22	2		T30	3
len_601_800	12069	1			T16	5		T22	2		T30	15
len_401_600	8179	1			T16	2		T22	5		T30	8
len_201_400	4401	1			T22	1		T30	4		T36	2
len_65_200	9135	1			T14	6		T22	1		T62	84
len_min_for_xof_require_squeeze	112	1			T168	9		T201	9		T38	1
len_keccak_block_sizes[72]	86	1			T31	1		T168	9		T201	9
len_keccak_block_sizes[104]	93	1			T62	2		T79	2		T202	1
len_keccak_block_sizes[136]	104	1			T62	2		T202	2		T168	9
len_keccak_block_sizes[144]	44	1			T203	5		T82	1		T204	5
len_keccak_block_sizes[168]	46	1			T202	1		T203	5		T204	5
len_datapath_width	1099	1			T13	73		T17	3		T18	3
len_2_63	15688	1			T1	3		T2	3		T12	26
len_1	55	1			T62	2		T38	1		T152	1