| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 91.88 | 95.80 | 90.59 | 100.00 | 67.77 | 93.74 | 99.00 | 96.29 |
| T144 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_csr_mem_rw_with_rand_reset.1155134211 | Aug 23 08:00:27 AM UTC 24 | Aug 23 08:00:29 AM UTC 24 | 85418930 ps | ||
| T771 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_shadow_reg_errors_with_csr_rw.1888337653 | Aug 23 08:00:27 AM UTC 24 | Aug 23 08:00:30 AM UTC 24 | 38867343 ps | ||
| T132 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_tl_errors.289932140 | Aug 23 08:00:25 AM UTC 24 | Aug 23 08:00:30 AM UTC 24 | 616981827 ps | ||
| T183 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_intr_test.701277691 | Aug 23 08:00:28 AM UTC 24 | Aug 23 08:00:30 AM UTC 24 | 20155451 ps | ||
| T772 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_csr_rw.2138106324 | Aug 23 08:00:28 AM UTC 24 | Aug 23 08:00:30 AM UTC 24 | 29219184 ps | ||
| T186 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_tl_intg_err.2342709436 | Aug 23 08:00:26 AM UTC 24 | Aug 23 08:00:31 AM UTC 24 | 735206276 ps | ||
| T104 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_shadow_reg_errors.258087138 | Aug 23 08:00:29 AM UTC 24 | Aug 23 08:00:31 AM UTC 24 | 67640813 ps | ||
| T773 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_same_csr_outstanding.3778395845 | Aug 23 08:00:28 AM UTC 24 | Aug 23 08:00:32 AM UTC 24 | 121495641 ps | ||
| T774 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_intr_test.3221021823 | Aug 23 08:00:31 AM UTC 24 | Aug 23 08:00:32 AM UTC 24 | 11608925 ps | ||
| T775 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_csr_mem_rw_with_rand_reset.1648273769 | Aug 23 08:00:29 AM UTC 24 | Aug 23 08:00:32 AM UTC 24 | 38178760 ps | ||
| T137 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_tl_errors.1475398403 | Aug 23 08:00:28 AM UTC 24 | Aug 23 08:00:32 AM UTC 24 | 902789339 ps | ||
| T776 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_csr_rw.2426400707 | Aug 23 08:00:31 AM UTC 24 | Aug 23 08:00:32 AM UTC 24 | 55774695 ps | ||
| T777 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_shadow_reg_errors_with_csr_rw.713912438 | Aug 23 08:00:30 AM UTC 24 | Aug 23 08:00:33 AM UTC 24 | 229756882 ps | ||
| T187 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_tl_intg_err.2684797689 | Aug 23 08:00:28 AM UTC 24 | Aug 23 08:00:34 AM UTC 24 | 398907295 ps | ||
| T196 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_tl_intg_err.3886488123 | Aug 23 08:00:31 AM UTC 24 | Aug 23 08:00:34 AM UTC 24 | 415650348 ps | ||
| T778 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_same_csr_outstanding.4092832394 | Aug 23 08:00:32 AM UTC 24 | Aug 23 08:00:34 AM UTC 24 | 127561122 ps | ||
| T141 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_tl_errors.1714828947 | Aug 23 08:00:30 AM UTC 24 | Aug 23 08:00:35 AM UTC 24 | 49928194 ps | ||
| T779 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_shadow_reg_errors.4194049323 | Aug 23 08:00:33 AM UTC 24 | Aug 23 08:00:35 AM UTC 24 | 96110075 ps | ||
| T140 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_tl_errors.4092342889 | Aug 23 08:00:33 AM UTC 24 | Aug 23 08:00:35 AM UTC 24 | 218505096 ps | ||
| T780 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_csr_mem_rw_with_rand_reset.2317210407 | Aug 23 08:00:33 AM UTC 24 | Aug 23 08:00:36 AM UTC 24 | 61618980 ps | ||
| T781 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_intr_test.437686437 | Aug 23 08:00:34 AM UTC 24 | Aug 23 08:00:36 AM UTC 24 | 15019497 ps | ||
| T782 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_shadow_reg_errors_with_csr_rw.412567279 | Aug 23 08:00:33 AM UTC 24 | Aug 23 08:00:36 AM UTC 24 | 44207465 ps | ||
| T783 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_csr_rw.2766466433 | Aug 23 08:00:34 AM UTC 24 | Aug 23 08:00:36 AM UTC 24 | 17391162 ps | ||
| T784 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_shadow_reg_errors.1162572028 | Aug 23 08:00:35 AM UTC 24 | Aug 23 08:00:37 AM UTC 24 | 91779219 ps | ||
| T785 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_same_csr_outstanding.3656391812 | Aug 23 08:00:35 AM UTC 24 | Aug 23 08:00:37 AM UTC 24 | 27009149 ps | ||
| T786 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_csr_mem_rw_with_rand_reset.2434808929 | Aug 23 08:00:35 AM UTC 24 | Aug 23 08:00:38 AM UTC 24 | 82088884 ps | ||
| T787 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_intr_test.3086602182 | Aug 23 08:00:36 AM UTC 24 | Aug 23 08:00:38 AM UTC 24 | 24568576 ps | ||
| T788 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_csr_rw.2927865894 | Aug 23 08:00:36 AM UTC 24 | Aug 23 08:00:38 AM UTC 24 | 16442209 ps | ||
| T789 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_shadow_reg_errors_with_csr_rw.2670645723 | Aug 23 08:00:35 AM UTC 24 | Aug 23 08:00:38 AM UTC 24 | 153323931 ps | ||
| T193 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_tl_intg_err.2166149868 | Aug 23 08:00:34 AM UTC 24 | Aug 23 08:00:39 AM UTC 24 | 409204740 ps | ||
| T188 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_tl_intg_err.4289354818 | Aug 23 08:00:36 AM UTC 24 | Aug 23 08:00:40 AM UTC 24 | 111295658 ps | ||
| T790 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_same_csr_outstanding.900385406 | Aug 23 08:00:36 AM UTC 24 | Aug 23 08:00:40 AM UTC 24 | 236632073 ps | ||
| T791 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_csr_mem_rw_with_rand_reset.4000977229 | Aug 23 08:00:37 AM UTC 24 | Aug 23 08:00:40 AM UTC 24 | 88683210 ps | ||
| T792 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_shadow_reg_errors.816408745 | Aug 23 08:00:38 AM UTC 24 | Aug 23 08:00:40 AM UTC 24 | 220392623 ps | ||
| T793 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_tl_errors.1984600594 | Aug 23 08:00:38 AM UTC 24 | Aug 23 08:00:41 AM UTC 24 | 42299133 ps | ||
| T139 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_tl_errors.1215917317 | Aug 23 08:00:36 AM UTC 24 | Aug 23 08:00:41 AM UTC 24 | 294534452 ps | ||
| T794 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_intr_test.4162041005 | Aug 23 08:00:39 AM UTC 24 | Aug 23 08:00:41 AM UTC 24 | 12407435 ps | ||
| T795 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_csr_rw.3502103318 | Aug 23 08:00:40 AM UTC 24 | Aug 23 08:00:41 AM UTC 24 | 25043916 ps | ||
| T796 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_shadow_reg_errors_with_csr_rw.1254467829 | Aug 23 08:00:38 AM UTC 24 | Aug 23 08:00:42 AM UTC 24 | 947371105 ps | ||
| T797 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_same_csr_outstanding.3798718565 | Aug 23 08:00:40 AM UTC 24 | Aug 23 08:00:42 AM UTC 24 | 23550342 ps | ||
| T798 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_shadow_reg_errors.547517046 | Aug 23 08:00:41 AM UTC 24 | Aug 23 08:00:43 AM UTC 24 | 40157707 ps | ||
| T799 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_shadow_reg_errors_with_csr_rw.4117951132 | Aug 23 08:00:41 AM UTC 24 | Aug 23 08:00:43 AM UTC 24 | 28096097 ps | ||
| T800 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_csr_mem_rw_with_rand_reset.1682341091 | Aug 23 08:00:41 AM UTC 24 | Aug 23 08:00:43 AM UTC 24 | 61191542 ps | ||
| T801 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_intr_test.1835961793 | Aug 23 08:00:42 AM UTC 24 | Aug 23 08:00:44 AM UTC 24 | 14350475 ps | ||
| T802 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_csr_rw.1141752465 | Aug 23 08:00:42 AM UTC 24 | Aug 23 08:00:44 AM UTC 24 | 62775119 ps | ||
| T803 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_tl_intg_err.745485286 | Aug 23 08:00:39 AM UTC 24 | Aug 23 08:00:45 AM UTC 24 | 1406144513 ps | ||
| T804 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_same_csr_outstanding.4011350420 | Aug 23 08:00:42 AM UTC 24 | Aug 23 08:00:45 AM UTC 24 | 226752895 ps | ||
| T805 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_shadow_reg_errors.2995627143 | Aug 23 08:00:43 AM UTC 24 | Aug 23 08:00:45 AM UTC 24 | 50737325 ps | ||
| T138 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_tl_errors.948073785 | Aug 23 08:00:41 AM UTC 24 | Aug 23 08:00:45 AM UTC 24 | 129293322 ps | ||
| T806 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_csr_mem_rw_with_rand_reset.3047198282 | Aug 23 08:00:52 AM UTC 24 | Aug 23 08:00:55 AM UTC 24 | 31567050 ps | ||
| T807 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_csr_rw.2254930915 | Aug 23 08:00:54 AM UTC 24 | Aug 23 08:00:56 AM UTC 24 | 53228090 ps | ||
| T808 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_csr_mem_rw_with_rand_reset.2421429888 | Aug 23 08:00:43 AM UTC 24 | Aug 23 08:00:46 AM UTC 24 | 90819103 ps | ||
| T809 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_tl_intg_err.3156996528 | Aug 23 08:00:47 AM UTC 24 | Aug 23 08:00:54 AM UTC 24 | 713895570 ps | ||
| T810 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_same_csr_outstanding.2207971713 | Aug 23 08:00:52 AM UTC 24 | Aug 23 08:00:55 AM UTC 24 | 508208019 ps | ||
| T194 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_tl_intg_err.1725188580 | Aug 23 08:00:42 AM UTC 24 | Aug 23 08:00:47 AM UTC 24 | 91040710 ps | ||
| T811 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_tl_errors.3812236633 | Aug 23 08:00:44 AM UTC 24 | Aug 23 08:00:47 AM UTC 24 | 234713492 ps | ||
| T812 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_intr_test.3595707698 | Aug 23 08:00:45 AM UTC 24 | Aug 23 08:00:47 AM UTC 24 | 29091180 ps | ||
| T813 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_csr_rw.1987787084 | Aug 23 08:00:45 AM UTC 24 | Aug 23 08:00:47 AM UTC 24 | 121992637 ps | ||
| T814 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_shadow_reg_errors.4086439303 | Aug 23 08:00:45 AM UTC 24 | Aug 23 08:00:47 AM UTC 24 | 70202803 ps | ||
| T815 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_shadow_reg_errors_with_csr_rw.1821182449 | Aug 23 08:00:44 AM UTC 24 | Aug 23 08:00:48 AM UTC 24 | 204317142 ps | ||
| T816 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_same_csr_outstanding.194729797 | Aug 23 08:00:45 AM UTC 24 | Aug 23 08:00:48 AM UTC 24 | 76511049 ps | ||
| T817 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_csr_mem_rw_with_rand_reset.1366074444 | Aug 23 08:00:45 AM UTC 24 | Aug 23 08:00:48 AM UTC 24 | 116631384 ps | ||
| T189 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_tl_intg_err.3751665141 | Aug 23 08:00:44 AM UTC 24 | Aug 23 08:00:48 AM UTC 24 | 166128499 ps | ||
| T818 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_shadow_reg_errors_with_csr_rw.3093907555 | Aug 23 08:00:46 AM UTC 24 | Aug 23 08:00:49 AM UTC 24 | 292643316 ps | ||
| T819 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_tl_errors.1574797775 | Aug 23 08:00:46 AM UTC 24 | Aug 23 08:00:50 AM UTC 24 | 74902551 ps | ||
| T820 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_intr_test.1534192994 | Aug 23 08:00:47 AM UTC 24 | Aug 23 08:00:50 AM UTC 24 | 17743841 ps | ||
| T821 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_csr_rw.5553672 | Aug 23 08:00:47 AM UTC 24 | Aug 23 08:00:51 AM UTC 24 | 69183244 ps | ||
| T822 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_shadow_reg_errors.576174884 | Aug 23 08:00:49 AM UTC 24 | Aug 23 08:00:51 AM UTC 24 | 76376710 ps | ||
| T823 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_same_csr_outstanding.471745580 | Aug 23 08:00:49 AM UTC 24 | Aug 23 08:00:52 AM UTC 24 | 61115457 ps | ||
| T185 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_tl_errors.2742819734 | Aug 23 08:00:49 AM UTC 24 | Aug 23 08:00:52 AM UTC 24 | 338447125 ps | ||
| T824 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_intr_test.2741643541 | Aug 23 08:00:51 AM UTC 24 | Aug 23 08:00:53 AM UTC 24 | 15285334 ps | ||
| T825 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_csr_rw.3657040392 | Aug 23 08:00:51 AM UTC 24 | Aug 23 08:00:53 AM UTC 24 | 19114445 ps | ||
| T826 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_csr_mem_rw_with_rand_reset.3505875575 | Aug 23 08:00:49 AM UTC 24 | Aug 23 08:00:53 AM UTC 24 | 93573063 ps | ||
| T827 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_shadow_reg_errors_with_csr_rw.3695395450 | Aug 23 08:00:49 AM UTC 24 | Aug 23 08:00:53 AM UTC 24 | 452305637 ps | ||
| T828 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_shadow_reg_errors.310069543 | Aug 23 08:00:52 AM UTC 24 | Aug 23 08:00:54 AM UTC 24 | 60877435 ps | ||
| T195 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_tl_intg_err.2308199655 | Aug 23 08:00:49 AM UTC 24 | Aug 23 08:00:55 AM UTC 24 | 730236145 ps | ||
| T829 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_intr_test.3117175942 | Aug 23 08:00:54 AM UTC 24 | Aug 23 08:00:56 AM UTC 24 | 11243508 ps | ||
| T830 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_tl_errors.3398988669 | Aug 23 08:00:53 AM UTC 24 | Aug 23 08:00:56 AM UTC 24 | 334343018 ps | ||
| T831 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_same_csr_outstanding.152429140 | Aug 23 08:00:54 AM UTC 24 | Aug 23 08:00:57 AM UTC 24 | 55144706 ps | ||
| T832 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_shadow_reg_errors_with_csr_rw.3473679089 | Aug 23 08:00:53 AM UTC 24 | Aug 23 08:00:57 AM UTC 24 | 489896374 ps | ||
| T833 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_shadow_reg_errors.143794300 | Aug 23 08:00:55 AM UTC 24 | Aug 23 08:00:57 AM UTC 24 | 63989923 ps | ||
| T834 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_shadow_reg_errors_with_csr_rw.1408264965 | Aug 23 08:00:55 AM UTC 24 | Aug 23 08:00:57 AM UTC 24 | 132357306 ps | ||
| T835 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_tl_intg_err.344004314 | Aug 23 08:00:53 AM UTC 24 | Aug 23 08:00:57 AM UTC 24 | 103168144 ps | ||
| T836 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_csr_mem_rw_with_rand_reset.3094616073 | Aug 23 08:00:55 AM UTC 24 | Aug 23 08:00:58 AM UTC 24 | 144227365 ps | ||
| T837 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_intr_test.2881541670 | Aug 23 08:00:56 AM UTC 24 | Aug 23 08:00:58 AM UTC 24 | 17954151 ps | ||
| T143 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_tl_errors.3549183566 | Aug 23 08:00:55 AM UTC 24 | Aug 23 08:00:58 AM UTC 24 | 131624360 ps | ||
| T838 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_csr_rw.643169289 | Aug 23 08:00:56 AM UTC 24 | Aug 23 08:00:58 AM UTC 24 | 44178586 ps | ||
| T839 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_shadow_reg_errors.2238417696 | Aug 23 08:00:57 AM UTC 24 | Aug 23 08:00:59 AM UTC 24 | 20966287 ps | ||
| T840 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_tl_intg_err.3161567560 | Aug 23 08:00:56 AM UTC 24 | Aug 23 08:01:00 AM UTC 24 | 209283730 ps | ||
| T841 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_csr_mem_rw_with_rand_reset.273256381 | Aug 23 08:00:57 AM UTC 24 | Aug 23 08:01:00 AM UTC 24 | 29672737 ps | ||
| T842 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_shadow_reg_errors_with_csr_rw.3608076383 | Aug 23 08:00:57 AM UTC 24 | Aug 23 08:01:00 AM UTC 24 | 111533979 ps | ||
| T843 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_same_csr_outstanding.2243061249 | Aug 23 08:00:57 AM UTC 24 | Aug 23 08:01:00 AM UTC 24 | 65738064 ps | ||
| T844 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_intr_test.2485067329 | Aug 23 08:00:59 AM UTC 24 | Aug 23 08:01:01 AM UTC 24 | 38585729 ps | ||
| T845 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/20.kmac_intr_test.1426655862 | Aug 23 08:00:59 AM UTC 24 | Aug 23 08:01:01 AM UTC 24 | 50466963 ps | ||
| T846 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_csr_rw.385578425 | Aug 23 08:00:59 AM UTC 24 | Aug 23 08:01:01 AM UTC 24 | 30985592 ps | ||
| T847 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_same_csr_outstanding.4256732575 | Aug 23 08:00:59 AM UTC 24 | Aug 23 08:01:01 AM UTC 24 | 49331619 ps | ||
| T848 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/22.kmac_intr_test.1415096264 | Aug 23 08:01:00 AM UTC 24 | Aug 23 08:01:02 AM UTC 24 | 11039314 ps | ||
| T849 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/21.kmac_intr_test.499678662 | Aug 23 08:01:00 AM UTC 24 | Aug 23 08:01:02 AM UTC 24 | 22858502 ps | ||
| T850 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/23.kmac_intr_test.3596052276 | Aug 23 08:01:00 AM UTC 24 | Aug 23 08:01:02 AM UTC 24 | 12368592 ps | ||
| T851 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/24.kmac_intr_test.388865709 | Aug 23 08:01:00 AM UTC 24 | Aug 23 08:01:02 AM UTC 24 | 65268187 ps | ||
| T852 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_csr_mem_rw_with_rand_reset.2253880851 | Aug 23 08:00:59 AM UTC 24 | Aug 23 08:01:02 AM UTC 24 | 246585476 ps | ||
| T853 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/25.kmac_intr_test.355132275 | Aug 23 08:01:00 AM UTC 24 | Aug 23 08:01:02 AM UTC 24 | 26132067 ps | ||
| T854 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_tl_errors.548185734 | Aug 23 08:00:59 AM UTC 24 | Aug 23 08:01:03 AM UTC 24 | 1068804117 ps | ||
| T855 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/27.kmac_intr_test.2863931373 | Aug 23 08:01:02 AM UTC 24 | Aug 23 08:01:03 AM UTC 24 | 28399194 ps | ||
| T856 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/26.kmac_intr_test.2136791122 | Aug 23 08:01:02 AM UTC 24 | Aug 23 08:01:03 AM UTC 24 | 13711576 ps | ||
| T857 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/28.kmac_intr_test.4096180787 | Aug 23 08:01:02 AM UTC 24 | Aug 23 08:01:03 AM UTC 24 | 25842606 ps | ||
| T858 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/29.kmac_intr_test.84696216 | Aug 23 08:01:02 AM UTC 24 | Aug 23 08:01:03 AM UTC 24 | 33105843 ps | ||
| T192 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_tl_intg_err.1850680729 | Aug 23 08:00:59 AM UTC 24 | Aug 23 08:01:04 AM UTC 24 | 1221931731 ps | ||
| T859 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/31.kmac_intr_test.3909276986 | Aug 23 08:01:03 AM UTC 24 | Aug 23 08:01:05 AM UTC 24 | 55188659 ps | ||
| T860 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/30.kmac_intr_test.4055264090 | Aug 23 08:01:03 AM UTC 24 | Aug 23 08:01:05 AM UTC 24 | 58518649 ps | ||
| T861 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/32.kmac_intr_test.2714663096 | Aug 23 08:01:03 AM UTC 24 | Aug 23 08:01:05 AM UTC 24 | 230441080 ps | ||
| T862 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/33.kmac_intr_test.953648959 | Aug 23 08:01:03 AM UTC 24 | Aug 23 08:01:05 AM UTC 24 | 17618146 ps | ||
| T863 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/34.kmac_intr_test.1796475163 | Aug 23 08:01:03 AM UTC 24 | Aug 23 08:01:05 AM UTC 24 | 12990248 ps | ||
| T864 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/35.kmac_intr_test.410089250 | Aug 23 08:01:03 AM UTC 24 | Aug 23 08:01:05 AM UTC 24 | 10872166 ps | ||
| T865 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/36.kmac_intr_test.854380542 | Aug 23 08:01:03 AM UTC 24 | Aug 23 08:01:05 AM UTC 24 | 12051431 ps | ||
| T866 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/39.kmac_intr_test.4032818723 | Aug 23 08:01:04 AM UTC 24 | Aug 23 08:01:06 AM UTC 24 | 43870223 ps | ||
| T867 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/38.kmac_intr_test.3733808939 | Aug 23 08:01:04 AM UTC 24 | Aug 23 08:01:06 AM UTC 24 | 20363632 ps | ||
| T868 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/37.kmac_intr_test.1748343377 | Aug 23 08:01:04 AM UTC 24 | Aug 23 08:01:06 AM UTC 24 | 32683919 ps | ||
| T869 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/40.kmac_intr_test.3258441896 | Aug 23 08:01:04 AM UTC 24 | Aug 23 08:01:06 AM UTC 24 | 45286474 ps | ||
| T870 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/41.kmac_intr_test.3217849607 | Aug 23 08:01:04 AM UTC 24 | Aug 23 08:01:06 AM UTC 24 | 21727317 ps | ||
| T871 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/43.kmac_intr_test.1600472987 | Aug 23 08:01:05 AM UTC 24 | Aug 23 08:01:07 AM UTC 24 | 44009358 ps | ||
| T872 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/46.kmac_intr_test.3157460637 | Aug 23 08:01:05 AM UTC 24 | Aug 23 08:01:07 AM UTC 24 | 90099583 ps | ||
| T873 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/42.kmac_intr_test.1800919211 | Aug 23 08:01:05 AM UTC 24 | Aug 23 08:01:07 AM UTC 24 | 11230622 ps | ||
| T874 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/44.kmac_intr_test.933435189 | Aug 23 08:01:05 AM UTC 24 | Aug 23 08:01:07 AM UTC 24 | 21091524 ps | ||
| T875 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/45.kmac_intr_test.1872755697 | Aug 23 08:01:05 AM UTC 24 | Aug 23 08:01:07 AM UTC 24 | 132728609 ps | ||
| T876 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/48.kmac_intr_test.1524499878 | Aug 23 08:01:05 AM UTC 24 | Aug 23 08:01:07 AM UTC 24 | 42588323 ps | ||
| T877 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/47.kmac_intr_test.3828043095 | Aug 23 08:01:05 AM UTC 24 | Aug 23 08:01:07 AM UTC 24 | 247106629 ps | ||
| T878 | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/49.kmac_intr_test.1851295389 | Aug 23 08:01:05 AM UTC 24 | Aug 23 08:01:07 AM UTC 24 | 14312158 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_stress_all.3230950635 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 1512362068 ps |
| CPU time | 16.34 seconds |
| Started | Aug 23 08:17:47 AM UTC 24 |
| Finished | Aug 23 08:18:05 AM UTC 24 |
| Peak memory | 245640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230950635 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_stress_all.3230950635 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_sec_cm.2764903752 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 2914308425 ps |
| CPU time | 27.33 seconds |
| Started | Aug 23 08:18:36 AM UTC 24 |
| Finished | Aug 23 08:19:05 AM UTC 24 |
| Peak memory | 273628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_R ELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2764903752 -assert nopostproc +UVM_TESTNA ME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_sec_cm.2764903752 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_tl_intg_err.820348226 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 477871441 ps |
| CPU time | 2.63 seconds |
| Started | Aug 23 07:59:45 AM UTC 24 |
| Finished | Aug 23 07:59:49 AM UTC 24 |
| Peak memory | 231436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=820348226 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regressi on_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.kmac_tl_intg_err.820348226 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_app_with_partial_data.3662079279 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 23922310492 ps |
| CPU time | 158.91 seconds |
| Started | Aug 23 08:17:46 AM UTC 24 |
| Finished | Aug 23 08:20:28 AM UTC 24 |
| Peak memory | 313132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3662079279 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_with_partial_data_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_app_with_partial_data.3662079279 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_app_with_partial_data/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_key_error.9021956 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 2774714300 ps |
| CPU time | 7.43 seconds |
| Started | Aug 23 08:18:16 AM UTC 24 |
| Finished | Aug 23 08:18:25 AM UTC 24 |
| Peak memory | 230444 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=9021956 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_ SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_key_error.9021956 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_tl_errors.3559323212 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 769319252 ps |
| CPU time | 3.5 seconds |
| Started | Aug 23 07:59:50 AM UTC 24 |
| Finished | Aug 23 07:59:54 AM UTC 24 |
| Peak memory | 229628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3559323212 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.kmac_tl_errors.3559323212 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_lc_escalation.3529248699 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 156896552 ps |
| CPU time | 1.19 seconds |
| Started | Aug 23 08:20:31 AM UTC 24 |
| Finished | Aug 23 08:20:33 AM UTC 24 |
| Peak memory | 233880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3529248699 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_lc_escalation.3529248699 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_error.84714946 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 4792430754 ps |
| CPU time | 77.6 seconds |
| Started | Aug 23 08:18:12 AM UTC 24 |
| Finished | Aug 23 08:19:32 AM UTC 24 |
| Peak memory | 282524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=84714946 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST _SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs /coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_error.84714946 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_shadow_reg_errors_with_csr_rw.917943688 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 139533605 ps |
| CPU time | 2.56 seconds |
| Started | Aug 23 07:59:48 AM UTC 24 |
| Finished | Aug 23 07:59:51 AM UTC 24 |
| Peak memory | 237032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=917943688 -asse rt nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/s cratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.kmac_shadow_reg_errors_with_csr_rw.9 17943688 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_test_vectors_sha3_224.2284716741 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 1779318465 ps |
| CPU time | 37.21 seconds |
| Started | Aug 23 08:17:54 AM UTC 24 |
| Finished | Aug 23 08:18:33 AM UTC 24 |
| Peak memory | 257796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=224 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284716741 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_test_vectors_sha3_224.2284716741 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_test_vectors_sha3_224/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/20.kmac_lc_escalation.1239384851 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 662511321 ps |
| CPU time | 8.09 seconds |
| Started | Aug 23 08:53:24 AM UTC 24 |
| Finished | Aug 23 08:53:33 AM UTC 24 |
| Peak memory | 245596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1239384851 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.kmac_lc_escalation.1239384851 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/20.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/46.kmac_lc_escalation.152458924 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 34510606 ps |
| CPU time | 1.09 seconds |
| Started | Aug 23 09:33:43 AM UTC 24 |
| Finished | Aug 23 09:33:45 AM UTC 24 |
| Peak memory | 229896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=152458924 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmaske d-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.kmac_lc_escalation.152458924 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/46.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_intr_test.1665794385 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 13144653 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 08:00:19 AM UTC 24 |
| Finished | Aug 23 08:00:21 AM UTC 24 |
| Peak memory | 218972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1665794385 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.kmac_intr_test.1665794385 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_stress_all.2278387042 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 31619723988 ps |
| CPU time | 550.84 seconds |
| Started | Aug 23 08:20:34 AM UTC 24 |
| Finished | Aug 23 08:29:51 AM UTC 24 |
| Peak memory | 841832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278387042 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_stress_all.2278387042 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/18.kmac_lc_escalation.1671299274 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 57346774 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 08:49:56 AM UTC 24 |
| Finished | Aug 23 08:49:59 AM UTC 24 |
| Peak memory | 234588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671299274 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.kmac_lc_escalation.1671299274 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_error.698429274 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 7415504074 ps |
| CPU time | 144.79 seconds |
| Started | Aug 23 08:25:35 AM UTC 24 |
| Finished | Aug 23 08:28:02 AM UTC 24 |
| Peak memory | 386900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=698429274 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_error.698429274 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_burst_write.4072749096 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 39423668605 ps |
| CPU time | 328.03 seconds |
| Started | Aug 23 08:24:01 AM UTC 24 |
| Finished | Aug 23 08:29:33 AM UTC 24 |
| Peak memory | 243528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4072749096 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_burst_write.4072749096 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_mubi.859792372 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 4248612655 ps |
| CPU time | 224.55 seconds |
| Started | Aug 23 08:21:46 AM UTC 24 |
| Finished | Aug 23 08:25:34 AM UTC 24 |
| Peak memory | 342176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=859792372 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_mubi_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs /coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_mubi.859792372 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_mubi/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_alert_test.157411728 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 37192502 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 08:17:50 AM UTC 24 |
| Finished | Aug 23 08:17:52 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=157411728 -assert nopostproc +UVM_TESTNA ME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_alert_test.157411728 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_shadow_reg_errors_with_csr_rw.30933816 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 165493647 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 08:00:25 AM UTC 24 |
| Finished | Aug 23 08:00:27 AM UTC 24 |
| Peak memory | 236088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=30933816 -asser t nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/sc ratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.kmac_shadow_reg_errors_with_csr_rw.30 933816 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_mem_partial_access.1269788409 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 38952624 ps |
| CPU time | 1.08 seconds |
| Started | Aug 23 07:59:57 AM UTC 24 |
| Finished | Aug 23 07:59:59 AM UTC 24 |
| Peak memory | 228860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +cdc_instrumentation_enab led=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1269788409 -assert nopostp roc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_ regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.kmac_mem_partial_access.1269788409 +enable_mas king=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/11.kmac_lc_escalation.2680714632 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 1435748876 ps |
| CPU time | 13.8 seconds |
| Started | Aug 23 08:39:34 AM UTC 24 |
| Finished | Aug 23 08:39:49 AM UTC 24 |
| Peak memory | 247824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2680714632 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.kmac_lc_escalation.2680714632 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/19.kmac_lc_escalation.2750829832 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 298644883 ps |
| CPU time | 15.28 seconds |
| Started | Aug 23 08:51:55 AM UTC 24 |
| Finished | Aug 23 08:52:12 AM UTC 24 |
| Peak memory | 245548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750829832 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.kmac_lc_escalation.2750829832 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_entropy_ready_error.2578023290 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 6141020944 ps |
| CPU time | 48.18 seconds |
| Started | Aug 23 08:18:27 AM UTC 24 |
| Finished | Aug 23 08:19:16 AM UTC 24 |
| Peak memory | 230572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2578023290 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_entropy_ready_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_ unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_entropy_ready_error.2578023290 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_entropy_ready_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_tl_errors.289932140 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 616981827 ps |
| CPU time | 4.13 seconds |
| Started | Aug 23 08:00:25 AM UTC 24 |
| Finished | Aug 23 08:00:30 AM UTC 24 |
| Peak memory | 229764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=289932140 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.kmac_tl_errors.289932140 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_tl_intg_err.3478145650 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 1519233510 ps |
| CPU time | 3.49 seconds |
| Started | Aug 23 07:59:51 AM UTC 24 |
| Finished | Aug 23 07:59:55 AM UTC 24 |
| Peak memory | 229508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3478145650 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.kmac_tl_intg_err.3478145650 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_intr_test.1967185311 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 27886692 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 07:59:45 AM UTC 24 |
| Finished | Aug 23 07:59:47 AM UTC 24 |
| Peak memory | 218972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967185311 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.kmac_intr_test.1967185311 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_smoke.3293268104 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 2695235186 ps |
| CPU time | 38.18 seconds |
| Started | Aug 23 08:23:30 AM UTC 24 |
| Finished | Aug 23 08:24:10 AM UTC 24 |
| Peak memory | 230720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3293268104 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_smoke.3293268104 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/35.kmac_key_error.4085542580 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 471012690 ps |
| CPU time | 2.66 seconds |
| Started | Aug 23 09:15:32 AM UTC 24 |
| Finished | Aug 23 09:15:36 AM UTC 24 |
| Peak memory | 230364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4085542580 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.kmac_key_error.4085542580 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/35.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_entropy_refresh.3571925298 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 194225514671 ps |
| CPU time | 277.52 seconds |
| Started | Aug 23 08:20:07 AM UTC 24 |
| Finished | Aug 23 08:24:48 AM UTC 24 |
| Peak memory | 464728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571925298 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_entropy_refresh.3571925298 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_tl_intg_err.2166149868 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 409204740 ps |
| CPU time | 4.23 seconds |
| Started | Aug 23 08:00:34 AM UTC 24 |
| Finished | Aug 23 08:00:39 AM UTC 24 |
| Peak memory | 219476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166149868 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.kmac_tl_intg_err.2166149868 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_error.1796230933 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 13594526958 ps |
| CPU time | 288.35 seconds |
| Started | Aug 23 08:34:23 AM UTC 24 |
| Finished | Aug 23 08:39:15 AM UTC 24 |
| Peak memory | 391008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796230933 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_error.1796230933 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_tl_errors.246062235 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 96282791 ps |
| CPU time | 2.79 seconds |
| Started | Aug 23 08:00:09 AM UTC 24 |
| Finished | Aug 23 08:00:13 AM UTC 24 |
| Peak memory | 229568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=246062235 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.kmac_tl_errors.246062235 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_sideload.474615446 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 17391457251 ps |
| CPU time | 321.28 seconds |
| Started | Aug 23 08:26:31 AM UTC 24 |
| Finished | Aug 23 08:31:56 AM UTC 24 |
| Peak memory | 589844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=474615446 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regressi on_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_sideload.474615446 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_entropy_mode_error.3943830204 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 2083224360 ps |
| CPU time | 22.83 seconds |
| Started | Aug 23 08:17:46 AM UTC 24 |
| Finished | Aug 23 08:18:10 AM UTC 24 |
| Peak memory | 232512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3943830204 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_entropy_mode_error.3943830204 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_shadow_reg_errors.3598156321 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 114474319 ps |
| CPU time | 1 seconds |
| Started | Aug 23 07:59:42 AM UTC 24 |
| Finished | Aug 23 07:59:44 AM UTC 24 |
| Peak memory | 229392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598156321 -assert nopostpr oc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_r egression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.kmac_shadow_reg_errors.3598156321 +enable_maski ng=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_intr_test.962310839 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 14282274 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 07:59:51 AM UTC 24 |
| Finished | Aug 23 07:59:52 AM UTC 24 |
| Peak memory | 218860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=962310839 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.kmac_intr_test.962310839 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_tl_intg_err.4289354818 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 111295658 ps |
| CPU time | 2.47 seconds |
| Started | Aug 23 08:00:36 AM UTC 24 |
| Finished | Aug 23 08:00:40 AM UTC 24 |
| Peak memory | 229364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4289354818 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.kmac_tl_intg_err.4289354818 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_tl_intg_err.1850680729 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 1221931731 ps |
| CPU time | 3.64 seconds |
| Started | Aug 23 08:00:59 AM UTC 24 |
| Finished | Aug 23 08:01:04 AM UTC 24 |
| Peak memory | 229480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1850680729 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.kmac_tl_intg_err.1850680729 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_tl_errors.1215917317 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 294534452 ps |
| CPU time | 3.6 seconds |
| Started | Aug 23 08:00:36 AM UTC 24 |
| Finished | Aug 23 08:00:41 AM UTC 24 |
| Peak memory | 229316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1215917317 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.kmac_tl_errors.1215917317 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_csr_aliasing.3968293841 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 184620094 ps |
| CPU time | 3.58 seconds |
| Started | Aug 23 07:59:46 AM UTC 24 |
| Finished | Aug 23 07:59:51 AM UTC 24 |
| Peak memory | 219264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3968293841 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.kmac_csr_aliasing.3968293841 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_csr_bit_bash.505850372 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 285200216 ps |
| CPU time | 13 seconds |
| Started | Aug 23 07:59:46 AM UTC 24 |
| Finished | Aug 23 08:00:00 AM UTC 24 |
| Peak memory | 219268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=505850372 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_ 2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.kmac_csr_bit_bash.505850372 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_csr_hw_reset.182101473 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 62481672 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 07:59:45 AM UTC 24 |
| Finished | Aug 23 07:59:47 AM UTC 24 |
| Peak memory | 228792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=182101473 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_ 2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.kmac_csr_hw_reset.182101473 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_csr_mem_rw_with_rand_reset.44536095 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 117014403 ps |
| CPU time | 2.07 seconds |
| Started | Aug 23 07:59:46 AM UTC 24 |
| Finished | Aug 23 07:59:50 AM UTC 24 |
| Peak memory | 231624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=44536095 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert - cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.kmac_csr_me m_rw_with_rand_reset.44536095 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_csr_rw.1297786296 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 28737543 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 07:59:45 AM UTC 24 |
| Finished | Aug 23 07:59:47 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1297786296 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.kmac_csr_rw.1297786296 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_mem_partial_access.2897029611 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 19590681 ps |
| CPU time | 1.12 seconds |
| Started | Aug 23 07:59:44 AM UTC 24 |
| Finished | Aug 23 07:59:46 AM UTC 24 |
| Peak memory | 228856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +cdc_instrumentation_enab led=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2897029611 -assert nopostp roc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_ regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.kmac_mem_partial_access.2897029611 +enable_mas king=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_mem_walk.2114913633 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 21107796 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 07:59:44 AM UTC 24 |
| Finished | Aug 23 07:59:45 AM UTC 24 |
| Peak memory | 218980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2114913633 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.kmac_mem_walk.2114913633 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_same_csr_outstanding.2173157893 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 105185291 ps |
| CPU time | 2.24 seconds |
| Started | Aug 23 07:59:46 AM UTC 24 |
| Finished | Aug 23 07:59:50 AM UTC 24 |
| Peak memory | 229504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2173157893 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.kmac_same_csr_outstanding.2173157893 +enable _masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_shadow_reg_errors_with_csr_rw.2587326565 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 46517711 ps |
| CPU time | 1.98 seconds |
| Started | Aug 23 07:59:42 AM UTC 24 |
| Finished | Aug 23 07:59:45 AM UTC 24 |
| Peak memory | 235872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2587326565 -ass ert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/ scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.kmac_shadow_reg_errors_with_csr_rw. 2587326565 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/0.kmac_tl_errors.2412559831 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 83680507 ps |
| CPU time | 1.24 seconds |
| Started | Aug 23 07:59:44 AM UTC 24 |
| Finished | Aug 23 07:59:46 AM UTC 24 |
| Peak memory | 228852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2412559831 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.kmac_tl_errors.2412559831 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_aliasing.2170898439 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 1008704955 ps |
| CPU time | 8.34 seconds |
| Started | Aug 23 07:59:52 AM UTC 24 |
| Finished | Aug 23 08:00:01 AM UTC 24 |
| Peak memory | 229504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2170898439 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.kmac_csr_aliasing.2170898439 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_bit_bash.2960753064 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 965154069 ps |
| CPU time | 16.88 seconds |
| Started | Aug 23 07:59:52 AM UTC 24 |
| Finished | Aug 23 08:00:10 AM UTC 24 |
| Peak memory | 219324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2960753064 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.kmac_csr_bit_bash.2960753064 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_hw_reset.59496504 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 19086004 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 07:59:51 AM UTC 24 |
| Finished | Aug 23 07:59:53 AM UTC 24 |
| Peak memory | 218976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=59496504 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2 024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.kmac_csr_hw_reset.59496504 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_mem_rw_with_rand_reset.3590608517 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 1252961771 ps |
| CPU time | 2.14 seconds |
| Started | Aug 23 07:59:53 AM UTC 24 |
| Finished | Aug 23 07:59:56 AM UTC 24 |
| Peak memory | 231620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=3590608517 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.kmac_csr_ mem_rw_with_rand_reset.3590608517 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_csr_rw.2729282338 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 19450032 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 07:59:52 AM UTC 24 |
| Finished | Aug 23 07:59:54 AM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2729282338 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.kmac_csr_rw.2729282338 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_mem_partial_access.845569906 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 119572835 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 07:59:50 AM UTC 24 |
| Finished | Aug 23 07:59:52 AM UTC 24 |
| Peak memory | 228860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +cdc_instrumentation_enab led=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=845569906 -assert nopostpr oc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_r egression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.kmac_mem_partial_access.845569906 +enable_maski ng=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_mem_walk.3282108916 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 11598213 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 07:59:48 AM UTC 24 |
| Finished | Aug 23 07:59:49 AM UTC 24 |
| Peak memory | 218920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3282108916 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.kmac_mem_walk.3282108916 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_same_csr_outstanding.3911239919 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 378559535 ps |
| CPU time | 2.35 seconds |
| Started | Aug 23 07:59:53 AM UTC 24 |
| Finished | Aug 23 07:59:56 AM UTC 24 |
| Peak memory | 229504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3911239919 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.kmac_same_csr_outstanding.3911239919 +enable _masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/1.kmac_shadow_reg_errors.1171209288 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 45824228 ps |
| CPU time | 1.08 seconds |
| Started | Aug 23 07:59:48 AM UTC 24 |
| Finished | Aug 23 07:59:50 AM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171209288 -assert nopostpr oc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_r egression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.kmac_shadow_reg_errors.1171209288 +enable_maski ng=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_csr_mem_rw_with_rand_reset.2434808929 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 82088884 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 08:00:35 AM UTC 24 |
| Finished | Aug 23 08:00:38 AM UTC 24 |
| Peak memory | 228756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=2434808929 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.kmac_csr _mem_rw_with_rand_reset.2434808929 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_csr_rw.2766466433 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 17391162 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 08:00:34 AM UTC 24 |
| Finished | Aug 23 08:00:36 AM UTC 24 |
| Peak memory | 218884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766466433 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.kmac_csr_rw.2766466433 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_intr_test.437686437 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 15019497 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 08:00:34 AM UTC 24 |
| Finished | Aug 23 08:00:36 AM UTC 24 |
| Peak memory | 218924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=437686437 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.kmac_intr_test.437686437 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_same_csr_outstanding.3656391812 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 27009149 ps |
| CPU time | 1.25 seconds |
| Started | Aug 23 08:00:35 AM UTC 24 |
| Finished | Aug 23 08:00:37 AM UTC 24 |
| Peak memory | 228852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656391812 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.kmac_same_csr_outstanding.3656391812 +enabl e_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_shadow_reg_errors.4194049323 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 96110075 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 08:00:33 AM UTC 24 |
| Finished | Aug 23 08:00:35 AM UTC 24 |
| Peak memory | 228688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4194049323 -assert nopostpr oc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_r egression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.kmac_shadow_reg_errors.4194049323 +enable_mask ing=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_shadow_reg_errors_with_csr_rw.412567279 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 44207465 ps |
| CPU time | 1.94 seconds |
| Started | Aug 23 08:00:33 AM UTC 24 |
| Finished | Aug 23 08:00:36 AM UTC 24 |
| Peak memory | 228868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=412567279 -asse rt nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/s cratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.kmac_shadow_reg_errors_with_csr_rw. 412567279 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/10.kmac_tl_errors.4092342889 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 218505096 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 08:00:33 AM UTC 24 |
| Finished | Aug 23 08:00:35 AM UTC 24 |
| Peak memory | 228856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4092342889 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.kmac_tl_errors.4092342889 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_csr_mem_rw_with_rand_reset.4000977229 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 88683210 ps |
| CPU time | 1.62 seconds |
| Started | Aug 23 08:00:37 AM UTC 24 |
| Finished | Aug 23 08:00:40 AM UTC 24 |
| Peak memory | 235724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=4000977229 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.kmac_csr _mem_rw_with_rand_reset.4000977229 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_csr_rw.2927865894 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 16442209 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 08:00:36 AM UTC 24 |
| Finished | Aug 23 08:00:38 AM UTC 24 |
| Peak memory | 218904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2927865894 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.kmac_csr_rw.2927865894 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_intr_test.3086602182 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 24568576 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 08:00:36 AM UTC 24 |
| Finished | Aug 23 08:00:38 AM UTC 24 |
| Peak memory | 218976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3086602182 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.kmac_intr_test.3086602182 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_same_csr_outstanding.900385406 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 236632073 ps |
| CPU time | 2.41 seconds |
| Started | Aug 23 08:00:36 AM UTC 24 |
| Finished | Aug 23 08:00:40 AM UTC 24 |
| Peak memory | 229540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=900385406 -assert nopost proc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os _regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.kmac_same_csr_outstanding.900385406 +enable_ masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_shadow_reg_errors.1162572028 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 91779219 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 08:00:35 AM UTC 24 |
| Finished | Aug 23 08:00:37 AM UTC 24 |
| Peak memory | 218612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1162572028 -assert nopostpr oc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_r egression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.kmac_shadow_reg_errors.1162572028 +enable_mask ing=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/11.kmac_shadow_reg_errors_with_csr_rw.2670645723 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 153323931 ps |
| CPU time | 2.02 seconds |
| Started | Aug 23 08:00:35 AM UTC 24 |
| Finished | Aug 23 08:00:38 AM UTC 24 |
| Peak memory | 236872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2670645723 -ass ert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/ scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.kmac_shadow_reg_errors_with_csr_rw .2670645723 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_csr_mem_rw_with_rand_reset.1682341091 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 61191542 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 08:00:41 AM UTC 24 |
| Finished | Aug 23 08:00:43 AM UTC 24 |
| Peak memory | 228860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=1682341091 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.kmac_csr _mem_rw_with_rand_reset.1682341091 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_csr_rw.3502103318 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 25043916 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 08:00:40 AM UTC 24 |
| Finished | Aug 23 08:00:41 AM UTC 24 |
| Peak memory | 218924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502103318 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.kmac_csr_rw.3502103318 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_intr_test.4162041005 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 12407435 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 08:00:39 AM UTC 24 |
| Finished | Aug 23 08:00:41 AM UTC 24 |
| Peak memory | 218976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162041005 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.kmac_intr_test.4162041005 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_same_csr_outstanding.3798718565 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 23550342 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 08:00:40 AM UTC 24 |
| Finished | Aug 23 08:00:42 AM UTC 24 |
| Peak memory | 228852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798718565 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.kmac_same_csr_outstanding.3798718565 +enabl e_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_shadow_reg_errors.816408745 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 220392623 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 08:00:38 AM UTC 24 |
| Finished | Aug 23 08:00:40 AM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=816408745 -assert nopostpro c +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.kmac_shadow_reg_errors.816408745 +enable_maskin g=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_shadow_reg_errors_with_csr_rw.1254467829 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 947371105 ps |
| CPU time | 2.36 seconds |
| Started | Aug 23 08:00:38 AM UTC 24 |
| Finished | Aug 23 08:00:42 AM UTC 24 |
| Peak memory | 236932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1254467829 -ass ert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/ scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.kmac_shadow_reg_errors_with_csr_rw .1254467829 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_tl_errors.1984600594 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 42299133 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 08:00:38 AM UTC 24 |
| Finished | Aug 23 08:00:41 AM UTC 24 |
| Peak memory | 228856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984600594 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.kmac_tl_errors.1984600594 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/12.kmac_tl_intg_err.745485286 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 1406144513 ps |
| CPU time | 4.23 seconds |
| Started | Aug 23 08:00:39 AM UTC 24 |
| Finished | Aug 23 08:00:45 AM UTC 24 |
| Peak memory | 233728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=745485286 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regressi on_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.kmac_tl_intg_err.745485286 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_csr_mem_rw_with_rand_reset.2421429888 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 90819103 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 08:00:43 AM UTC 24 |
| Finished | Aug 23 08:00:46 AM UTC 24 |
| Peak memory | 228860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=2421429888 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.kmac_csr _mem_rw_with_rand_reset.2421429888 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_csr_rw.1141752465 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 62775119 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 08:00:42 AM UTC 24 |
| Finished | Aug 23 08:00:44 AM UTC 24 |
| Peak memory | 218856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1141752465 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.kmac_csr_rw.1141752465 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_intr_test.1835961793 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 14350475 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 08:00:42 AM UTC 24 |
| Finished | Aug 23 08:00:44 AM UTC 24 |
| Peak memory | 218976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1835961793 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.kmac_intr_test.1835961793 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_same_csr_outstanding.4011350420 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 226752895 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 08:00:42 AM UTC 24 |
| Finished | Aug 23 08:00:45 AM UTC 24 |
| Peak memory | 228832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4011350420 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.kmac_same_csr_outstanding.4011350420 +enabl e_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_shadow_reg_errors.547517046 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 40157707 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 08:00:41 AM UTC 24 |
| Finished | Aug 23 08:00:43 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=547517046 -assert nopostpro c +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.kmac_shadow_reg_errors.547517046 +enable_maskin g=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_shadow_reg_errors_with_csr_rw.4117951132 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 28096097 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 08:00:41 AM UTC 24 |
| Finished | Aug 23 08:00:43 AM UTC 24 |
| Peak memory | 228868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4117951132 -ass ert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/ scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.kmac_shadow_reg_errors_with_csr_rw .4117951132 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_tl_errors.948073785 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 129293322 ps |
| CPU time | 3.35 seconds |
| Started | Aug 23 08:00:41 AM UTC 24 |
| Finished | Aug 23 08:00:45 AM UTC 24 |
| Peak memory | 229676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=948073785 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.kmac_tl_errors.948073785 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/13.kmac_tl_intg_err.1725188580 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 91040710 ps |
| CPU time | 3.58 seconds |
| Started | Aug 23 08:00:42 AM UTC 24 |
| Finished | Aug 23 08:00:47 AM UTC 24 |
| Peak memory | 219348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1725188580 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.kmac_tl_intg_err.1725188580 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_csr_mem_rw_with_rand_reset.1366074444 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 116631384 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 08:00:45 AM UTC 24 |
| Finished | Aug 23 08:00:48 AM UTC 24 |
| Peak memory | 228860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=1366074444 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.kmac_csr _mem_rw_with_rand_reset.1366074444 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_csr_rw.1987787084 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 121992637 ps |
| CPU time | 1 seconds |
| Started | Aug 23 08:00:45 AM UTC 24 |
| Finished | Aug 23 08:00:47 AM UTC 24 |
| Peak memory | 218884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1987787084 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.kmac_csr_rw.1987787084 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_intr_test.3595707698 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 29091180 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 08:00:45 AM UTC 24 |
| Finished | Aug 23 08:00:47 AM UTC 24 |
| Peak memory | 218976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595707698 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.kmac_intr_test.3595707698 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_same_csr_outstanding.194729797 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 76511049 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 08:00:45 AM UTC 24 |
| Finished | Aug 23 08:00:48 AM UTC 24 |
| Peak memory | 228856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=194729797 -assert nopost proc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os _regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.kmac_same_csr_outstanding.194729797 +enable_ masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_shadow_reg_errors.2995627143 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 50737325 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 08:00:43 AM UTC 24 |
| Finished | Aug 23 08:00:45 AM UTC 24 |
| Peak memory | 218736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2995627143 -assert nopostpr oc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_r egression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.kmac_shadow_reg_errors.2995627143 +enable_mask ing=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_shadow_reg_errors_with_csr_rw.1821182449 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 204317142 ps |
| CPU time | 2.49 seconds |
| Started | Aug 23 08:00:44 AM UTC 24 |
| Finished | Aug 23 08:00:48 AM UTC 24 |
| Peak memory | 236748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1821182449 -ass ert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/ scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.kmac_shadow_reg_errors_with_csr_rw .1821182449 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_tl_errors.3812236633 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 234713492 ps |
| CPU time | 1.82 seconds |
| Started | Aug 23 08:00:44 AM UTC 24 |
| Finished | Aug 23 08:00:47 AM UTC 24 |
| Peak memory | 228852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3812236633 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.kmac_tl_errors.3812236633 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/14.kmac_tl_intg_err.3751665141 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 166128499 ps |
| CPU time | 2.87 seconds |
| Started | Aug 23 08:00:44 AM UTC 24 |
| Finished | Aug 23 08:00:48 AM UTC 24 |
| Peak memory | 231556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3751665141 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.kmac_tl_intg_err.3751665141 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_csr_mem_rw_with_rand_reset.3505875575 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 93573063 ps |
| CPU time | 2.43 seconds |
| Started | Aug 23 08:00:49 AM UTC 24 |
| Finished | Aug 23 08:00:53 AM UTC 24 |
| Peak memory | 231620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=3505875575 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.kmac_csr _mem_rw_with_rand_reset.3505875575 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_csr_rw.5553672 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 69183244 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 08:00:47 AM UTC 24 |
| Finished | Aug 23 08:00:51 AM UTC 24 |
| Peak memory | 228864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=5553672 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.kmac_csr_rw.5553672 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_intr_test.1534192994 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 17743841 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 08:00:47 AM UTC 24 |
| Finished | Aug 23 08:00:50 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1534192994 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.kmac_intr_test.1534192994 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_same_csr_outstanding.471745580 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 61115457 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 08:00:49 AM UTC 24 |
| Finished | Aug 23 08:00:52 AM UTC 24 |
| Peak memory | 228888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=471745580 -assert nopost proc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os _regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.kmac_same_csr_outstanding.471745580 +enable_ masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_shadow_reg_errors.4086439303 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 70202803 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 08:00:45 AM UTC 24 |
| Finished | Aug 23 08:00:47 AM UTC 24 |
| Peak memory | 228852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086439303 -assert nopostpr oc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_r egression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.kmac_shadow_reg_errors.4086439303 +enable_mask ing=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_shadow_reg_errors_with_csr_rw.3093907555 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 292643316 ps |
| CPU time | 1.64 seconds |
| Started | Aug 23 08:00:46 AM UTC 24 |
| Finished | Aug 23 08:00:49 AM UTC 24 |
| Peak memory | 228784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3093907555 -ass ert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/ scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.kmac_shadow_reg_errors_with_csr_rw .3093907555 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_tl_errors.1574797775 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 74902551 ps |
| CPU time | 2.07 seconds |
| Started | Aug 23 08:00:46 AM UTC 24 |
| Finished | Aug 23 08:00:50 AM UTC 24 |
| Peak memory | 229628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1574797775 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.kmac_tl_errors.1574797775 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/15.kmac_tl_intg_err.3156996528 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 713895570 ps |
| CPU time | 4.35 seconds |
| Started | Aug 23 08:00:47 AM UTC 24 |
| Finished | Aug 23 08:00:54 AM UTC 24 |
| Peak memory | 219140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3156996528 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.kmac_tl_intg_err.3156996528 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_csr_mem_rw_with_rand_reset.3047198282 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 31567050 ps |
| CPU time | 1.7 seconds |
| Started | Aug 23 08:00:52 AM UTC 24 |
| Finished | Aug 23 08:00:55 AM UTC 24 |
| Peak memory | 230640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=3047198282 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.kmac_csr _mem_rw_with_rand_reset.3047198282 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_csr_rw.3657040392 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 19114445 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 08:00:51 AM UTC 24 |
| Finished | Aug 23 08:00:53 AM UTC 24 |
| Peak memory | 218612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3657040392 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.kmac_csr_rw.3657040392 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_intr_test.2741643541 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 15285334 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 08:00:51 AM UTC 24 |
| Finished | Aug 23 08:00:53 AM UTC 24 |
| Peak memory | 218408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2741643541 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.kmac_intr_test.2741643541 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_same_csr_outstanding.2207971713 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 508208019 ps |
| CPU time | 2.28 seconds |
| Started | Aug 23 08:00:52 AM UTC 24 |
| Finished | Aug 23 08:00:55 AM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2207971713 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.kmac_same_csr_outstanding.2207971713 +enabl e_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_shadow_reg_errors.576174884 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 76376710 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 08:00:49 AM UTC 24 |
| Finished | Aug 23 08:00:51 AM UTC 24 |
| Peak memory | 228716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=576174884 -assert nopostpro c +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.kmac_shadow_reg_errors.576174884 +enable_maskin g=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_shadow_reg_errors_with_csr_rw.3695395450 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 452305637 ps |
| CPU time | 2.46 seconds |
| Started | Aug 23 08:00:49 AM UTC 24 |
| Finished | Aug 23 08:00:53 AM UTC 24 |
| Peak memory | 229976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3695395450 -ass ert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/ scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.kmac_shadow_reg_errors_with_csr_rw .3695395450 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_tl_errors.2742819734 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 338447125 ps |
| CPU time | 2.12 seconds |
| Started | Aug 23 08:00:49 AM UTC 24 |
| Finished | Aug 23 08:00:52 AM UTC 24 |
| Peak memory | 229732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2742819734 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.kmac_tl_errors.2742819734 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/16.kmac_tl_intg_err.2308199655 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 730236145 ps |
| CPU time | 4.34 seconds |
| Started | Aug 23 08:00:49 AM UTC 24 |
| Finished | Aug 23 08:00:55 AM UTC 24 |
| Peak memory | 219396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2308199655 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.kmac_tl_intg_err.2308199655 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_csr_mem_rw_with_rand_reset.3094616073 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 144227365 ps |
| CPU time | 1.86 seconds |
| Started | Aug 23 08:00:55 AM UTC 24 |
| Finished | Aug 23 08:00:58 AM UTC 24 |
| Peak memory | 230908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=3094616073 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.kmac_csr _mem_rw_with_rand_reset.3094616073 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_csr_rw.2254930915 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 53228090 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 08:00:54 AM UTC 24 |
| Finished | Aug 23 08:00:56 AM UTC 24 |
| Peak memory | 218860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2254930915 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.kmac_csr_rw.2254930915 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_intr_test.3117175942 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 11243508 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 08:00:54 AM UTC 24 |
| Finished | Aug 23 08:00:56 AM UTC 24 |
| Peak memory | 218912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3117175942 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.kmac_intr_test.3117175942 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_same_csr_outstanding.152429140 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 55144706 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 08:00:54 AM UTC 24 |
| Finished | Aug 23 08:00:57 AM UTC 24 |
| Peak memory | 228828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=152429140 -assert nopost proc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os _regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.kmac_same_csr_outstanding.152429140 +enable_ masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_shadow_reg_errors.310069543 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 60877435 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 08:00:52 AM UTC 24 |
| Finished | Aug 23 08:00:54 AM UTC 24 |
| Peak memory | 218552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=310069543 -assert nopostpro c +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.kmac_shadow_reg_errors.310069543 +enable_maskin g=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_shadow_reg_errors_with_csr_rw.3473679089 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 489896374 ps |
| CPU time | 2.61 seconds |
| Started | Aug 23 08:00:53 AM UTC 24 |
| Finished | Aug 23 08:00:57 AM UTC 24 |
| Peak memory | 229916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3473679089 -ass ert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/ scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.kmac_shadow_reg_errors_with_csr_rw .3473679089 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_tl_errors.3398988669 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 334343018 ps |
| CPU time | 2.3 seconds |
| Started | Aug 23 08:00:53 AM UTC 24 |
| Finished | Aug 23 08:00:56 AM UTC 24 |
| Peak memory | 229668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398988669 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.kmac_tl_errors.3398988669 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/17.kmac_tl_intg_err.344004314 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 103168144 ps |
| CPU time | 3.28 seconds |
| Started | Aug 23 08:00:53 AM UTC 24 |
| Finished | Aug 23 08:00:57 AM UTC 24 |
| Peak memory | 229504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=344004314 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regressi on_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.kmac_tl_intg_err.344004314 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_csr_mem_rw_with_rand_reset.273256381 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 29672737 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 08:00:57 AM UTC 24 |
| Finished | Aug 23 08:01:00 AM UTC 24 |
| Peak memory | 228860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=273256381 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.kmac_csr_ mem_rw_with_rand_reset.273256381 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_csr_rw.643169289 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 44178586 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 08:00:56 AM UTC 24 |
| Finished | Aug 23 08:00:58 AM UTC 24 |
| Peak memory | 218880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=643169289 -assert nopostproc +UVM_TESTNAME =kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_0 8_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.kmac_csr_rw.643169289 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_intr_test.2881541670 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 17954151 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 08:00:56 AM UTC 24 |
| Finished | Aug 23 08:00:58 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881541670 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.kmac_intr_test.2881541670 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_same_csr_outstanding.2243061249 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 65738064 ps |
| CPU time | 1.77 seconds |
| Started | Aug 23 08:00:57 AM UTC 24 |
| Finished | Aug 23 08:01:00 AM UTC 24 |
| Peak memory | 228852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2243061249 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.kmac_same_csr_outstanding.2243061249 +enabl e_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_shadow_reg_errors.143794300 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 63989923 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 08:00:55 AM UTC 24 |
| Finished | Aug 23 08:00:57 AM UTC 24 |
| Peak memory | 228728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=143794300 -assert nopostpro c +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.kmac_shadow_reg_errors.143794300 +enable_maskin g=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_shadow_reg_errors_with_csr_rw.1408264965 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 132357306 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 08:00:55 AM UTC 24 |
| Finished | Aug 23 08:00:57 AM UTC 24 |
| Peak memory | 228784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1408264965 -ass ert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/ scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.kmac_shadow_reg_errors_with_csr_rw .1408264965 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_tl_errors.3549183566 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 131624360 ps |
| CPU time | 2.07 seconds |
| Started | Aug 23 08:00:55 AM UTC 24 |
| Finished | Aug 23 08:00:58 AM UTC 24 |
| Peak memory | 229692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549183566 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.kmac_tl_errors.3549183566 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/18.kmac_tl_intg_err.3161567560 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 209283730 ps |
| CPU time | 2.15 seconds |
| Started | Aug 23 08:00:56 AM UTC 24 |
| Finished | Aug 23 08:01:00 AM UTC 24 |
| Peak memory | 229568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3161567560 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.kmac_tl_intg_err.3161567560 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_csr_mem_rw_with_rand_reset.2253880851 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 246585476 ps |
| CPU time | 2.11 seconds |
| Started | Aug 23 08:00:59 AM UTC 24 |
| Finished | Aug 23 08:01:02 AM UTC 24 |
| Peak memory | 231604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=2253880851 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.kmac_csr _mem_rw_with_rand_reset.2253880851 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_csr_rw.385578425 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 30985592 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 08:00:59 AM UTC 24 |
| Finished | Aug 23 08:01:01 AM UTC 24 |
| Peak memory | 218672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=385578425 -assert nopostproc +UVM_TESTNAME =kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_0 8_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.kmac_csr_rw.385578425 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_intr_test.2485067329 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 38585729 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 08:00:59 AM UTC 24 |
| Finished | Aug 23 08:01:01 AM UTC 24 |
| Peak memory | 218912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485067329 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.kmac_intr_test.2485067329 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_same_csr_outstanding.4256732575 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 49331619 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 08:00:59 AM UTC 24 |
| Finished | Aug 23 08:01:01 AM UTC 24 |
| Peak memory | 228712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4256732575 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.kmac_same_csr_outstanding.4256732575 +enabl e_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_shadow_reg_errors.2238417696 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 20966287 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 08:00:57 AM UTC 24 |
| Finished | Aug 23 08:00:59 AM UTC 24 |
| Peak memory | 218736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238417696 -assert nopostpr oc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_r egression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.kmac_shadow_reg_errors.2238417696 +enable_mask ing=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_shadow_reg_errors_with_csr_rw.3608076383 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 111533979 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 08:00:57 AM UTC 24 |
| Finished | Aug 23 08:01:00 AM UTC 24 |
| Peak memory | 228592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608076383 -ass ert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/ scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.kmac_shadow_reg_errors_with_csr_rw .3608076383 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/19.kmac_tl_errors.548185734 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 1068804117 ps |
| CPU time | 2.53 seconds |
| Started | Aug 23 08:00:59 AM UTC 24 |
| Finished | Aug 23 08:01:03 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=548185734 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.kmac_tl_errors.548185734 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_csr_aliasing.1663929422 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 135262586 ps |
| CPU time | 6.45 seconds |
| Started | Aug 23 08:00:00 AM UTC 24 |
| Finished | Aug 23 08:00:08 AM UTC 24 |
| Peak memory | 219264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1663929422 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.kmac_csr_aliasing.1663929422 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_csr_bit_bash.1018821206 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 610452352 ps |
| CPU time | 7.08 seconds |
| Started | Aug 23 08:00:00 AM UTC 24 |
| Finished | Aug 23 08:00:08 AM UTC 24 |
| Peak memory | 219344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018821206 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.kmac_csr_bit_bash.1018821206 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_csr_hw_reset.2819727738 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 64043220 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 07:59:58 AM UTC 24 |
| Finished | Aug 23 08:00:00 AM UTC 24 |
| Peak memory | 218880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2819727738 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.kmac_csr_hw_reset.2819727738 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_csr_mem_rw_with_rand_reset.2268371884 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 37591991 ps |
| CPU time | 2.16 seconds |
| Started | Aug 23 08:00:01 AM UTC 24 |
| Finished | Aug 23 08:00:10 AM UTC 24 |
| Peak memory | 231244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=2268371884 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.kmac_csr_ mem_rw_with_rand_reset.2268371884 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_csr_rw.1649199208 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 42080911 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 08:00:00 AM UTC 24 |
| Finished | Aug 23 08:00:02 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1649199208 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.kmac_csr_rw.1649199208 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_intr_test.3329883093 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 36090753 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 07:59:58 AM UTC 24 |
| Finished | Aug 23 08:00:00 AM UTC 24 |
| Peak memory | 218972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329883093 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.kmac_intr_test.3329883093 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_mem_walk.2240013080 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 12655538 ps |
| CPU time | 0.65 seconds |
| Started | Aug 23 07:59:56 AM UTC 24 |
| Finished | Aug 23 07:59:58 AM UTC 24 |
| Peak memory | 218920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2240013080 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.kmac_mem_walk.2240013080 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_same_csr_outstanding.3237657030 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 84869748 ps |
| CPU time | 1.27 seconds |
| Started | Aug 23 08:00:01 AM UTC 24 |
| Finished | Aug 23 08:00:09 AM UTC 24 |
| Peak memory | 228060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3237657030 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.kmac_same_csr_outstanding.3237657030 +enable _masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_shadow_reg_errors.3725630953 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 44261734 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 07:59:54 AM UTC 24 |
| Finished | Aug 23 07:59:56 AM UTC 24 |
| Peak memory | 228788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3725630953 -assert nopostpr oc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_r egression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.kmac_shadow_reg_errors.3725630953 +enable_maski ng=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_shadow_reg_errors_with_csr_rw.2987509657 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 95258049 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 07:59:55 AM UTC 24 |
| Finished | Aug 23 07:59:57 AM UTC 24 |
| Peak memory | 228776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987509657 -ass ert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/ scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.kmac_shadow_reg_errors_with_csr_rw. 2987509657 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_tl_errors.690992080 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 83683708 ps |
| CPU time | 1.25 seconds |
| Started | Aug 23 07:59:57 AM UTC 24 |
| Finished | Aug 23 07:59:59 AM UTC 24 |
| Peak memory | 228796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=690992080 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.kmac_tl_errors.690992080 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/2.kmac_tl_intg_err.1427674603 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 186728312 ps |
| CPU time | 2.36 seconds |
| Started | Aug 23 07:59:57 AM UTC 24 |
| Finished | Aug 23 08:00:01 AM UTC 24 |
| Peak memory | 219268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427674603 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.kmac_tl_intg_err.1427674603 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/20.kmac_intr_test.1426655862 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 50466963 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 08:00:59 AM UTC 24 |
| Finished | Aug 23 08:01:01 AM UTC 24 |
| Peak memory | 218672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426655862 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 20.kmac_intr_test.1426655862 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/20.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/21.kmac_intr_test.499678662 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 22858502 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 08:01:00 AM UTC 24 |
| Finished | Aug 23 08:01:02 AM UTC 24 |
| Peak memory | 218984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=499678662 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 21.kmac_intr_test.499678662 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/21.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/22.kmac_intr_test.1415096264 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 11039314 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 08:01:00 AM UTC 24 |
| Finished | Aug 23 08:01:02 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1415096264 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 22.kmac_intr_test.1415096264 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/22.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/23.kmac_intr_test.3596052276 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 12368592 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 08:01:00 AM UTC 24 |
| Finished | Aug 23 08:01:02 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3596052276 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 23.kmac_intr_test.3596052276 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/23.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/24.kmac_intr_test.388865709 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 65268187 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 08:01:00 AM UTC 24 |
| Finished | Aug 23 08:01:02 AM UTC 24 |
| Peak memory | 218896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=388865709 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 24.kmac_intr_test.388865709 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/24.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/25.kmac_intr_test.355132275 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 26132067 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 08:01:00 AM UTC 24 |
| Finished | Aug 23 08:01:02 AM UTC 24 |
| Peak memory | 218924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=355132275 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 25.kmac_intr_test.355132275 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/25.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/26.kmac_intr_test.2136791122 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 13711576 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 08:01:02 AM UTC 24 |
| Finished | Aug 23 08:01:03 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2136791122 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 26.kmac_intr_test.2136791122 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/26.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/27.kmac_intr_test.2863931373 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 28399194 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 08:01:02 AM UTC 24 |
| Finished | Aug 23 08:01:03 AM UTC 24 |
| Peak memory | 218976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2863931373 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 27.kmac_intr_test.2863931373 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/27.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/28.kmac_intr_test.4096180787 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 25842606 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 08:01:02 AM UTC 24 |
| Finished | Aug 23 08:01:03 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4096180787 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 28.kmac_intr_test.4096180787 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/28.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/29.kmac_intr_test.84696216 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 33105843 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 08:01:02 AM UTC 24 |
| Finished | Aug 23 08:01:03 AM UTC 24 |
| Peak memory | 218924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=84696216 -assert nopostproc +UVM_TESTNAME=kma c_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 29.kmac_intr_test.84696216 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/29.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_csr_aliasing.3326253172 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 392281616 ps |
| CPU time | 8.16 seconds |
| Started | Aug 23 08:00:10 AM UTC 24 |
| Finished | Aug 23 08:00:19 AM UTC 24 |
| Peak memory | 219264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3326253172 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.kmac_csr_aliasing.3326253172 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_csr_bit_bash.1787940679 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 2877138742 ps |
| CPU time | 6.72 seconds |
| Started | Aug 23 08:00:10 AM UTC 24 |
| Finished | Aug 23 08:00:18 AM UTC 24 |
| Peak memory | 219472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1787940679 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.kmac_csr_bit_bash.1787940679 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_csr_hw_reset.1081226395 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 32279895 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 08:00:10 AM UTC 24 |
| Finished | Aug 23 08:00:12 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081226395 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.kmac_csr_hw_reset.1081226395 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_csr_mem_rw_with_rand_reset.1447102741 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 47382831 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 08:00:11 AM UTC 24 |
| Finished | Aug 23 08:00:13 AM UTC 24 |
| Peak memory | 228860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=1447102741 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.kmac_csr_ mem_rw_with_rand_reset.1447102741 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_csr_rw.1216366220 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 15187652 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 08:00:10 AM UTC 24 |
| Finished | Aug 23 08:00:12 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1216366220 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.kmac_csr_rw.1216366220 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_intr_test.1107579648 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 67540118 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 08:00:09 AM UTC 24 |
| Finished | Aug 23 08:00:11 AM UTC 24 |
| Peak memory | 218912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1107579648 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.kmac_intr_test.1107579648 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_mem_partial_access.1897152240 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 68813309 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 08:00:09 AM UTC 24 |
| Finished | Aug 23 08:00:11 AM UTC 24 |
| Peak memory | 228688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +cdc_instrumentation_enab led=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1897152240 -assert nopostp roc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_ regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.kmac_mem_partial_access.1897152240 +enable_mas king=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_mem_walk.1437984613 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 37641056 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 08:00:08 AM UTC 24 |
| Finished | Aug 23 08:00:09 AM UTC 24 |
| Peak memory | 218980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1437984613 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.kmac_mem_walk.1437984613 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_same_csr_outstanding.80959261 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 1597687383 ps |
| CPU time | 2.36 seconds |
| Started | Aug 23 08:00:11 AM UTC 24 |
| Finished | Aug 23 08:00:14 AM UTC 24 |
| Peak memory | 229504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=80959261 -assert nopostp roc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_ regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.kmac_same_csr_outstanding.80959261 +enable_mas king=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_shadow_reg_errors.334670946 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 87014102 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 08:00:01 AM UTC 24 |
| Finished | Aug 23 08:00:08 AM UTC 24 |
| Peak memory | 218552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=334670946 -assert nopostpro c +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.kmac_shadow_reg_errors.334670946 +enable_masking =0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_shadow_reg_errors_with_csr_rw.742566190 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 173092201 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 08:00:03 AM UTC 24 |
| Finished | Aug 23 08:00:09 AM UTC 24 |
| Peak memory | 228848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=742566190 -asse rt nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/s cratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.kmac_shadow_reg_errors_with_csr_rw.7 42566190 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/3.kmac_tl_intg_err.4081745557 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 110500452 ps |
| CPU time | 2.06 seconds |
| Started | Aug 23 08:00:09 AM UTC 24 |
| Finished | Aug 23 08:00:12 AM UTC 24 |
| Peak memory | 229508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4081745557 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.kmac_tl_intg_err.4081745557 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/30.kmac_intr_test.4055264090 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 58518649 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 08:01:03 AM UTC 24 |
| Finished | Aug 23 08:01:05 AM UTC 24 |
| Peak memory | 218976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4055264090 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 30.kmac_intr_test.4055264090 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/30.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/31.kmac_intr_test.3909276986 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 55188659 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 08:01:03 AM UTC 24 |
| Finished | Aug 23 08:01:05 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909276986 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 31.kmac_intr_test.3909276986 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/31.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/32.kmac_intr_test.2714663096 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 230441080 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 08:01:03 AM UTC 24 |
| Finished | Aug 23 08:01:05 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2714663096 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 32.kmac_intr_test.2714663096 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/32.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/33.kmac_intr_test.953648959 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 17618146 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 08:01:03 AM UTC 24 |
| Finished | Aug 23 08:01:05 AM UTC 24 |
| Peak memory | 218704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=953648959 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 33.kmac_intr_test.953648959 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/33.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/34.kmac_intr_test.1796475163 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 12990248 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 08:01:03 AM UTC 24 |
| Finished | Aug 23 08:01:05 AM UTC 24 |
| Peak memory | 218516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796475163 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 34.kmac_intr_test.1796475163 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/34.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/35.kmac_intr_test.410089250 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 10872166 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 08:01:03 AM UTC 24 |
| Finished | Aug 23 08:01:05 AM UTC 24 |
| Peak memory | 218984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=410089250 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 35.kmac_intr_test.410089250 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/35.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/36.kmac_intr_test.854380542 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 12051431 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 08:01:03 AM UTC 24 |
| Finished | Aug 23 08:01:05 AM UTC 24 |
| Peak memory | 218924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=854380542 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 36.kmac_intr_test.854380542 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/36.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/37.kmac_intr_test.1748343377 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 32683919 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 08:01:04 AM UTC 24 |
| Finished | Aug 23 08:01:06 AM UTC 24 |
| Peak memory | 218976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1748343377 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 37.kmac_intr_test.1748343377 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/37.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/38.kmac_intr_test.3733808939 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 20363632 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 08:01:04 AM UTC 24 |
| Finished | Aug 23 08:01:06 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3733808939 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 38.kmac_intr_test.3733808939 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/38.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/39.kmac_intr_test.4032818723 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 43870223 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 08:01:04 AM UTC 24 |
| Finished | Aug 23 08:01:06 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032818723 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 39.kmac_intr_test.4032818723 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/39.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_csr_aliasing.3361728197 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 135238300 ps |
| CPU time | 6.61 seconds |
| Started | Aug 23 08:00:16 AM UTC 24 |
| Finished | Aug 23 08:00:23 AM UTC 24 |
| Peak memory | 229568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3361728197 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.kmac_csr_aliasing.3361728197 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_csr_bit_bash.369341659 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 562729510 ps |
| CPU time | 8.06 seconds |
| Started | Aug 23 08:00:16 AM UTC 24 |
| Finished | Aug 23 08:00:25 AM UTC 24 |
| Peak memory | 219268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=369341659 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_ 2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.kmac_csr_bit_bash.369341659 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_csr_hw_reset.1628272571 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 43169421 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 08:00:16 AM UTC 24 |
| Finished | Aug 23 08:00:18 AM UTC 24 |
| Peak memory | 218680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1628272571 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression _2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.kmac_csr_hw_reset.1628272571 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_csr_mem_rw_with_rand_reset.567042579 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 214761299 ps |
| CPU time | 2.07 seconds |
| Started | Aug 23 08:00:17 AM UTC 24 |
| Finished | Aug 23 08:00:20 AM UTC 24 |
| Peak memory | 231688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=567042579 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.kmac_csr_m em_rw_with_rand_reset.567042579 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_csr_rw.3749004249 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 81886511 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 08:00:16 AM UTC 24 |
| Finished | Aug 23 08:00:18 AM UTC 24 |
| Peak memory | 218524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3749004249 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.kmac_csr_rw.3749004249 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_intr_test.4166376666 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 75694807 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 08:00:16 AM UTC 24 |
| Finished | Aug 23 08:00:17 AM UTC 24 |
| Peak memory | 218912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166376666 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.kmac_intr_test.4166376666 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_mem_partial_access.3033701032 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 153009939 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 08:00:13 AM UTC 24 |
| Finished | Aug 23 08:00:16 AM UTC 24 |
| Peak memory | 228856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +cdc_instrumentation_enab led=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3033701032 -assert nopostp roc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_ regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.kmac_mem_partial_access.3033701032 +enable_mas king=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_mem_walk.688215802 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 46560203 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 08:00:13 AM UTC 24 |
| Finished | Aug 23 08:00:15 AM UTC 24 |
| Peak memory | 218984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +cdc_instrumentation_enabled=1 +UVM _NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=688215802 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_ 2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.kmac_mem_walk.688215802 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_same_csr_outstanding.3287318934 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 49622280 ps |
| CPU time | 1.31 seconds |
| Started | Aug 23 08:00:17 AM UTC 24 |
| Finished | Aug 23 08:00:19 AM UTC 24 |
| Peak memory | 228856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3287318934 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.kmac_same_csr_outstanding.3287318934 +enable _masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_shadow_reg_errors.2740428286 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 81659681 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 08:00:12 AM UTC 24 |
| Finished | Aug 23 08:00:14 AM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2740428286 -assert nopostpr oc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_r egression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.kmac_shadow_reg_errors.2740428286 +enable_maski ng=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_shadow_reg_errors_with_csr_rw.1375475741 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 299577126 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 08:00:12 AM UTC 24 |
| Finished | Aug 23 08:00:15 AM UTC 24 |
| Peak memory | 228840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1375475741 -ass ert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/ scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.kmac_shadow_reg_errors_with_csr_rw. 1375475741 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_tl_errors.689063603 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 90525828 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 08:00:13 AM UTC 24 |
| Finished | Aug 23 08:00:16 AM UTC 24 |
| Peak memory | 228800 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=689063603 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.kmac_tl_errors.689063603 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/4.kmac_tl_intg_err.502934112 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 130685020 ps |
| CPU time | 2.49 seconds |
| Started | Aug 23 08:00:14 AM UTC 24 |
| Finished | Aug 23 08:00:18 AM UTC 24 |
| Peak memory | 219240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=502934112 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regressi on_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.kmac_tl_intg_err.502934112 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/40.kmac_intr_test.3258441896 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 45286474 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 08:01:04 AM UTC 24 |
| Finished | Aug 23 08:01:06 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3258441896 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 40.kmac_intr_test.3258441896 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/40.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/41.kmac_intr_test.3217849607 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 21727317 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 08:01:04 AM UTC 24 |
| Finished | Aug 23 08:01:06 AM UTC 24 |
| Peak memory | 218976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3217849607 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 41.kmac_intr_test.3217849607 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/41.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/42.kmac_intr_test.1800919211 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 11230622 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 08:01:05 AM UTC 24 |
| Finished | Aug 23 08:01:07 AM UTC 24 |
| Peak memory | 218656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800919211 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 42.kmac_intr_test.1800919211 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/42.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/43.kmac_intr_test.1600472987 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 44009358 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 08:01:05 AM UTC 24 |
| Finished | Aug 23 08:01:07 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1600472987 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 43.kmac_intr_test.1600472987 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/43.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/44.kmac_intr_test.933435189 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 21091524 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 08:01:05 AM UTC 24 |
| Finished | Aug 23 08:01:07 AM UTC 24 |
| Peak memory | 218856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=933435189 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 44.kmac_intr_test.933435189 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/44.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/45.kmac_intr_test.1872755697 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 132728609 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 08:01:05 AM UTC 24 |
| Finished | Aug 23 08:01:07 AM UTC 24 |
| Peak memory | 218976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1872755697 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 45.kmac_intr_test.1872755697 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/45.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/46.kmac_intr_test.3157460637 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 90099583 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 08:01:05 AM UTC 24 |
| Finished | Aug 23 08:01:07 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3157460637 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 46.kmac_intr_test.3157460637 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/46.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/47.kmac_intr_test.3828043095 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 247106629 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 08:01:05 AM UTC 24 |
| Finished | Aug 23 08:01:07 AM UTC 24 |
| Peak memory | 218656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3828043095 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 47.kmac_intr_test.3828043095 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/47.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/48.kmac_intr_test.1524499878 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 42588323 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 08:01:05 AM UTC 24 |
| Finished | Aug 23 08:01:07 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1524499878 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 48.kmac_intr_test.1524499878 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/48.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/49.kmac_intr_test.1851295389 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 14312158 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 08:01:05 AM UTC 24 |
| Finished | Aug 23 08:01:07 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851295389 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 49.kmac_intr_test.1851295389 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/49.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_csr_mem_rw_with_rand_reset.370544329 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 87256403 ps |
| CPU time | 1.66 seconds |
| Started | Aug 23 08:00:20 AM UTC 24 |
| Finished | Aug 23 08:00:23 AM UTC 24 |
| Peak memory | 228864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=370544329 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.kmac_csr_m em_rw_with_rand_reset.370544329 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_csr_rw.871709689 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 405910721 ps |
| CPU time | 1.04 seconds |
| Started | Aug 23 08:00:20 AM UTC 24 |
| Finished | Aug 23 08:00:22 AM UTC 24 |
| Peak memory | 218876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=871709689 -assert nopostproc +UVM_TESTNAME =kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_0 8_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.kmac_csr_rw.871709689 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_same_csr_outstanding.2757484565 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 145330679 ps |
| CPU time | 2.12 seconds |
| Started | Aug 23 08:00:20 AM UTC 24 |
| Finished | Aug 23 08:00:23 AM UTC 24 |
| Peak memory | 229564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2757484565 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.kmac_same_csr_outstanding.2757484565 +enable _masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_shadow_reg_errors.1792466214 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 19827777 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 08:00:18 AM UTC 24 |
| Finished | Aug 23 08:00:20 AM UTC 24 |
| Peak memory | 228092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792466214 -assert nopostpr oc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_r egression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.kmac_shadow_reg_errors.1792466214 +enable_maski ng=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_shadow_reg_errors_with_csr_rw.386539033 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 39715218 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 08:00:18 AM UTC 24 |
| Finished | Aug 23 08:00:20 AM UTC 24 |
| Peak memory | 228240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=386539033 -asse rt nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/s cratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.kmac_shadow_reg_errors_with_csr_rw.3 86539033 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_tl_errors.336586403 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 204629526 ps |
| CPU time | 2.58 seconds |
| Started | Aug 23 08:00:19 AM UTC 24 |
| Finished | Aug 23 08:00:23 AM UTC 24 |
| Peak memory | 229640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=336586403 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.kmac_tl_errors.336586403 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/5.kmac_tl_intg_err.3411424648 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 120623101 ps |
| CPU time | 2.1 seconds |
| Started | Aug 23 08:00:19 AM UTC 24 |
| Finished | Aug 23 08:00:22 AM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3411424648 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.kmac_tl_intg_err.3411424648 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/6.kmac_csr_mem_rw_with_rand_reset.2317546225 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 162374952 ps |
| CPU time | 2.28 seconds |
| Started | Aug 23 08:00:25 AM UTC 24 |
| Finished | Aug 23 08:00:28 AM UTC 24 |
| Peak memory | 231636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=2317546225 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.kmac_csr_ mem_rw_with_rand_reset.2317546225 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/6.kmac_csr_rw.884542064 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 56219347 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 08:00:23 AM UTC 24 |
| Finished | Aug 23 08:00:25 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=884542064 -assert nopostproc +UVM_TESTNAME =kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_0 8_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.kmac_csr_rw.884542064 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/6.kmac_intr_test.4145908402 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 14470226 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 08:00:23 AM UTC 24 |
| Finished | Aug 23 08:00:25 AM UTC 24 |
| Peak memory | 218912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4145908402 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.kmac_intr_test.4145908402 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/6.kmac_same_csr_outstanding.1864580741 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 292684499 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 08:00:23 AM UTC 24 |
| Finished | Aug 23 08:00:26 AM UTC 24 |
| Peak memory | 228860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1864580741 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.kmac_same_csr_outstanding.1864580741 +enable _masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/6.kmac_shadow_reg_errors.180655569 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 30345148 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 08:00:21 AM UTC 24 |
| Finished | Aug 23 08:00:23 AM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=180655569 -assert nopostpro c +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.kmac_shadow_reg_errors.180655569 +enable_masking =0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/6.kmac_shadow_reg_errors_with_csr_rw.1205967188 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 49926867 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 08:00:21 AM UTC 24 |
| Finished | Aug 23 08:00:24 AM UTC 24 |
| Peak memory | 228776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1205967188 -ass ert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/ scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.kmac_shadow_reg_errors_with_csr_rw. 1205967188 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/6.kmac_tl_errors.3238354008 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 402973648 ps |
| CPU time | 2.14 seconds |
| Started | Aug 23 08:00:21 AM UTC 24 |
| Finished | Aug 23 08:00:24 AM UTC 24 |
| Peak memory | 229688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3238354008 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.kmac_tl_errors.3238354008 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/6.kmac_tl_intg_err.1373056327 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 259449192 ps |
| CPU time | 3.59 seconds |
| Started | Aug 23 08:00:22 AM UTC 24 |
| Finished | Aug 23 08:00:27 AM UTC 24 |
| Peak memory | 229508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1373056327 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.kmac_tl_intg_err.1373056327 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_csr_mem_rw_with_rand_reset.1155134211 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 85418930 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 08:00:27 AM UTC 24 |
| Finished | Aug 23 08:00:29 AM UTC 24 |
| Peak memory | 228860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=1155134211 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.kmac_csr_ mem_rw_with_rand_reset.1155134211 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_csr_rw.1623665498 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 64882744 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 08:00:26 AM UTC 24 |
| Finished | Aug 23 08:00:28 AM UTC 24 |
| Peak memory | 228896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1623665498 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.kmac_csr_rw.1623665498 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_intr_test.1518113546 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 24511462 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 08:00:26 AM UTC 24 |
| Finished | Aug 23 08:00:27 AM UTC 24 |
| Peak memory | 218472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518113546 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.kmac_intr_test.1518113546 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_same_csr_outstanding.3482191344 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 129066664 ps |
| CPU time | 1.81 seconds |
| Started | Aug 23 08:00:26 AM UTC 24 |
| Finished | Aug 23 08:00:29 AM UTC 24 |
| Peak memory | 228896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3482191344 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.kmac_same_csr_outstanding.3482191344 +enable _masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_shadow_reg_errors.241126820 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 47704741 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 08:00:25 AM UTC 24 |
| Finished | Aug 23 08:00:27 AM UTC 24 |
| Peak memory | 228852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=241126820 -assert nopostpro c +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.kmac_shadow_reg_errors.241126820 +enable_masking =0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/7.kmac_tl_intg_err.2342709436 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 735206276 ps |
| CPU time | 4.09 seconds |
| Started | Aug 23 08:00:26 AM UTC 24 |
| Finished | Aug 23 08:00:31 AM UTC 24 |
| Peak memory | 218804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2342709436 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.kmac_tl_intg_err.2342709436 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_csr_mem_rw_with_rand_reset.1648273769 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 38178760 ps |
| CPU time | 2 seconds |
| Started | Aug 23 08:00:29 AM UTC 24 |
| Finished | Aug 23 08:00:32 AM UTC 24 |
| Peak memory | 230844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=1648273769 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.kmac_csr_ mem_rw_with_rand_reset.1648273769 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_csr_rw.2138106324 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 29219184 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 08:00:28 AM UTC 24 |
| Finished | Aug 23 08:00:30 AM UTC 24 |
| Peak memory | 218872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138106324 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.kmac_csr_rw.2138106324 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_intr_test.701277691 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 20155451 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 08:00:28 AM UTC 24 |
| Finished | Aug 23 08:00:30 AM UTC 24 |
| Peak memory | 218860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=701277691 -assert nopostproc +UVM_TESTNAME=km ac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.kmac_intr_test.701277691 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_same_csr_outstanding.3778395845 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 121495641 ps |
| CPU time | 2.23 seconds |
| Started | Aug 23 08:00:28 AM UTC 24 |
| Finished | Aug 23 08:00:32 AM UTC 24 |
| Peak memory | 229540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778395845 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.kmac_same_csr_outstanding.3778395845 +enable _masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_shadow_reg_errors.3641738220 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 82650894 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 08:00:27 AM UTC 24 |
| Finished | Aug 23 08:00:29 AM UTC 24 |
| Peak memory | 228792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3641738220 -assert nopostpr oc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_r egression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.kmac_shadow_reg_errors.3641738220 +enable_maski ng=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_shadow_reg_errors_with_csr_rw.1888337653 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 38867343 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 08:00:27 AM UTC 24 |
| Finished | Aug 23 08:00:30 AM UTC 24 |
| Peak memory | 228776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888337653 -ass ert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/ scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.kmac_shadow_reg_errors_with_csr_rw. 1888337653 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_tl_errors.1475398403 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 902789339 ps |
| CPU time | 3.21 seconds |
| Started | Aug 23 08:00:28 AM UTC 24 |
| Finished | Aug 23 08:00:32 AM UTC 24 |
| Peak memory | 229364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1475398403 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.kmac_tl_errors.1475398403 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/8.kmac_tl_intg_err.2684797689 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 398907295 ps |
| CPU time | 4.36 seconds |
| Started | Aug 23 08:00:28 AM UTC 24 |
| Finished | Aug 23 08:00:34 AM UTC 24 |
| Peak memory | 229264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2684797689 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.kmac_tl_intg_err.2684797689 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_csr_mem_rw_with_rand_reset.2317210407 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 61618980 ps |
| CPU time | 1.78 seconds |
| Started | Aug 23 08:00:33 AM UTC 24 |
| Finished | Aug 23 08:00:36 AM UTC 24 |
| Peak memory | 230808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=1000000000 0 +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_r andom_seed=2317210407 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.kmac_csr_ mem_rw_with_rand_reset.2317210407 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_csr_rw.2426400707 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 55774695 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 08:00:31 AM UTC 24 |
| Finished | Aug 23 08:00:32 AM UTC 24 |
| Peak memory | 218916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RE LNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2426400707 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.kmac_csr_rw.2426400707 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_intr_test.3221021823 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 11608925 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 08:00:31 AM UTC 24 |
| Finished | Aug 23 08:00:32 AM UTC 24 |
| Peak memory | 218912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_intr_test +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3221021823 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.kmac_intr_test.3221021823 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_same_csr_outstanding.4092832394 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 127561122 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 08:00:32 AM UTC 24 |
| Finished | Aug 23 08:00:34 AM UTC 24 |
| Peak memory | 228896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +cdc_instrumentation_en abled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4092832394 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.kmac_same_csr_outstanding.4092832394 +enable _masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_shadow_reg_errors.258087138 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 67640813 ps |
| CPU time | 1.04 seconds |
| Started | Aug 23 08:00:29 AM UTC 24 |
| Finished | Aug 23 08:00:31 AM UTC 24 |
| Peak memory | 228872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors +en_scb=0 +cdc_instrumentation_enabl ed=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=258087138 -assert nopostpro c +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.kmac_shadow_reg_errors.258087138 +enable_masking =0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_shadow_reg_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_shadow_reg_errors_with_csr_rw.713912438 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 229756882 ps |
| CPU time | 1.56 seconds |
| Started | Aug 23 08:00:30 AM UTC 24 |
| Finished | Aug 23 08:00:33 AM UTC 24 |
| Peak memory | 218572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_shadow_reg_errors_with_csr_rw +en_scb=0 +cdc_instrumen tation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=713912438 -asse rt nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/s cratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.kmac_shadow_reg_errors_with_csr_rw.7 13912438 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_shadow_reg_errors_with_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_tl_errors.1714828947 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 49928194 ps |
| CPU time | 3.06 seconds |
| Started | Aug 23 08:00:30 AM UTC 24 |
| Finished | Aug 23 08:00:35 AM UTC 24 |
| Peak memory | 229628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_errors +cdc_instrumentation_enabled=1 +UVM_NO_RELNO TES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1714828947 -assert nopostproc +UVM_TESTNAME=k mac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.kmac_tl_errors.1714828947 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top/9.kmac_tl_intg_err.3886488123 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 415650348 ps |
| CPU time | 2.54 seconds |
| Started | Aug 23 08:00:31 AM UTC 24 |
| Finished | Aug 23 08:00:34 AM UTC 24 |
| Peak memory | 229508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +cdc_instrumentation_enabled=1 + UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3886488123 -assert nopostproc +UV M_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.kmac_tl_intg_err.3886488123 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_app.400133530 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 7253665013 ps |
| CPU time | 149.01 seconds |
| Started | Aug 23 08:17:45 AM UTC 24 |
| Finished | Aug 23 08:20:17 AM UTC 24 |
| Peak memory | 305044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=400133530 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_app.400133530 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_burst_write.1482308116 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 8770304035 ps |
| CPU time | 363.48 seconds |
| Started | Aug 23 08:17:44 AM UTC 24 |
| Finished | Aug 23 08:23:52 AM UTC 24 |
| Peak memory | 247140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482308116 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_burst_write.1482308116 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_edn_timeout_error.1956983014 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 233151976 ps |
| CPU time | 15.77 seconds |
| Started | Aug 23 08:17:46 AM UTC 24 |
| Finished | Aug 23 08:18:03 AM UTC 24 |
| Peak memory | 232556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1956983014 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_edn_timeout_error.1956983014 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_entropy_ready_error.781236272 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 2014888935 ps |
| CPU time | 8.75 seconds |
| Started | Aug 23 08:17:46 AM UTC 24 |
| Finished | Aug 23 08:17:56 AM UTC 24 |
| Peak memory | 230508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=781236272 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_entropy_ready_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_u nmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_entropy_ready_error.781236272 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_entropy_ready_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_entropy_refresh.2290789030 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 4911883051 ps |
| CPU time | 160.94 seconds |
| Started | Aug 23 08:17:46 AM UTC 24 |
| Finished | Aug 23 08:20:30 AM UTC 24 |
| Peak memory | 311128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290789030 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_entropy_refresh.2290789030 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_error.806437591 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 12512090232 ps |
| CPU time | 213.16 seconds |
| Started | Aug 23 08:17:46 AM UTC 24 |
| Finished | Aug 23 08:21:22 AM UTC 24 |
| Peak memory | 491420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=806437591 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_error.806437591 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_key_error.2788948173 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 305394830 ps |
| CPU time | 2 seconds |
| Started | Aug 23 08:17:46 AM UTC 24 |
| Finished | Aug 23 08:17:49 AM UTC 24 |
| Peak memory | 229304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788948173 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_key_error.2788948173 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_lc_escalation.3737056811 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 104741698 ps |
| CPU time | 1.19 seconds |
| Started | Aug 23 08:17:46 AM UTC 24 |
| Finished | Aug 23 08:17:49 AM UTC 24 |
| Peak memory | 229968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3737056811 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_lc_escalation.3737056811 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_long_msg_and_output.4080027400 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 22862479678 ps |
| CPU time | 418.42 seconds |
| Started | Aug 23 08:17:42 AM UTC 24 |
| Finished | Aug 23 08:24:46 AM UTC 24 |
| Peak memory | 900448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4080027400 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_long_msg_and_output.4080027400 +enable_mas king=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_mubi.1335633439 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 37170586437 ps |
| CPU time | 162 seconds |
| Started | Aug 23 08:17:46 AM UTC 24 |
| Finished | Aug 23 08:20:31 AM UTC 24 |
| Peak memory | 384852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1335633439 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_mubi_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_mubi.1335633439 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_mubi/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_sec_cm.1616998682 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 5124168763 ps |
| CPU time | 55.6 seconds |
| Started | Aug 23 08:17:48 AM UTC 24 |
| Finished | Aug 23 08:18:45 AM UTC 24 |
| Peak memory | 294244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_R ELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1616998682 -assert nopostproc +UVM_TESTNA ME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_sec_cm.1616998682 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_sideload.1219624430 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 35787553668 ps |
| CPU time | 227.93 seconds |
| Started | Aug 23 08:17:42 AM UTC 24 |
| Finished | Aug 23 08:21:34 AM UTC 24 |
| Peak memory | 485112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1219624430 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_sideload.1219624430 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_smoke.2217701520 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 5792967062 ps |
| CPU time | 45.57 seconds |
| Started | Aug 23 08:17:42 AM UTC 24 |
| Finished | Aug 23 08:18:29 AM UTC 24 |
| Peak memory | 235344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217701520 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_smoke.2217701520 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_test_vectors_kmac.3298840055 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 153519024 ps |
| CPU time | 1.86 seconds |
| Started | Aug 23 08:17:44 AM UTC 24 |
| Finished | Aug 23 08:17:47 AM UTC 24 |
| Peak memory | 229788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3298840055 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_v ectors_kmac_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.kmac_test_vectors_kmac.3298840055 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_test_vectors_kmac/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_test_vectors_kmac_xof.1981929059 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 154278634 ps |
| CPU time | 1.88 seconds |
| Started | Aug 23 08:17:44 AM UTC 24 |
| Finished | Aug 23 08:17:47 AM UTC 24 |
| Peak memory | 230064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1981929059 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_v ectors_kmac_xof_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs /coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_test_vectors_kmac_xof.1981929059 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_test_vectors_kmac_xof/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_test_vectors_sha3_224.2905952790 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 44739253415 ps |
| CPU time | 50.04 seconds |
| Started | Aug 23 08:17:44 AM UTC 24 |
| Finished | Aug 23 08:18:35 AM UTC 24 |
| Peak memory | 257788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=224 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2905952790 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_test_vectors_sha3_224.2905952790 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_test_vectors_sha3_224/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_test_vectors_sha3_256.789571857 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 17003218141 ps |
| CPU time | 1301.57 seconds |
| Started | Aug 23 08:17:44 AM UTC 24 |
| Finished | Aug 23 08:39:39 AM UTC 24 |
| Peak memory | 1119508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=256 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=789571857 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/re po/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_test_vectors_sha3_256.789571857 + enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_test_vectors_sha3_256/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_test_vectors_sha3_384.4083183227 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 51909877730 ps |
| CPU time | 988.14 seconds |
| Started | Aug 23 08:17:44 AM UTC 24 |
| Finished | Aug 23 08:34:22 AM UTC 24 |
| Peak memory | 896276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=384 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4083183227 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_test_vectors_sha3_384.4083183227 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_test_vectors_sha3_384/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_test_vectors_sha3_512.3384050037 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 269616253 ps |
| CPU time | 11.63 seconds |
| Started | Aug 23 08:17:44 AM UTC 24 |
| Finished | Aug 23 08:17:56 AM UTC 24 |
| Peak memory | 228520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=512 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3384050037 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_test_vectors_sha3_512.3384050037 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_test_vectors_sha3_512/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_test_vectors_shake_128.1232108018 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 19334621711 ps |
| CPU time | 204.5 seconds |
| Started | Aug 23 08:17:44 AM UTC 24 |
| Finished | Aug 23 08:21:11 AM UTC 24 |
| Peak memory | 282640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_shake_variant=128 +cdc_instrumentation _enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232108018 -assert no postproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_shake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces /repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_test_vectors_shake_128.1232108 018 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_test_vectors_shake_128/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/0.kmac_test_vectors_shake_256.632892156 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 127592378628 ps |
| CPU time | 1766.5 seconds |
| Started | Aug 23 08:17:44 AM UTC 24 |
| Finished | Aug 23 08:47:27 AM UTC 24 |
| Peak memory | 3044628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_shake_variant=256 +cdc_instrumentation _enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=632892156 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_shake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/ repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.kmac_test_vectors_shake_256.63289215 6 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/0.kmac_test_vectors_shake_256/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_alert_test.2347771478 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 20331482 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 08:18:44 AM UTC 24 |
| Finished | Aug 23 08:18:46 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347771478 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_alert_test.2347771478 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_app.401740438 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 1446272950 ps |
| CPU time | 16.88 seconds |
| Started | Aug 23 08:18:08 AM UTC 24 |
| Finished | Aug 23 08:18:26 AM UTC 24 |
| Peak memory | 241412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=401740438 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_app.401740438 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_app_with_partial_data.1930477122 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 60189345782 ps |
| CPU time | 253.55 seconds |
| Started | Aug 23 08:18:09 AM UTC 24 |
| Finished | Aug 23 08:22:27 AM UTC 24 |
| Peak memory | 452444 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1930477122 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_with_partial_data_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_app_with_partial_data.1930477122 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_app_with_partial_data/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_burst_write.3691166598 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 31205303358 ps |
| CPU time | 794.62 seconds |
| Started | Aug 23 08:17:53 AM UTC 24 |
| Finished | Aug 23 08:31:17 AM UTC 24 |
| Peak memory | 268172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3691166598 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_burst_write.3691166598 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_edn_timeout_error.3247415540 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 1151142075 ps |
| CPU time | 24.98 seconds |
| Started | Aug 23 08:18:19 AM UTC 24 |
| Finished | Aug 23 08:18:45 AM UTC 24 |
| Peak memory | 232568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247415540 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_edn_timeout_error.3247415540 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_entropy_mode_error.2375997225 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 9359732954 ps |
| CPU time | 32.89 seconds |
| Started | Aug 23 08:18:26 AM UTC 24 |
| Finished | Aug 23 08:19:00 AM UTC 24 |
| Peak memory | 235276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2375997225 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_entropy_mode_error.2375997225 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_entropy_refresh.2854093854 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 20019810726 ps |
| CPU time | 134.29 seconds |
| Started | Aug 23 08:18:11 AM UTC 24 |
| Finished | Aug 23 08:20:28 AM UTC 24 |
| Peak memory | 296780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2854093854 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_entropy_refresh.2854093854 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_lc_escalation.1786679219 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 28312007 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 08:18:30 AM UTC 24 |
| Finished | Aug 23 08:18:32 AM UTC 24 |
| Peak memory | 229804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1786679219 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_lc_escalation.1786679219 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_long_msg_and_output.4022601861 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 138110232610 ps |
| CPU time | 1861.98 seconds |
| Started | Aug 23 08:17:51 AM UTC 24 |
| Finished | Aug 23 08:49:12 AM UTC 24 |
| Peak memory | 1636244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4022601861 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_long_msg_and_output.4022601861 +enable_mas king=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_mubi.225140628 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 6435166951 ps |
| CPU time | 112.61 seconds |
| Started | Aug 23 08:18:11 AM UTC 24 |
| Finished | Aug 23 08:20:06 AM UTC 24 |
| Peak memory | 342172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=225140628 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_mubi_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs /coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_mubi.225140628 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_mubi/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_sideload.894683014 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 31434514784 ps |
| CPU time | 175.25 seconds |
| Started | Aug 23 08:17:51 AM UTC 24 |
| Finished | Aug 23 08:20:49 AM UTC 24 |
| Peak memory | 323604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=894683014 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regressi on_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_sideload.894683014 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_smoke.402960447 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 1007604753 ps |
| CPU time | 4.39 seconds |
| Started | Aug 23 08:17:51 AM UTC 24 |
| Finished | Aug 23 08:17:57 AM UTC 24 |
| Peak memory | 230572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=402960447 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_smoke.402960447 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_stress_all.517899381 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 82529944963 ps |
| CPU time | 533.27 seconds |
| Started | Aug 23 08:18:33 AM UTC 24 |
| Finished | Aug 23 08:27:33 AM UTC 24 |
| Peak memory | 677892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=517899381 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scrat ch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_stress_all.517899381 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_test_vectors_kmac.3347334174 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 97967373 ps |
| CPU time | 2.28 seconds |
| Started | Aug 23 08:18:04 AM UTC 24 |
| Finished | Aug 23 08:18:07 AM UTC 24 |
| Peak memory | 230640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3347334174 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_v ectors_kmac_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.kmac_test_vectors_kmac.3347334174 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_test_vectors_kmac/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_test_vectors_kmac_xof.3879476096 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 30316174 ps |
| CPU time | 1.83 seconds |
| Started | Aug 23 08:18:06 AM UTC 24 |
| Finished | Aug 23 08:18:09 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3879476096 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_v ectors_kmac_xof_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs /coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_test_vectors_kmac_xof.3879476096 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_test_vectors_kmac_xof/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_test_vectors_sha3_256.1815607313 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 9911812242 ps |
| CPU time | 45.44 seconds |
| Started | Aug 23 08:17:56 AM UTC 24 |
| Finished | Aug 23 08:18:43 AM UTC 24 |
| Peak memory | 253644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=256 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815607313 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_test_vectors_sha3_256.1815607313 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_test_vectors_sha3_256/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_test_vectors_sha3_384.2217435297 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 1536177558 ps |
| CPU time | 18.96 seconds |
| Started | Aug 23 08:17:57 AM UTC 24 |
| Finished | Aug 23 08:18:18 AM UTC 24 |
| Peak memory | 228144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=384 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217435297 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_test_vectors_sha3_384.2217435297 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_test_vectors_sha3_384/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_test_vectors_sha3_512.1279291659 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 1957572706 ps |
| CPU time | 12.49 seconds |
| Started | Aug 23 08:17:57 AM UTC 24 |
| Finished | Aug 23 08:18:11 AM UTC 24 |
| Peak memory | 230424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=512 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1279291659 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_test_vectors_sha3_512.1279291659 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_test_vectors_sha3_512/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_test_vectors_shake_128.389461769 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 12541768287 ps |
| CPU time | 194.35 seconds |
| Started | Aug 23 08:17:58 AM UTC 24 |
| Finished | Aug 23 08:21:16 AM UTC 24 |
| Peak memory | 280272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_shake_variant=128 +cdc_instrumentation _enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=389461769 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_shake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/ repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_test_vectors_shake_128.38946176 9 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_test_vectors_shake_128/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/1.kmac_test_vectors_shake_256.2585061114 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 5777798690 ps |
| CPU time | 83.04 seconds |
| Started | Aug 23 08:18:01 AM UTC 24 |
| Finished | Aug 23 08:19:26 AM UTC 24 |
| Peak memory | 261832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_shake_variant=256 +cdc_instrumentation _enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585061114 -assert no postproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_shake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces /repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.kmac_test_vectors_shake_256.2585061 114 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/1.kmac_test_vectors_shake_256/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/10.kmac_alert_test.1040961103 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 73994189 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 08:38:46 AM UTC 24 |
| Finished | Aug 23 08:38:48 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040961103 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.kmac_alert_test.1040961103 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/10.kmac_app.55350857 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 1717362175 ps |
| CPU time | 107.31 seconds |
| Started | Aug 23 08:37:50 AM UTC 24 |
| Finished | Aug 23 08:39:40 AM UTC 24 |
| Peak memory | 288140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=55350857 -assert nopostproc +UVM_TEST NAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.kmac_app.55350857 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/10.kmac_burst_write.803734855 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 11263191879 ps |
| CPU time | 387.77 seconds |
| Started | Aug 23 08:37:50 AM UTC 24 |
| Finished | Aug 23 08:44:23 AM UTC 24 |
| Peak memory | 249300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=803734855 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.kmac_burst_write.803734855 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/10.kmac_edn_timeout_error.914063089 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 663545630 ps |
| CPU time | 14.21 seconds |
| Started | Aug 23 08:38:33 AM UTC 24 |
| Finished | Aug 23 08:38:48 AM UTC 24 |
| Peak memory | 228648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=914063089 -assert nopostproc +UVM_TESTNAME=kmac_base_tes t +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.kmac_edn_timeout_error.914063089 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/10.kmac_entropy_mode_error.1256139888 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 2828998463 ps |
| CPU time | 26.95 seconds |
| Started | Aug 23 08:38:35 AM UTC 24 |
| Finished | Aug 23 08:39:03 AM UTC 24 |
| Peak memory | 235168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1256139888 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.kmac_entropy_mode_error.1256139888 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/10.kmac_entropy_refresh.4280834592 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 7948685255 ps |
| CPU time | 239.06 seconds |
| Started | Aug 23 08:37:52 AM UTC 24 |
| Finished | Aug 23 08:41:55 AM UTC 24 |
| Peak memory | 354200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4280834592 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.kmac_entropy_refresh.4280834592 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/10.kmac_error.4105020686 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 5083145403 ps |
| CPU time | 76.03 seconds |
| Started | Aug 23 08:38:15 AM UTC 24 |
| Finished | Aug 23 08:39:33 AM UTC 24 |
| Peak memory | 282388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105020686 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 10.kmac_error.4105020686 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/10.kmac_key_error.515432941 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 1413120760 ps |
| CPU time | 4.02 seconds |
| Started | Aug 23 08:38:29 AM UTC 24 |
| Finished | Aug 23 08:38:34 AM UTC 24 |
| Peak memory | 230516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=515432941 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.kmac_key_error.515432941 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/10.kmac_lc_escalation.1242366074 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 38679064 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 08:38:43 AM UTC 24 |
| Finished | Aug 23 08:38:46 AM UTC 24 |
| Peak memory | 229840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242366074 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.kmac_lc_escalation.1242366074 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/10.kmac_long_msg_and_output.1929328534 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 57637447851 ps |
| CPU time | 1739.39 seconds |
| Started | Aug 23 08:37:43 AM UTC 24 |
| Finished | Aug 23 09:06:59 AM UTC 24 |
| Peak memory | 2807584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1929328534 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.kmac_long_msg_and_output.1929328534 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/10.kmac_sideload.3552953483 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 16273181181 ps |
| CPU time | 103.6 seconds |
| Started | Aug 23 08:37:47 AM UTC 24 |
| Finished | Aug 23 08:39:33 AM UTC 24 |
| Peak memory | 343916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3552953483 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.kmac_sideload.3552953483 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/10.kmac_smoke.3024297531 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 419781875 ps |
| CPU time | 7 seconds |
| Started | Aug 23 08:37:43 AM UTC 24 |
| Finished | Aug 23 08:37:52 AM UTC 24 |
| Peak memory | 230628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3024297531 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 10.kmac_smoke.3024297531 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/10.kmac_stress_all.934125111 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 39304777652 ps |
| CPU time | 551.3 seconds |
| Started | Aug 23 08:38:44 AM UTC 24 |
| Finished | Aug 23 08:48:02 AM UTC 24 |
| Peak memory | 839912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=934125111 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scrat ch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.kmac_stress_all.934125111 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/10.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/11.kmac_alert_test.3103570400 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 16882975 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 08:39:40 AM UTC 24 |
| Finished | Aug 23 08:39:42 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3103570400 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.kmac_alert_test.3103570400 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/11.kmac_app.751022216 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 429636150 ps |
| CPU time | 7.71 seconds |
| Started | Aug 23 08:39:14 AM UTC 24 |
| Finished | Aug 23 08:39:22 AM UTC 24 |
| Peak memory | 234632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=751022216 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.kmac_app.751022216 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/11.kmac_burst_write.1948424056 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 102988789922 ps |
| CPU time | 379 seconds |
| Started | Aug 23 08:39:08 AM UTC 24 |
| Finished | Aug 23 08:45:31 AM UTC 24 |
| Peak memory | 249620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1948424056 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.kmac_burst_write.1948424056 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/11.kmac_edn_timeout_error.3544499198 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 1997588689 ps |
| CPU time | 16.89 seconds |
| Started | Aug 23 08:39:31 AM UTC 24 |
| Finished | Aug 23 08:39:49 AM UTC 24 |
| Peak memory | 232504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3544499198 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.kmac_edn_timeout_error.3544499198 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/11.kmac_entropy_mode_error.1067497170 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 989065892 ps |
| CPU time | 16.33 seconds |
| Started | Aug 23 08:39:34 AM UTC 24 |
| Finished | Aug 23 08:39:51 AM UTC 24 |
| Peak memory | 235088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1067497170 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.kmac_entropy_mode_error.1067497170 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/11.kmac_entropy_refresh.1254638618 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 242409417 ps |
| CPU time | 7.37 seconds |
| Started | Aug 23 08:39:16 AM UTC 24 |
| Finished | Aug 23 08:39:24 AM UTC 24 |
| Peak memory | 232940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1254638618 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.kmac_entropy_refresh.1254638618 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/11.kmac_error.3001405274 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 631509683 ps |
| CPU time | 41.2 seconds |
| Started | Aug 23 08:39:23 AM UTC 24 |
| Finished | Aug 23 08:40:05 AM UTC 24 |
| Peak memory | 251672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3001405274 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 11.kmac_error.3001405274 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/11.kmac_key_error.2700757002 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 921740328 ps |
| CPU time | 4.65 seconds |
| Started | Aug 23 08:39:25 AM UTC 24 |
| Finished | Aug 23 08:39:31 AM UTC 24 |
| Peak memory | 230516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2700757002 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.kmac_key_error.2700757002 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/11.kmac_long_msg_and_output.37667995 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 4062553713 ps |
| CPU time | 310.06 seconds |
| Started | Aug 23 08:38:49 AM UTC 24 |
| Finished | Aug 23 08:44:03 AM UTC 24 |
| Peak memory | 489236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=37667995 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.kmac_long_msg_and_output.37667995 +enable_maskin g=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/11.kmac_sideload.1098770448 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 2523288829 ps |
| CPU time | 161.32 seconds |
| Started | Aug 23 08:39:05 AM UTC 24 |
| Finished | Aug 23 08:41:48 AM UTC 24 |
| Peak memory | 313104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1098770448 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.kmac_sideload.1098770448 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/11.kmac_smoke.435473334 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 2418732947 ps |
| CPU time | 23.69 seconds |
| Started | Aug 23 08:38:48 AM UTC 24 |
| Finished | Aug 23 08:39:13 AM UTC 24 |
| Peak memory | 230644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=435473334 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 11.kmac_smoke.435473334 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/11.kmac_stress_all.688388620 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 106474348976 ps |
| CPU time | 1408.81 seconds |
| Started | Aug 23 08:39:39 AM UTC 24 |
| Finished | Aug 23 09:03:22 AM UTC 24 |
| Peak memory | 1103636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=688388620 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scrat ch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.kmac_stress_all.688388620 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/11.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/12.kmac_alert_test.4108203741 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 17940932 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 08:41:09 AM UTC 24 |
| Finished | Aug 23 08:41:11 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4108203741 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.kmac_alert_test.4108203741 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/12.kmac_app.3276795178 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 24460623799 ps |
| CPU time | 260.67 seconds |
| Started | Aug 23 08:39:55 AM UTC 24 |
| Finished | Aug 23 08:44:20 AM UTC 24 |
| Peak memory | 485140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3276795178 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.kmac_app.3276795178 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/12.kmac_burst_write.3383700887 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 26635140162 ps |
| CPU time | 409.75 seconds |
| Started | Aug 23 08:39:52 AM UTC 24 |
| Finished | Aug 23 08:46:47 AM UTC 24 |
| Peak memory | 255840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383700887 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.kmac_burst_write.3383700887 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/12.kmac_edn_timeout_error.3630644455 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 388928761 ps |
| CPU time | 8.99 seconds |
| Started | Aug 23 08:40:45 AM UTC 24 |
| Finished | Aug 23 08:40:55 AM UTC 24 |
| Peak memory | 235216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3630644455 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.kmac_edn_timeout_error.3630644455 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/12.kmac_entropy_mode_error.1201202365 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 207103737 ps |
| CPU time | 12.24 seconds |
| Started | Aug 23 08:40:55 AM UTC 24 |
| Finished | Aug 23 08:41:08 AM UTC 24 |
| Peak memory | 235084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1201202365 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.kmac_entropy_mode_error.1201202365 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/12.kmac_entropy_refresh.3801504876 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 4360838344 ps |
| CPU time | 150.46 seconds |
| Started | Aug 23 08:40:06 AM UTC 24 |
| Finished | Aug 23 08:42:39 AM UTC 24 |
| Peak memory | 311048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3801504876 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.kmac_entropy_refresh.3801504876 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/12.kmac_error.2063138454 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 389091294 ps |
| CPU time | 23.03 seconds |
| Started | Aug 23 08:40:30 AM UTC 24 |
| Finished | Aug 23 08:40:54 AM UTC 24 |
| Peak memory | 251604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2063138454 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 12.kmac_error.2063138454 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/12.kmac_key_error.2244248343 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 414516527 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 08:40:42 AM UTC 24 |
| Finished | Aug 23 08:40:43 AM UTC 24 |
| Peak memory | 229776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2244248343 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.kmac_key_error.2244248343 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/12.kmac_lc_escalation.1907038349 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 25739080 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 08:40:56 AM UTC 24 |
| Finished | Aug 23 08:40:58 AM UTC 24 |
| Peak memory | 229668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907038349 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.kmac_lc_escalation.1907038349 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/12.kmac_long_msg_and_output.643842256 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 1971227956 ps |
| CPU time | 152.49 seconds |
| Started | Aug 23 08:39:49 AM UTC 24 |
| Finished | Aug 23 08:42:24 AM UTC 24 |
| Peak memory | 352016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=643842256 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.kmac_long_msg_and_output.643842256 +enable_mask ing=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/12.kmac_sideload.2061012438 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 3479400321 ps |
| CPU time | 229.52 seconds |
| Started | Aug 23 08:39:50 AM UTC 24 |
| Finished | Aug 23 08:43:43 AM UTC 24 |
| Peak memory | 356192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2061012438 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.kmac_sideload.2061012438 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/12.kmac_smoke.3830097281 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 12518376717 ps |
| CPU time | 45.36 seconds |
| Started | Aug 23 08:39:42 AM UTC 24 |
| Finished | Aug 23 08:40:29 AM UTC 24 |
| Peak memory | 232748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830097281 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 12.kmac_smoke.3830097281 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/12.kmac_stress_all.2007914761 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 2660092204 ps |
| CPU time | 30.37 seconds |
| Started | Aug 23 08:40:59 AM UTC 24 |
| Finished | Aug 23 08:41:30 AM UTC 24 |
| Peak memory | 243476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2007914761 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.kmac_stress_all.2007914761 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/12.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/13.kmac_alert_test.3193764816 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 18104064 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 08:43:05 AM UTC 24 |
| Finished | Aug 23 08:43:06 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3193764816 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.kmac_alert_test.3193764816 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/13.kmac_app.3356252527 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 8584244785 ps |
| CPU time | 73.35 seconds |
| Started | Aug 23 08:41:49 AM UTC 24 |
| Finished | Aug 23 08:43:04 AM UTC 24 |
| Peak memory | 300900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3356252527 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.kmac_app.3356252527 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/13.kmac_burst_write.293713844 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 46514755340 ps |
| CPU time | 759.62 seconds |
| Started | Aug 23 08:41:31 AM UTC 24 |
| Finished | Aug 23 08:54:19 AM UTC 24 |
| Peak memory | 270172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=293713844 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.kmac_burst_write.293713844 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/13.kmac_edn_timeout_error.194029786 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 3949388489 ps |
| CPU time | 22.75 seconds |
| Started | Aug 23 08:42:45 AM UTC 24 |
| Finished | Aug 23 08:43:09 AM UTC 24 |
| Peak memory | 235404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=194029786 -assert nopostproc +UVM_TESTNAME=kmac_base_tes t +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.kmac_edn_timeout_error.194029786 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/13.kmac_entropy_mode_error.1451181172 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 571462957 ps |
| CPU time | 3.47 seconds |
| Started | Aug 23 08:42:50 AM UTC 24 |
| Finished | Aug 23 08:42:54 AM UTC 24 |
| Peak memory | 228392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1451181172 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.kmac_entropy_mode_error.1451181172 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/13.kmac_entropy_refresh.181879093 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 39083119450 ps |
| CPU time | 148.63 seconds |
| Started | Aug 23 08:41:55 AM UTC 24 |
| Finished | Aug 23 08:44:26 AM UTC 24 |
| Peak memory | 356164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=181879093 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_reg ression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.kmac_entropy_refresh.181879093 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/13.kmac_error.1221125995 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 69630365026 ps |
| CPU time | 373.95 seconds |
| Started | Aug 23 08:42:24 AM UTC 24 |
| Finished | Aug 23 08:48:43 AM UTC 24 |
| Peak memory | 645020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1221125995 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 13.kmac_error.1221125995 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/13.kmac_key_error.120694570 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 1624443346 ps |
| CPU time | 7.33 seconds |
| Started | Aug 23 08:42:41 AM UTC 24 |
| Finished | Aug 23 08:42:49 AM UTC 24 |
| Peak memory | 230376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=120694570 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.kmac_key_error.120694570 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/13.kmac_lc_escalation.2809857576 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 116073870 ps |
| CPU time | 1.13 seconds |
| Started | Aug 23 08:42:55 AM UTC 24 |
| Finished | Aug 23 08:42:57 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2809857576 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.kmac_lc_escalation.2809857576 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/13.kmac_long_msg_and_output.1933787350 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 138084258924 ps |
| CPU time | 1396.59 seconds |
| Started | Aug 23 08:41:24 AM UTC 24 |
| Finished | Aug 23 09:04:55 AM UTC 24 |
| Peak memory | 2258760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1933787350 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.kmac_long_msg_and_output.1933787350 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/13.kmac_sideload.1723653915 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 29377314531 ps |
| CPU time | 230.13 seconds |
| Started | Aug 23 08:41:25 AM UTC 24 |
| Finished | Aug 23 08:45:18 AM UTC 24 |
| Peak memory | 348060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723653915 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.kmac_sideload.1723653915 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/13.kmac_smoke.3022717162 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 585994339 ps |
| CPU time | 11.04 seconds |
| Started | Aug 23 08:41:12 AM UTC 24 |
| Finished | Aug 23 08:41:24 AM UTC 24 |
| Peak memory | 230632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3022717162 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 13.kmac_smoke.3022717162 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/13.kmac_stress_all.1290640518 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 113396635686 ps |
| CPU time | 1566.22 seconds |
| Started | Aug 23 08:42:58 AM UTC 24 |
| Finished | Aug 23 09:09:20 AM UTC 24 |
| Peak memory | 1286236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1290640518 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.kmac_stress_all.1290640518 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/13.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/14.kmac_alert_test.868285128 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 70542043 ps |
| CPU time | 0.65 seconds |
| Started | Aug 23 08:44:33 AM UTC 24 |
| Finished | Aug 23 08:44:34 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=868285128 -assert nopostproc +UVM_TESTNA ME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.kmac_alert_test.868285128 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/14.kmac_app.2860116139 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 884030077 ps |
| CPU time | 47.92 seconds |
| Started | Aug 23 08:43:44 AM UTC 24 |
| Finished | Aug 23 08:44:34 AM UTC 24 |
| Peak memory | 253644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2860116139 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.kmac_app.2860116139 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/14.kmac_burst_write.2784104398 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 7213789646 ps |
| CPU time | 534.82 seconds |
| Started | Aug 23 08:43:42 AM UTC 24 |
| Finished | Aug 23 08:52:43 AM UTC 24 |
| Peak memory | 247592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2784104398 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.kmac_burst_write.2784104398 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/14.kmac_edn_timeout_error.1220479321 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 169828877 ps |
| CPU time | 2.84 seconds |
| Started | Aug 23 08:44:27 AM UTC 24 |
| Finished | Aug 23 08:44:31 AM UTC 24 |
| Peak memory | 230440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1220479321 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.kmac_edn_timeout_error.1220479321 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/14.kmac_entropy_mode_error.3895963552 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 741741669 ps |
| CPU time | 18.22 seconds |
| Started | Aug 23 08:44:27 AM UTC 24 |
| Finished | Aug 23 08:44:47 AM UTC 24 |
| Peak memory | 230648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3895963552 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.kmac_entropy_mode_error.3895963552 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/14.kmac_entropy_refresh.3109764336 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 10381043186 ps |
| CPU time | 143.45 seconds |
| Started | Aug 23 08:44:04 AM UTC 24 |
| Finished | Aug 23 08:46:30 AM UTC 24 |
| Peak memory | 376788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109764336 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.kmac_entropy_refresh.3109764336 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/14.kmac_error.259169991 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 28578924678 ps |
| CPU time | 174.54 seconds |
| Started | Aug 23 08:44:20 AM UTC 24 |
| Finished | Aug 23 08:47:18 AM UTC 24 |
| Peak memory | 421708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=259169991 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 14.kmac_error.259169991 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/14.kmac_key_error.1215041413 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 731178801 ps |
| CPU time | 2.49 seconds |
| Started | Aug 23 08:44:23 AM UTC 24 |
| Finished | Aug 23 08:44:27 AM UTC 24 |
| Peak memory | 230404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1215041413 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.kmac_key_error.1215041413 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/14.kmac_lc_escalation.1910352778 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 226067090 ps |
| CPU time | 1.21 seconds |
| Started | Aug 23 08:44:30 AM UTC 24 |
| Finished | Aug 23 08:44:32 AM UTC 24 |
| Peak memory | 234596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910352778 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.kmac_lc_escalation.1910352778 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/14.kmac_long_msg_and_output.3715828962 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 16949258823 ps |
| CPU time | 465.52 seconds |
| Started | Aug 23 08:43:09 AM UTC 24 |
| Finished | Aug 23 08:51:00 AM UTC 24 |
| Peak memory | 978704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715828962 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.kmac_long_msg_and_output.3715828962 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/14.kmac_sideload.3175315052 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 2170157952 ps |
| CPU time | 147.22 seconds |
| Started | Aug 23 08:43:12 AM UTC 24 |
| Finished | Aug 23 08:45:42 AM UTC 24 |
| Peak memory | 309152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3175315052 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.kmac_sideload.3175315052 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/14.kmac_smoke.2396102361 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 1665133477 ps |
| CPU time | 32.84 seconds |
| Started | Aug 23 08:43:07 AM UTC 24 |
| Finished | Aug 23 08:43:41 AM UTC 24 |
| Peak memory | 230556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396102361 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 14.kmac_smoke.2396102361 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/14.kmac_stress_all.2639535978 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 29731354013 ps |
| CPU time | 637.14 seconds |
| Started | Aug 23 08:44:32 AM UTC 24 |
| Finished | Aug 23 08:55:16 AM UTC 24 |
| Peak memory | 1187676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2639535978 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.kmac_stress_all.2639535978 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/14.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/15.kmac_alert_test.1969945571 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 20234900 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 08:45:54 AM UTC 24 |
| Finished | Aug 23 08:45:56 AM UTC 24 |
| Peak memory | 214264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1969945571 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.kmac_alert_test.1969945571 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/15.kmac_app.3814439972 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 18274473087 ps |
| CPU time | 64.11 seconds |
| Started | Aug 23 08:45:06 AM UTC 24 |
| Finished | Aug 23 08:46:12 AM UTC 24 |
| Peak memory | 303056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814439972 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.kmac_app.3814439972 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/15.kmac_burst_write.1109743230 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 1445635206 ps |
| CPU time | 58.78 seconds |
| Started | Aug 23 08:44:53 AM UTC 24 |
| Finished | Aug 23 08:45:53 AM UTC 24 |
| Peak memory | 232552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1109743230 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.kmac_burst_write.1109743230 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/15.kmac_edn_timeout_error.932584340 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 277811070 ps |
| CPU time | 16.86 seconds |
| Started | Aug 23 08:45:37 AM UTC 24 |
| Finished | Aug 23 08:45:55 AM UTC 24 |
| Peak memory | 235052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=932584340 -assert nopostproc +UVM_TESTNAME=kmac_base_tes t +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.kmac_edn_timeout_error.932584340 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/15.kmac_entropy_mode_error.1088685552 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 879021909 ps |
| CPU time | 4.36 seconds |
| Started | Aug 23 08:45:43 AM UTC 24 |
| Finished | Aug 23 08:45:48 AM UTC 24 |
| Peak memory | 230548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088685552 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.kmac_entropy_mode_error.1088685552 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/15.kmac_entropy_refresh.1027651412 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 4878485590 ps |
| CPU time | 201.3 seconds |
| Started | Aug 23 08:45:19 AM UTC 24 |
| Finished | Aug 23 08:48:44 AM UTC 24 |
| Peak memory | 333712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1027651412 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.kmac_entropy_refresh.1027651412 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/15.kmac_error.916394340 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 10343631432 ps |
| CPU time | 255.71 seconds |
| Started | Aug 23 08:45:22 AM UTC 24 |
| Finished | Aug 23 08:49:42 AM UTC 24 |
| Peak memory | 522208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=916394340 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 15.kmac_error.916394340 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/15.kmac_key_error.2401274844 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 1102691931 ps |
| CPU time | 2.24 seconds |
| Started | Aug 23 08:45:33 AM UTC 24 |
| Finished | Aug 23 08:45:36 AM UTC 24 |
| Peak memory | 230508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2401274844 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.kmac_key_error.2401274844 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/15.kmac_lc_escalation.210509638 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 45906581 ps |
| CPU time | 1.23 seconds |
| Started | Aug 23 08:45:49 AM UTC 24 |
| Finished | Aug 23 08:45:51 AM UTC 24 |
| Peak memory | 234640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=210509638 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmaske d-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.kmac_lc_escalation.210509638 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/15.kmac_long_msg_and_output.1986741793 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 129483428130 ps |
| CPU time | 3493.3 seconds |
| Started | Aug 23 08:44:35 AM UTC 24 |
| Finished | Aug 23 09:43:19 AM UTC 24 |
| Peak memory | 4772952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1986741793 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.kmac_long_msg_and_output.1986741793 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/15.kmac_sideload.320990619 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 332872552 ps |
| CPU time | 3.58 seconds |
| Started | Aug 23 08:44:48 AM UTC 24 |
| Finished | Aug 23 08:44:52 AM UTC 24 |
| Peak memory | 232840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=320990619 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regressi on_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.kmac_sideload.320990619 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/15.kmac_smoke.3316635216 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 3755320653 ps |
| CPU time | 28.72 seconds |
| Started | Aug 23 08:44:35 AM UTC 24 |
| Finished | Aug 23 08:45:05 AM UTC 24 |
| Peak memory | 230520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316635216 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 15.kmac_smoke.3316635216 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/15.kmac_stress_all.857638350 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 433782255750 ps |
| CPU time | 977.79 seconds |
| Started | Aug 23 08:45:52 AM UTC 24 |
| Finished | Aug 23 09:02:21 AM UTC 24 |
| Peak memory | 956484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=857638350 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scrat ch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.kmac_stress_all.857638350 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/15.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/16.kmac_alert_test.1005347723 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 45316121 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 08:47:43 AM UTC 24 |
| Finished | Aug 23 08:47:44 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1005347723 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.kmac_alert_test.1005347723 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/16.kmac_app.2138425924 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 8715454290 ps |
| CPU time | 97.16 seconds |
| Started | Aug 23 08:46:28 AM UTC 24 |
| Finished | Aug 23 08:48:07 AM UTC 24 |
| Peak memory | 280424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138425924 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.kmac_app.2138425924 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/16.kmac_burst_write.3014423624 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 96983277928 ps |
| CPU time | 609.58 seconds |
| Started | Aug 23 08:46:18 AM UTC 24 |
| Finished | Aug 23 08:56:34 AM UTC 24 |
| Peak memory | 251692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014423624 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.kmac_burst_write.3014423624 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/16.kmac_edn_timeout_error.2226174235 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 592069002 ps |
| CPU time | 7.36 seconds |
| Started | Aug 23 08:47:21 AM UTC 24 |
| Finished | Aug 23 08:47:30 AM UTC 24 |
| Peak memory | 232424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2226174235 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.kmac_edn_timeout_error.2226174235 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/16.kmac_entropy_mode_error.492083125 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 2011615530 ps |
| CPU time | 11.97 seconds |
| Started | Aug 23 08:47:28 AM UTC 24 |
| Finished | Aug 23 08:47:42 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=492083125 -assert nopostproc +UVM_TESTNAME=kmac_base_tes t +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.kmac_entropy_mode_error.492083125 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/16.kmac_entropy_refresh.4266437424 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 10061475307 ps |
| CPU time | 200.7 seconds |
| Started | Aug 23 08:46:31 AM UTC 24 |
| Finished | Aug 23 08:49:55 AM UTC 24 |
| Peak memory | 319504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4266437424 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.kmac_entropy_refresh.4266437424 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/16.kmac_error.307381522 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 5079735444 ps |
| CPU time | 88.03 seconds |
| Started | Aug 23 08:46:47 AM UTC 24 |
| Finished | Aug 23 08:48:17 AM UTC 24 |
| Peak memory | 284580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=307381522 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 16.kmac_error.307381522 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/16.kmac_key_error.226207487 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 22111748 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 08:47:18 AM UTC 24 |
| Finished | Aug 23 08:47:20 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=226207487 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.kmac_key_error.226207487 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/16.kmac_lc_escalation.1213276568 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 97344209 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 08:47:30 AM UTC 24 |
| Finished | Aug 23 08:47:33 AM UTC 24 |
| Peak memory | 229668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1213276568 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.kmac_lc_escalation.1213276568 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/16.kmac_long_msg_and_output.2755659202 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 69998038178 ps |
| CPU time | 1419.28 seconds |
| Started | Aug 23 08:45:56 AM UTC 24 |
| Finished | Aug 23 09:09:50 AM UTC 24 |
| Peak memory | 1275728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2755659202 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.kmac_long_msg_and_output.2755659202 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/16.kmac_sideload.2080228831 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 8584390080 ps |
| CPU time | 149.24 seconds |
| Started | Aug 23 08:46:13 AM UTC 24 |
| Finished | Aug 23 08:48:45 AM UTC 24 |
| Peak memory | 313192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080228831 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.kmac_sideload.2080228831 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/16.kmac_smoke.2621730494 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 2997644703 ps |
| CPU time | 20.48 seconds |
| Started | Aug 23 08:45:56 AM UTC 24 |
| Finished | Aug 23 08:46:18 AM UTC 24 |
| Peak memory | 230768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2621730494 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 16.kmac_smoke.2621730494 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/16.kmac_stress_all.3648466269 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 23498549596 ps |
| CPU time | 427.1 seconds |
| Started | Aug 23 08:47:34 AM UTC 24 |
| Finished | Aug 23 08:54:46 AM UTC 24 |
| Peak memory | 511828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3648466269 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.kmac_stress_all.3648466269 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/16.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/17.kmac_alert_test.2107547235 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 18016886 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 08:48:53 AM UTC 24 |
| Finished | Aug 23 08:48:55 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2107547235 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.kmac_alert_test.2107547235 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/17.kmac_app.3149565682 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 1433100514 ps |
| CPU time | 64.6 seconds |
| Started | Aug 23 08:48:18 AM UTC 24 |
| Finished | Aug 23 08:49:24 AM UTC 24 |
| Peak memory | 259868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149565682 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.kmac_app.3149565682 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/17.kmac_burst_write.3952645797 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 1511399772 ps |
| CPU time | 58.21 seconds |
| Started | Aug 23 08:48:11 AM UTC 24 |
| Finished | Aug 23 08:49:11 AM UTC 24 |
| Peak memory | 232560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3952645797 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.kmac_burst_write.3952645797 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/17.kmac_edn_timeout_error.3564608362 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 7907796202 ps |
| CPU time | 23.82 seconds |
| Started | Aug 23 08:48:44 AM UTC 24 |
| Finished | Aug 23 08:49:09 AM UTC 24 |
| Peak memory | 235412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564608362 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.kmac_edn_timeout_error.3564608362 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/17.kmac_entropy_mode_error.2583712 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 1923643962 ps |
| CPU time | 33.7 seconds |
| Started | Aug 23 08:48:45 AM UTC 24 |
| Finished | Aug 23 08:49:20 AM UTC 24 |
| Peak memory | 232552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2583712 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.kmac_entropy_mode_error.2583712 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/17.kmac_entropy_refresh.3708387896 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 26888236787 ps |
| CPU time | 203.34 seconds |
| Started | Aug 23 08:48:28 AM UTC 24 |
| Finished | Aug 23 08:51:54 AM UTC 24 |
| Peak memory | 442192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3708387896 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.kmac_entropy_refresh.3708387896 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/17.kmac_error.3386048976 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 4242459407 ps |
| CPU time | 144.2 seconds |
| Started | Aug 23 08:48:29 AM UTC 24 |
| Finished | Aug 23 08:50:56 AM UTC 24 |
| Peak memory | 313100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3386048976 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 17.kmac_error.3386048976 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/17.kmac_key_error.984560232 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 2462228415 ps |
| CPU time | 3.36 seconds |
| Started | Aug 23 08:48:44 AM UTC 24 |
| Finished | Aug 23 08:48:48 AM UTC 24 |
| Peak memory | 230564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=984560232 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.kmac_key_error.984560232 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/17.kmac_lc_escalation.4288979342 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 43622475 ps |
| CPU time | 0.99 seconds |
| Started | Aug 23 08:48:49 AM UTC 24 |
| Finished | Aug 23 08:48:51 AM UTC 24 |
| Peak memory | 231720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288979342 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.kmac_lc_escalation.4288979342 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/17.kmac_long_msg_and_output.4175204354 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 77144320367 ps |
| CPU time | 2711.82 seconds |
| Started | Aug 23 08:48:03 AM UTC 24 |
| Finished | Aug 23 09:33:42 AM UTC 24 |
| Peak memory | 3737432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175204354 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.kmac_long_msg_and_output.4175204354 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/17.kmac_sideload.2638321311 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 717723083 ps |
| CPU time | 43.79 seconds |
| Started | Aug 23 08:48:08 AM UTC 24 |
| Finished | Aug 23 08:48:53 AM UTC 24 |
| Peak memory | 255780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638321311 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.kmac_sideload.2638321311 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/17.kmac_smoke.3968720198 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 2392397235 ps |
| CPU time | 24.54 seconds |
| Started | Aug 23 08:47:45 AM UTC 24 |
| Finished | Aug 23 08:48:10 AM UTC 24 |
| Peak memory | 230704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3968720198 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 17.kmac_smoke.3968720198 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/17.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/18.kmac_alert_test.1359650863 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 64686553 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 08:49:59 AM UTC 24 |
| Finished | Aug 23 08:50:01 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1359650863 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.kmac_alert_test.1359650863 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/18.kmac_app.1462344132 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 18589135101 ps |
| CPU time | 151.11 seconds |
| Started | Aug 23 08:49:13 AM UTC 24 |
| Finished | Aug 23 08:51:46 AM UTC 24 |
| Peak memory | 309040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1462344132 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.kmac_app.1462344132 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/18.kmac_burst_write.1076905733 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 11587011012 ps |
| CPU time | 146.63 seconds |
| Started | Aug 23 08:49:12 AM UTC 24 |
| Finished | Aug 23 08:51:41 AM UTC 24 |
| Peak memory | 237448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076905733 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.kmac_burst_write.1076905733 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/18.kmac_edn_timeout_error.3909355615 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 713690827 ps |
| CPU time | 21.35 seconds |
| Started | Aug 23 08:49:40 AM UTC 24 |
| Finished | Aug 23 08:50:03 AM UTC 24 |
| Peak memory | 235096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909355615 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.kmac_edn_timeout_error.3909355615 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/18.kmac_entropy_mode_error.2311890581 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 586485263 ps |
| CPU time | 13.68 seconds |
| Started | Aug 23 08:49:42 AM UTC 24 |
| Finished | Aug 23 08:49:57 AM UTC 24 |
| Peak memory | 228384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2311890581 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.kmac_entropy_mode_error.2311890581 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/18.kmac_entropy_refresh.15192218 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 55343654980 ps |
| CPU time | 230.03 seconds |
| Started | Aug 23 08:49:21 AM UTC 24 |
| Finished | Aug 23 08:53:14 AM UTC 24 |
| Peak memory | 491344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=15192218 -assert nopostproc +UVM_TEST NAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regr ession_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.kmac_entropy_refresh.15192218 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/18.kmac_error.1304278896 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 1158565782 ps |
| CPU time | 8.12 seconds |
| Started | Aug 23 08:49:25 AM UTC 24 |
| Finished | Aug 23 08:49:35 AM UTC 24 |
| Peak memory | 245528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304278896 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 18.kmac_error.1304278896 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/18.kmac_key_error.1835952002 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 1396893528 ps |
| CPU time | 2.31 seconds |
| Started | Aug 23 08:49:36 AM UTC 24 |
| Finished | Aug 23 08:49:39 AM UTC 24 |
| Peak memory | 230416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1835952002 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.kmac_key_error.1835952002 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/18.kmac_long_msg_and_output.475098809 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 101615521499 ps |
| CPU time | 1621.31 seconds |
| Started | Aug 23 08:49:04 AM UTC 24 |
| Finished | Aug 23 09:16:20 AM UTC 24 |
| Peak memory | 2592808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=475098809 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.kmac_long_msg_and_output.475098809 +enable_mask ing=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/18.kmac_sideload.1206040714 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 100039857424 ps |
| CPU time | 332.18 seconds |
| Started | Aug 23 08:49:10 AM UTC 24 |
| Finished | Aug 23 08:54:47 AM UTC 24 |
| Peak memory | 560992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1206040714 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.kmac_sideload.1206040714 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/18.kmac_smoke.2492954295 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 813070050 ps |
| CPU time | 4.24 seconds |
| Started | Aug 23 08:48:55 AM UTC 24 |
| Finished | Aug 23 08:49:02 AM UTC 24 |
| Peak memory | 230624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2492954295 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 18.kmac_smoke.2492954295 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/18.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/19.kmac_alert_test.1399312940 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 15257018 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 08:52:09 AM UTC 24 |
| Finished | Aug 23 08:52:11 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1399312940 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.kmac_alert_test.1399312940 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/19.kmac_app.3197032012 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 21547681300 ps |
| CPU time | 171.47 seconds |
| Started | Aug 23 08:51:01 AM UTC 24 |
| Finished | Aug 23 08:53:55 AM UTC 24 |
| Peak memory | 323456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3197032012 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.kmac_app.3197032012 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/19.kmac_burst_write.3032142036 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 44400749797 ps |
| CPU time | 671.66 seconds |
| Started | Aug 23 08:50:57 AM UTC 24 |
| Finished | Aug 23 09:02:15 AM UTC 24 |
| Peak memory | 266052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3032142036 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.kmac_burst_write.3032142036 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/19.kmac_edn_timeout_error.1496871827 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 1172829040 ps |
| CPU time | 26.92 seconds |
| Started | Aug 23 08:51:47 AM UTC 24 |
| Finished | Aug 23 08:52:15 AM UTC 24 |
| Peak memory | 235104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496871827 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.kmac_edn_timeout_error.1496871827 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/19.kmac_entropy_mode_error.4288194194 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 914799720 ps |
| CPU time | 20.56 seconds |
| Started | Aug 23 08:51:47 AM UTC 24 |
| Finished | Aug 23 08:52:09 AM UTC 24 |
| Peak memory | 235416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288194194 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.kmac_entropy_mode_error.4288194194 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/19.kmac_entropy_refresh.3921206163 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 12504520913 ps |
| CPU time | 81.86 seconds |
| Started | Aug 23 08:51:19 AM UTC 24 |
| Finished | Aug 23 08:52:43 AM UTC 24 |
| Peak memory | 274260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3921206163 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.kmac_entropy_refresh.3921206163 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/19.kmac_error.2582404717 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 7026644792 ps |
| CPU time | 225.11 seconds |
| Started | Aug 23 08:51:20 AM UTC 24 |
| Finished | Aug 23 08:55:08 AM UTC 24 |
| Peak memory | 352068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2582404717 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 19.kmac_error.2582404717 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/19.kmac_key_error.2780707384 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 5371500866 ps |
| CPU time | 3.01 seconds |
| Started | Aug 23 08:51:42 AM UTC 24 |
| Finished | Aug 23 08:51:46 AM UTC 24 |
| Peak memory | 230492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780707384 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.kmac_key_error.2780707384 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/19.kmac_long_msg_and_output.3336657017 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 20004450292 ps |
| CPU time | 818.55 seconds |
| Started | Aug 23 08:50:03 AM UTC 24 |
| Finished | Aug 23 09:03:51 AM UTC 24 |
| Peak memory | 880404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3336657017 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.kmac_long_msg_and_output.3336657017 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/19.kmac_sideload.1551973924 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 7677248847 ps |
| CPU time | 266.32 seconds |
| Started | Aug 23 08:50:35 AM UTC 24 |
| Finished | Aug 23 08:55:05 AM UTC 24 |
| Peak memory | 364572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551973924 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.kmac_sideload.1551973924 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/19.kmac_smoke.774448594 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 1734217347 ps |
| CPU time | 32.35 seconds |
| Started | Aug 23 08:50:01 AM UTC 24 |
| Finished | Aug 23 08:50:35 AM UTC 24 |
| Peak memory | 235268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=774448594 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 19.kmac_smoke.774448594 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/19.kmac_stress_all.2651935015 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 6157580495 ps |
| CPU time | 260.57 seconds |
| Started | Aug 23 08:52:07 AM UTC 24 |
| Finished | Aug 23 08:56:31 AM UTC 24 |
| Peak memory | 311504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2651935015 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.kmac_stress_all.2651935015 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/19.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_alert_test.2739221656 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 45223148 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 08:20:41 AM UTC 24 |
| Finished | Aug 23 08:20:43 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739221656 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_alert_test.2739221656 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_app.2488661685 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 12224348380 ps |
| CPU time | 45.69 seconds |
| Started | Aug 23 08:19:35 AM UTC 24 |
| Finished | Aug 23 08:20:22 AM UTC 24 |
| Peak memory | 284676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2488661685 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_app.2488661685 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_app_with_partial_data.1226152147 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 27896467006 ps |
| CPU time | 105.57 seconds |
| Started | Aug 23 08:19:37 AM UTC 24 |
| Finished | Aug 23 08:21:24 AM UTC 24 |
| Peak memory | 329500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226152147 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_with_partial_data_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_app_with_partial_data.1226152147 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_app_with_partial_data/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_burst_write.1988470010 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 5572061950 ps |
| CPU time | 406.98 seconds |
| Started | Aug 23 08:18:47 AM UTC 24 |
| Finished | Aug 23 08:25:39 AM UTC 24 |
| Peak memory | 247764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988470010 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_burst_write.1988470010 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_edn_timeout_error.3367583945 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 1276880446 ps |
| CPU time | 13.55 seconds |
| Started | Aug 23 08:20:28 AM UTC 24 |
| Finished | Aug 23 08:20:43 AM UTC 24 |
| Peak memory | 235268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367583945 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_edn_timeout_error.3367583945 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_entropy_mode_error.3740517446 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 283154491 ps |
| CPU time | 9.6 seconds |
| Started | Aug 23 08:20:30 AM UTC 24 |
| Finished | Aug 23 08:20:41 AM UTC 24 |
| Peak memory | 235236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740517446 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_entropy_mode_error.3740517446 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_entropy_ready_error.2564505152 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 361634598 ps |
| CPU time | 3.42 seconds |
| Started | Aug 23 08:20:31 AM UTC 24 |
| Finished | Aug 23 08:20:36 AM UTC 24 |
| Peak memory | 230572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2564505152 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_entropy_ready_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_ unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_entropy_ready_error.2564505152 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_entropy_ready_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_error.3308452128 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 482493121 ps |
| CPU time | 28.46 seconds |
| Started | Aug 23 08:20:22 AM UTC 24 |
| Finished | Aug 23 08:20:52 AM UTC 24 |
| Peak memory | 261860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308452128 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_error.3308452128 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_key_error.480876983 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 3680519154 ps |
| CPU time | 5.23 seconds |
| Started | Aug 23 08:20:28 AM UTC 24 |
| Finished | Aug 23 08:20:34 AM UTC 24 |
| Peak memory | 230488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=480876983 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_key_error.480876983 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_long_msg_and_output.1613184675 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 4949966668 ps |
| CPU time | 102.04 seconds |
| Started | Aug 23 08:18:46 AM UTC 24 |
| Finished | Aug 23 08:20:30 AM UTC 24 |
| Peak memory | 427808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1613184675 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_long_msg_and_output.1613184675 +enable_mas king=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_mubi.2321350896 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 12608353898 ps |
| CPU time | 96.95 seconds |
| Started | Aug 23 08:20:17 AM UTC 24 |
| Finished | Aug 23 08:21:56 AM UTC 24 |
| Peak memory | 333936 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2321350896 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_mubi_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_mubi.2321350896 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_mubi/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_sec_cm.136641597 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 4075828121 ps |
| CPU time | 24.01 seconds |
| Started | Aug 23 08:20:36 AM UTC 24 |
| Finished | Aug 23 08:21:02 AM UTC 24 |
| Peak memory | 275664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_R ELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=136641597 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_sec_cm.136641597 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_sideload.2968227641 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 9689079137 ps |
| CPU time | 179.57 seconds |
| Started | Aug 23 08:18:46 AM UTC 24 |
| Finished | Aug 23 08:21:49 AM UTC 24 |
| Peak memory | 448336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968227641 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_sideload.2968227641 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_smoke.1292997546 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 2715342120 ps |
| CPU time | 9.93 seconds |
| Started | Aug 23 08:18:46 AM UTC 24 |
| Finished | Aug 23 08:18:57 AM UTC 24 |
| Peak memory | 230580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292997546 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_smoke.1292997546 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_test_vectors_kmac.3448091374 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 106197378 ps |
| CPU time | 1.71 seconds |
| Started | Aug 23 08:19:32 AM UTC 24 |
| Finished | Aug 23 08:19:34 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3448091374 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_v ectors_kmac_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.kmac_test_vectors_kmac.3448091374 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_test_vectors_kmac/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_test_vectors_kmac_xof.4245549976 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 82199436 ps |
| CPU time | 2.14 seconds |
| Started | Aug 23 08:19:33 AM UTC 24 |
| Finished | Aug 23 08:19:36 AM UTC 24 |
| Peak memory | 230612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245549976 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_v ectors_kmac_xof_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs /coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_test_vectors_kmac_xof.4245549976 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_test_vectors_kmac_xof/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_test_vectors_sha3_224.1343251679 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 121278340804 ps |
| CPU time | 1920.83 seconds |
| Started | Aug 23 08:18:58 AM UTC 24 |
| Finished | Aug 23 08:51:18 AM UTC 24 |
| Peak memory | 3131180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=224 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1343251679 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_test_vectors_sha3_224.1343251679 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_test_vectors_sha3_224/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_test_vectors_sha3_256.3781362057 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 590906769 ps |
| CPU time | 29.52 seconds |
| Started | Aug 23 08:19:00 AM UTC 24 |
| Finished | Aug 23 08:19:31 AM UTC 24 |
| Peak memory | 230620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=256 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3781362057 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_test_vectors_sha3_256.3781362057 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_test_vectors_sha3_256/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_test_vectors_sha3_384.3451078441 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 1702168855 ps |
| CPU time | 19.04 seconds |
| Started | Aug 23 08:19:05 AM UTC 24 |
| Finished | Aug 23 08:19:26 AM UTC 24 |
| Peak memory | 228456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=384 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3451078441 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_test_vectors_sha3_384.3451078441 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_test_vectors_sha3_384/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_test_vectors_sha3_512.1026140584 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 50439430538 ps |
| CPU time | 726 seconds |
| Started | Aug 23 08:19:17 AM UTC 24 |
| Finished | Aug 23 08:31:31 AM UTC 24 |
| Peak memory | 710328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=512 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1026140584 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_test_vectors_sha3_512.1026140584 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_test_vectors_sha3_512/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_test_vectors_shake_128.1651885178 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 24088508577 ps |
| CPU time | 188.74 seconds |
| Started | Aug 23 08:19:27 AM UTC 24 |
| Finished | Aug 23 08:22:38 AM UTC 24 |
| Peak memory | 280316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_shake_variant=128 +cdc_instrumentation _enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651885178 -assert no postproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_shake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces /repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_test_vectors_shake_128.1651885 178 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_test_vectors_shake_128/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/2.kmac_test_vectors_shake_256.417402865 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 10463812300 ps |
| CPU time | 256.21 seconds |
| Started | Aug 23 08:19:27 AM UTC 24 |
| Finished | Aug 23 08:23:46 AM UTC 24 |
| Peak memory | 263868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_shake_variant=256 +cdc_instrumentation _enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=417402865 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_shake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/ repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.kmac_test_vectors_shake_256.41740286 5 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/2.kmac_test_vectors_shake_256/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/20.kmac_alert_test.1167927464 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 55978390 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 08:53:34 AM UTC 24 |
| Finished | Aug 23 08:53:36 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167927464 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.kmac_alert_test.1167927464 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/20.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/20.kmac_app.1940799484 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 7356356328 ps |
| CPU time | 42.2 seconds |
| Started | Aug 23 08:52:44 AM UTC 24 |
| Finished | Aug 23 08:53:28 AM UTC 24 |
| Peak memory | 272204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940799484 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.kmac_app.1940799484 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/20.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/20.kmac_burst_write.2150917706 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 41376097232 ps |
| CPU time | 504.81 seconds |
| Started | Aug 23 08:52:21 AM UTC 24 |
| Finished | Aug 23 09:00:51 AM UTC 24 |
| Peak memory | 255776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150917706 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.kmac_burst_write.2150917706 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/20.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/20.kmac_entropy_refresh.212804849 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 61211011725 ps |
| CPU time | 268.39 seconds |
| Started | Aug 23 08:52:44 AM UTC 24 |
| Finished | Aug 23 08:57:16 AM UTC 24 |
| Peak memory | 505740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=212804849 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_reg ression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.kmac_entropy_refresh.212804849 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/20.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/20.kmac_error.4203042900 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 1998144885 ps |
| CPU time | 58.49 seconds |
| Started | Aug 23 08:53:03 AM UTC 24 |
| Finished | Aug 23 08:54:03 AM UTC 24 |
| Peak memory | 268060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4203042900 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 20.kmac_error.4203042900 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/20.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/20.kmac_key_error.2282559673 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 6239980624 ps |
| CPU time | 7.28 seconds |
| Started | Aug 23 08:53:15 AM UTC 24 |
| Finished | Aug 23 08:53:23 AM UTC 24 |
| Peak memory | 230568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2282559673 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.kmac_key_error.2282559673 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/20.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/20.kmac_long_msg_and_output.3445741886 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 53818214496 ps |
| CPU time | 771.36 seconds |
| Started | Aug 23 08:52:13 AM UTC 24 |
| Finished | Aug 23 09:05:12 AM UTC 24 |
| Peak memory | 1435484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3445741886 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.kmac_long_msg_and_output.3445741886 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/20.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/20.kmac_sideload.2320571179 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 28175961592 ps |
| CPU time | 263.82 seconds |
| Started | Aug 23 08:52:17 AM UTC 24 |
| Finished | Aug 23 08:56:44 AM UTC 24 |
| Peak memory | 524060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320571179 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.kmac_sideload.2320571179 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/20.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/20.kmac_smoke.4003638747 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 10826780098 ps |
| CPU time | 49.12 seconds |
| Started | Aug 23 08:52:11 AM UTC 24 |
| Finished | Aug 23 08:53:02 AM UTC 24 |
| Peak memory | 232692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4003638747 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 20.kmac_smoke.4003638747 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/20.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/20.kmac_stress_all.264876321 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 3103341974 ps |
| CPU time | 65.03 seconds |
| Started | Aug 23 08:53:28 AM UTC 24 |
| Finished | Aug 23 08:54:35 AM UTC 24 |
| Peak memory | 268328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=264876321 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scrat ch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.kmac_stress_all.264876321 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/20.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/21.kmac_alert_test.278219797 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 267226280 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 08:54:53 AM UTC 24 |
| Finished | Aug 23 08:54:55 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=278219797 -assert nopostproc +UVM_TESTNA ME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.kmac_alert_test.278219797 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/21.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/21.kmac_app.4056689121 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 18078860534 ps |
| CPU time | 93.46 seconds |
| Started | Aug 23 08:54:20 AM UTC 24 |
| Finished | Aug 23 08:55:55 AM UTC 24 |
| Peak memory | 272360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4056689121 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.kmac_app.4056689121 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/21.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/21.kmac_burst_write.1001014070 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 26128921052 ps |
| CPU time | 693.97 seconds |
| Started | Aug 23 08:54:04 AM UTC 24 |
| Finished | Aug 23 09:05:45 AM UTC 24 |
| Peak memory | 264036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1001014070 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.kmac_burst_write.1001014070 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/21.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/21.kmac_entropy_refresh.3051987022 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 146046083856 ps |
| CPU time | 150.38 seconds |
| Started | Aug 23 08:54:36 AM UTC 24 |
| Finished | Aug 23 08:57:09 AM UTC 24 |
| Peak memory | 366468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051987022 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.kmac_entropy_refresh.3051987022 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/21.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/21.kmac_error.1119207600 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 78603534 ps |
| CPU time | 2.73 seconds |
| Started | Aug 23 08:54:47 AM UTC 24 |
| Finished | Aug 23 08:54:51 AM UTC 24 |
| Peak memory | 230436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1119207600 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 21.kmac_error.1119207600 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/21.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/21.kmac_key_error.2041422929 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 583528832 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 08:54:47 AM UTC 24 |
| Finished | Aug 23 08:54:50 AM UTC 24 |
| Peak memory | 229728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2041422929 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.kmac_key_error.2041422929 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/21.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/21.kmac_lc_escalation.1135364556 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 58399241 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 08:54:50 AM UTC 24 |
| Finished | Aug 23 08:54:52 AM UTC 24 |
| Peak memory | 231704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1135364556 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.kmac_lc_escalation.1135364556 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/21.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/21.kmac_long_msg_and_output.1835452820 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 25715085414 ps |
| CPU time | 555.4 seconds |
| Started | Aug 23 08:53:56 AM UTC 24 |
| Finished | Aug 23 09:03:17 AM UTC 24 |
| Peak memory | 1113856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1835452820 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.kmac_long_msg_and_output.1835452820 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/21.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/21.kmac_sideload.1797302242 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 16247647639 ps |
| CPU time | 284.18 seconds |
| Started | Aug 23 08:54:01 AM UTC 24 |
| Finished | Aug 23 08:58:48 AM UTC 24 |
| Peak memory | 374612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1797302242 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.kmac_sideload.1797302242 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/21.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/21.kmac_smoke.2306298725 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 2301005849 ps |
| CPU time | 21.98 seconds |
| Started | Aug 23 08:53:36 AM UTC 24 |
| Finished | Aug 23 08:54:00 AM UTC 24 |
| Peak memory | 230636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2306298725 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 21.kmac_smoke.2306298725 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/21.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/21.kmac_stress_all.1659245431 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 23622909115 ps |
| CPU time | 678.23 seconds |
| Started | Aug 23 08:54:51 AM UTC 24 |
| Finished | Aug 23 09:06:17 AM UTC 24 |
| Peak memory | 1062748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1659245431 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.kmac_stress_all.1659245431 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/21.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/22.kmac_alert_test.1459192174 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 64808957 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 08:56:12 AM UTC 24 |
| Finished | Aug 23 08:56:14 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1459192174 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.kmac_alert_test.1459192174 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/22.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/22.kmac_app.4253652922 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 11727304899 ps |
| CPU time | 187.06 seconds |
| Started | Aug 23 08:55:35 AM UTC 24 |
| Finished | Aug 23 08:58:45 AM UTC 24 |
| Peak memory | 325536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4253652922 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.kmac_app.4253652922 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/22.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/22.kmac_burst_write.2318324056 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 15892459278 ps |
| CPU time | 614.2 seconds |
| Started | Aug 23 08:55:17 AM UTC 24 |
| Finished | Aug 23 09:05:38 AM UTC 24 |
| Peak memory | 253728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2318324056 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.kmac_burst_write.2318324056 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/22.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/22.kmac_entropy_refresh.826267660 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 51994230992 ps |
| CPU time | 252.34 seconds |
| Started | Aug 23 08:55:40 AM UTC 24 |
| Finished | Aug 23 08:59:56 AM UTC 24 |
| Peak memory | 468756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=826267660 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_reg ression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.kmac_entropy_refresh.826267660 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/22.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/22.kmac_error.1619624270 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 5928587701 ps |
| CPU time | 182.83 seconds |
| Started | Aug 23 08:55:54 AM UTC 24 |
| Finished | Aug 23 08:59:00 AM UTC 24 |
| Peak memory | 333848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1619624270 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 22.kmac_error.1619624270 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/22.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/22.kmac_key_error.310008331 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 810695689 ps |
| CPU time | 5.03 seconds |
| Started | Aug 23 08:55:56 AM UTC 24 |
| Finished | Aug 23 08:56:02 AM UTC 24 |
| Peak memory | 230384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=310008331 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.kmac_key_error.310008331 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/22.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/22.kmac_lc_escalation.1240190965 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 45626800 ps |
| CPU time | 1.1 seconds |
| Started | Aug 23 08:56:03 AM UTC 24 |
| Finished | Aug 23 08:56:05 AM UTC 24 |
| Peak memory | 229676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1240190965 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.kmac_lc_escalation.1240190965 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/22.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/22.kmac_long_msg_and_output.1870948791 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 81492990426 ps |
| CPU time | 562.55 seconds |
| Started | Aug 23 08:55:07 AM UTC 24 |
| Finished | Aug 23 09:04:35 AM UTC 24 |
| Peak memory | 1177504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1870948791 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.kmac_long_msg_and_output.1870948791 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/22.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/22.kmac_sideload.1709242856 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 9149596938 ps |
| CPU time | 43.33 seconds |
| Started | Aug 23 08:55:09 AM UTC 24 |
| Finished | Aug 23 08:55:54 AM UTC 24 |
| Peak memory | 280340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709242856 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.kmac_sideload.1709242856 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/22.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/22.kmac_smoke.2337162497 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 3439568644 ps |
| CPU time | 37.05 seconds |
| Started | Aug 23 08:54:55 AM UTC 24 |
| Finished | Aug 23 08:55:34 AM UTC 24 |
| Peak memory | 230676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2337162497 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 22.kmac_smoke.2337162497 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/22.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/22.kmac_stress_all.2449692334 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 32116872609 ps |
| CPU time | 838.72 seconds |
| Started | Aug 23 08:56:06 AM UTC 24 |
| Finished | Aug 23 09:10:14 AM UTC 24 |
| Peak memory | 1447840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2449692334 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.kmac_stress_all.2449692334 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/22.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/23.kmac_alert_test.669447058 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 13016429 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 08:57:53 AM UTC 24 |
| Finished | Aug 23 08:57:55 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=669447058 -assert nopostproc +UVM_TESTNA ME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.kmac_alert_test.669447058 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/23.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/23.kmac_app.3364972168 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 8455314623 ps |
| CPU time | 65.86 seconds |
| Started | Aug 23 08:56:45 AM UTC 24 |
| Finished | Aug 23 08:57:52 AM UTC 24 |
| Peak memory | 303004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3364972168 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.kmac_app.3364972168 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/23.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/23.kmac_burst_write.1581419432 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 8053528116 ps |
| CPU time | 294.89 seconds |
| Started | Aug 23 08:56:36 AM UTC 24 |
| Finished | Aug 23 09:01:34 AM UTC 24 |
| Peak memory | 243532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1581419432 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.kmac_burst_write.1581419432 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/23.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/23.kmac_entropy_refresh.1136738685 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 48302948437 ps |
| CPU time | 262.94 seconds |
| Started | Aug 23 08:57:10 AM UTC 24 |
| Finished | Aug 23 09:01:36 AM UTC 24 |
| Peak memory | 499480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1136738685 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.kmac_entropy_refresh.1136738685 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/23.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/23.kmac_error.3695536032 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 368280177 ps |
| CPU time | 10.18 seconds |
| Started | Aug 23 08:57:17 AM UTC 24 |
| Finished | Aug 23 08:57:28 AM UTC 24 |
| Peak memory | 246964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3695536032 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 23.kmac_error.3695536032 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/23.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/23.kmac_key_error.4097577549 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 1527109357 ps |
| CPU time | 6.88 seconds |
| Started | Aug 23 08:57:29 AM UTC 24 |
| Finished | Aug 23 08:57:37 AM UTC 24 |
| Peak memory | 230608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4097577549 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.kmac_key_error.4097577549 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/23.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/23.kmac_lc_escalation.567619126 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 63090747 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 08:57:38 AM UTC 24 |
| Finished | Aug 23 08:57:40 AM UTC 24 |
| Peak memory | 229908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=567619126 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmaske d-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.kmac_lc_escalation.567619126 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/23.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/23.kmac_long_msg_and_output.1773325063 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 152539575406 ps |
| CPU time | 426.96 seconds |
| Started | Aug 23 08:56:19 AM UTC 24 |
| Finished | Aug 23 09:03:31 AM UTC 24 |
| Peak memory | 874328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773325063 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.kmac_long_msg_and_output.1773325063 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/23.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/23.kmac_sideload.1371077682 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 20235706231 ps |
| CPU time | 236.6 seconds |
| Started | Aug 23 08:56:33 AM UTC 24 |
| Finished | Aug 23 09:00:32 AM UTC 24 |
| Peak memory | 513820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1371077682 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.kmac_sideload.1371077682 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/23.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/23.kmac_smoke.1497776545 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 131899115 ps |
| CPU time | 3.29 seconds |
| Started | Aug 23 08:56:14 AM UTC 24 |
| Finished | Aug 23 08:56:19 AM UTC 24 |
| Peak memory | 230560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1497776545 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 23.kmac_smoke.1497776545 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/23.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/23.kmac_stress_all.2672698818 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 56594430344 ps |
| CPU time | 240.59 seconds |
| Started | Aug 23 08:57:41 AM UTC 24 |
| Finished | Aug 23 09:01:45 AM UTC 24 |
| Peak memory | 462732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2672698818 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.kmac_stress_all.2672698818 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/23.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/24.kmac_alert_test.587380955 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 18602277 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 09:00:44 AM UTC 24 |
| Finished | Aug 23 09:00:46 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=587380955 -assert nopostproc +UVM_TESTNA ME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.kmac_alert_test.587380955 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/24.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/24.kmac_app.2021915418 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 24836311861 ps |
| CPU time | 221.04 seconds |
| Started | Aug 23 08:58:49 AM UTC 24 |
| Finished | Aug 23 09:02:33 AM UTC 24 |
| Peak memory | 474976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2021915418 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.kmac_app.2021915418 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/24.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/24.kmac_burst_write.3567677830 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 39685614126 ps |
| CPU time | 647.89 seconds |
| Started | Aug 23 08:58:46 AM UTC 24 |
| Finished | Aug 23 09:09:41 AM UTC 24 |
| Peak memory | 259932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3567677830 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.kmac_burst_write.3567677830 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/24.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/24.kmac_entropy_refresh.589943252 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 15876153223 ps |
| CPU time | 102.1 seconds |
| Started | Aug 23 08:59:01 AM UTC 24 |
| Finished | Aug 23 09:00:45 AM UTC 24 |
| Peak memory | 280408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=589943252 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_reg ression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.kmac_entropy_refresh.589943252 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/24.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/24.kmac_error.4061854648 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 2974685066 ps |
| CPU time | 45.17 seconds |
| Started | Aug 23 08:59:57 AM UTC 24 |
| Finished | Aug 23 09:00:44 AM UTC 24 |
| Peak memory | 261968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4061854648 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 24.kmac_error.4061854648 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/24.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/24.kmac_key_error.3794796265 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 310689524 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 09:00:34 AM UTC 24 |
| Finished | Aug 23 09:00:37 AM UTC 24 |
| Peak memory | 229676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3794796265 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.kmac_key_error.3794796265 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/24.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/24.kmac_lc_escalation.3914761146 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 52520719 ps |
| CPU time | 1.22 seconds |
| Started | Aug 23 09:00:38 AM UTC 24 |
| Finished | Aug 23 09:00:40 AM UTC 24 |
| Peak memory | 229776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3914761146 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.kmac_lc_escalation.3914761146 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/24.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/24.kmac_long_msg_and_output.2791019400 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 13306659183 ps |
| CPU time | 246.52 seconds |
| Started | Aug 23 08:58:01 AM UTC 24 |
| Finished | Aug 23 09:02:11 AM UTC 24 |
| Peak memory | 419860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2791019400 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.kmac_long_msg_and_output.2791019400 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/24.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/24.kmac_sideload.86341860 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 24596894026 ps |
| CPU time | 137.42 seconds |
| Started | Aug 23 08:58:24 AM UTC 24 |
| Finished | Aug 23 09:00:43 AM UTC 24 |
| Peak memory | 380676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=86341860 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regressio n_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.kmac_sideload.86341860 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/24.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/24.kmac_smoke.3584889193 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 214710681 ps |
| CPU time | 4.38 seconds |
| Started | Aug 23 08:57:55 AM UTC 24 |
| Finished | Aug 23 08:58:01 AM UTC 24 |
| Peak memory | 230492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3584889193 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 24.kmac_smoke.3584889193 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/24.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/24.kmac_stress_all.505932890 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 254282399545 ps |
| CPU time | 1270.38 seconds |
| Started | Aug 23 09:00:41 AM UTC 24 |
| Finished | Aug 23 09:22:04 AM UTC 24 |
| Peak memory | 1099944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=505932890 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scrat ch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.kmac_stress_all.505932890 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/24.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/25.kmac_alert_test.1825125257 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 12083590 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 09:01:48 AM UTC 24 |
| Finished | Aug 23 09:01:49 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1825125257 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.kmac_alert_test.1825125257 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/25.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/25.kmac_app.2714922692 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 15333369177 ps |
| CPU time | 74.1 seconds |
| Started | Aug 23 09:01:02 AM UTC 24 |
| Finished | Aug 23 09:02:18 AM UTC 24 |
| Peak memory | 294824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2714922692 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.kmac_app.2714922692 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/25.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/25.kmac_burst_write.3998107832 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 5266705079 ps |
| CPU time | 160.28 seconds |
| Started | Aug 23 09:00:52 AM UTC 24 |
| Finished | Aug 23 09:03:35 AM UTC 24 |
| Peak memory | 239392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3998107832 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.kmac_burst_write.3998107832 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/25.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/25.kmac_entropy_refresh.3831238948 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 282471603555 ps |
| CPU time | 314.13 seconds |
| Started | Aug 23 09:01:35 AM UTC 24 |
| Finished | Aug 23 09:06:54 AM UTC 24 |
| Peak memory | 458580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3831238948 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.kmac_entropy_refresh.3831238948 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/25.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/25.kmac_error.4018055225 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 7778383914 ps |
| CPU time | 135 seconds |
| Started | Aug 23 09:01:35 AM UTC 24 |
| Finished | Aug 23 09:03:53 AM UTC 24 |
| Peak memory | 393108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4018055225 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 25.kmac_error.4018055225 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/25.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/25.kmac_key_error.3390810896 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 1872535757 ps |
| CPU time | 5.27 seconds |
| Started | Aug 23 09:01:38 AM UTC 24 |
| Finished | Aug 23 09:01:44 AM UTC 24 |
| Peak memory | 230416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390810896 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.kmac_key_error.3390810896 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/25.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/25.kmac_lc_escalation.1845700370 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 71678556 ps |
| CPU time | 1.27 seconds |
| Started | Aug 23 09:01:45 AM UTC 24 |
| Finished | Aug 23 09:01:47 AM UTC 24 |
| Peak memory | 234992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1845700370 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.kmac_lc_escalation.1845700370 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/25.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/25.kmac_long_msg_and_output.3143841414 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 1030750642789 ps |
| CPU time | 4609.41 seconds |
| Started | Aug 23 09:00:46 AM UTC 24 |
| Finished | Aug 23 10:18:16 AM UTC 24 |
| Peak memory | 5496232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3143841414 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.kmac_long_msg_and_output.3143841414 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/25.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/25.kmac_sideload.4052216061 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 1126837469 ps |
| CPU time | 46.3 seconds |
| Started | Aug 23 09:00:47 AM UTC 24 |
| Finished | Aug 23 09:01:35 AM UTC 24 |
| Peak memory | 251740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052216061 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.kmac_sideload.4052216061 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/25.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/25.kmac_smoke.3688890607 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 778991769 ps |
| CPU time | 15.15 seconds |
| Started | Aug 23 09:00:45 AM UTC 24 |
| Finished | Aug 23 09:01:01 AM UTC 24 |
| Peak memory | 230640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3688890607 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 25.kmac_smoke.3688890607 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/25.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/25.kmac_stress_all.4072127096 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 36534514161 ps |
| CPU time | 790.08 seconds |
| Started | Aug 23 09:01:46 AM UTC 24 |
| Finished | Aug 23 09:15:04 AM UTC 24 |
| Peak memory | 448600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4072127096 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.kmac_stress_all.4072127096 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/25.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/26.kmac_alert_test.221329193 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 23433667 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 09:03:18 AM UTC 24 |
| Finished | Aug 23 09:03:20 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=221329193 -assert nopostproc +UVM_TESTNA ME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.kmac_alert_test.221329193 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/26.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/26.kmac_app.1023209118 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 35970946107 ps |
| CPU time | 175.73 seconds |
| Started | Aug 23 09:02:21 AM UTC 24 |
| Finished | Aug 23 09:05:20 AM UTC 24 |
| Peak memory | 415580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1023209118 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.kmac_app.1023209118 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/26.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/26.kmac_burst_write.2853176915 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 16517592939 ps |
| CPU time | 638.12 seconds |
| Started | Aug 23 09:02:19 AM UTC 24 |
| Finished | Aug 23 09:13:04 AM UTC 24 |
| Peak memory | 249676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2853176915 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.kmac_burst_write.2853176915 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/26.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/26.kmac_entropy_refresh.401189067 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 2401119633 ps |
| CPU time | 86.12 seconds |
| Started | Aug 23 09:02:21 AM UTC 24 |
| Finished | Aug 23 09:03:49 AM UTC 24 |
| Peak memory | 274436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=401189067 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_reg ression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.kmac_entropy_refresh.401189067 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/26.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/26.kmac_error.585403750 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 55539862565 ps |
| CPU time | 351.09 seconds |
| Started | Aug 23 09:02:33 AM UTC 24 |
| Finished | Aug 23 09:08:29 AM UTC 24 |
| Peak memory | 597804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=585403750 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 26.kmac_error.585403750 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/26.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/26.kmac_key_error.2493859320 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 1673917888 ps |
| CPU time | 7.83 seconds |
| Started | Aug 23 09:02:56 AM UTC 24 |
| Finished | Aug 23 09:03:05 AM UTC 24 |
| Peak memory | 230408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2493859320 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.kmac_key_error.2493859320 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/26.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/26.kmac_lc_escalation.722861084 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 1540753309 ps |
| CPU time | 6.89 seconds |
| Started | Aug 23 09:03:06 AM UTC 24 |
| Finished | Aug 23 09:03:14 AM UTC 24 |
| Peak memory | 241144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=722861084 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmaske d-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.kmac_lc_escalation.722861084 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/26.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/26.kmac_long_msg_and_output.2688649132 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 20373828276 ps |
| CPU time | 1305.52 seconds |
| Started | Aug 23 09:02:12 AM UTC 24 |
| Finished | Aug 23 09:24:11 AM UTC 24 |
| Peak memory | 1169428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2688649132 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.kmac_long_msg_and_output.2688649132 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/26.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/26.kmac_sideload.1585528878 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 2335959582 ps |
| CPU time | 36.95 seconds |
| Started | Aug 23 09:02:16 AM UTC 24 |
| Finished | Aug 23 09:02:54 AM UTC 24 |
| Peak memory | 251816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1585528878 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.kmac_sideload.1585528878 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/26.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/26.kmac_smoke.2511459558 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 2687598297 ps |
| CPU time | 29.91 seconds |
| Started | Aug 23 09:01:50 AM UTC 24 |
| Finished | Aug 23 09:02:21 AM UTC 24 |
| Peak memory | 230684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2511459558 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 26.kmac_smoke.2511459558 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/26.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/26.kmac_stress_all.2672129513 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 15173293882 ps |
| CPU time | 869.86 seconds |
| Started | Aug 23 09:03:15 AM UTC 24 |
| Finished | Aug 23 09:17:54 AM UTC 24 |
| Peak memory | 770356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2672129513 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.kmac_stress_all.2672129513 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/26.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/27.kmac_alert_test.2182519185 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 30211399 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 09:04:04 AM UTC 24 |
| Finished | Aug 23 09:04:06 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2182519185 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.kmac_alert_test.2182519185 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/27.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/27.kmac_app.3701137745 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 12010099214 ps |
| CPU time | 271.1 seconds |
| Started | Aug 23 09:03:37 AM UTC 24 |
| Finished | Aug 23 09:08:12 AM UTC 24 |
| Peak memory | 522180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701137745 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.kmac_app.3701137745 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/27.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/27.kmac_burst_write.709948791 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 1264397960 ps |
| CPU time | 26.3 seconds |
| Started | Aug 23 09:03:35 AM UTC 24 |
| Finished | Aug 23 09:04:03 AM UTC 24 |
| Peak memory | 235228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=709948791 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.kmac_burst_write.709948791 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/27.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/27.kmac_entropy_refresh.3907924126 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 3270281954 ps |
| CPU time | 30.08 seconds |
| Started | Aug 23 09:03:50 AM UTC 24 |
| Finished | Aug 23 09:04:22 AM UTC 24 |
| Peak memory | 246948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3907924126 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.kmac_entropy_refresh.3907924126 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/27.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/27.kmac_error.2400691315 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 28157084081 ps |
| CPU time | 264.79 seconds |
| Started | Aug 23 09:03:52 AM UTC 24 |
| Finished | Aug 23 09:08:20 AM UTC 24 |
| Peak memory | 530328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2400691315 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 27.kmac_error.2400691315 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/27.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/27.kmac_key_error.403085354 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 174754218 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 09:03:54 AM UTC 24 |
| Finished | Aug 23 09:03:56 AM UTC 24 |
| Peak memory | 229672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=403085354 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.kmac_key_error.403085354 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/27.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/27.kmac_lc_escalation.4280444652 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 196045725 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 09:03:57 AM UTC 24 |
| Finished | Aug 23 09:03:59 AM UTC 24 |
| Peak memory | 231828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4280444652 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.kmac_lc_escalation.4280444652 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/27.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/27.kmac_long_msg_and_output.2527250820 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 157624442706 ps |
| CPU time | 2014.59 seconds |
| Started | Aug 23 09:03:23 AM UTC 24 |
| Finished | Aug 23 09:37:17 AM UTC 24 |
| Peak memory | 2977828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2527250820 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.kmac_long_msg_and_output.2527250820 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/27.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/27.kmac_sideload.107932020 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 14684083824 ps |
| CPU time | 325.66 seconds |
| Started | Aug 23 09:03:32 AM UTC 24 |
| Finished | Aug 23 09:09:02 AM UTC 24 |
| Peak memory | 595804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=107932020 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regressi on_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.kmac_sideload.107932020 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/27.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/27.kmac_smoke.2217512357 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 1087341225 ps |
| CPU time | 15.82 seconds |
| Started | Aug 23 09:03:20 AM UTC 24 |
| Finished | Aug 23 09:03:37 AM UTC 24 |
| Peak memory | 230700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217512357 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 27.kmac_smoke.2217512357 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/27.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/27.kmac_stress_all.3392418002 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 8930847193 ps |
| CPU time | 464.4 seconds |
| Started | Aug 23 09:04:00 AM UTC 24 |
| Finished | Aug 23 09:11:50 AM UTC 24 |
| Peak memory | 481380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3392418002 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.kmac_stress_all.3392418002 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/27.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/28.kmac_alert_test.769642009 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 17887938 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 09:05:21 AM UTC 24 |
| Finished | Aug 23 09:05:22 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=769642009 -assert nopostproc +UVM_TESTNA ME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.kmac_alert_test.769642009 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/28.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/28.kmac_app.488027208 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 958362306 ps |
| CPU time | 23.09 seconds |
| Started | Aug 23 09:04:39 AM UTC 24 |
| Finished | Aug 23 09:05:04 AM UTC 24 |
| Peak memory | 237408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=488027208 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.kmac_app.488027208 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/28.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/28.kmac_burst_write.4133306616 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 2927673535 ps |
| CPU time | 89.9 seconds |
| Started | Aug 23 09:04:36 AM UTC 24 |
| Finished | Aug 23 09:06:08 AM UTC 24 |
| Peak memory | 235216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133306616 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.kmac_burst_write.4133306616 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/28.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/28.kmac_entropy_refresh.3141500249 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 20016321471 ps |
| CPU time | 146.14 seconds |
| Started | Aug 23 09:04:55 AM UTC 24 |
| Finished | Aug 23 09:07:24 AM UTC 24 |
| Peak memory | 296792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3141500249 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.kmac_entropy_refresh.3141500249 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/28.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/28.kmac_error.3044898542 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 3113897030 ps |
| CPU time | 70.5 seconds |
| Started | Aug 23 09:05:04 AM UTC 24 |
| Finished | Aug 23 09:06:17 AM UTC 24 |
| Peak memory | 307156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3044898542 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 28.kmac_error.3044898542 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/28.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/28.kmac_key_error.4268683094 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 443970180 ps |
| CPU time | 2.35 seconds |
| Started | Aug 23 09:05:13 AM UTC 24 |
| Finished | Aug 23 09:05:16 AM UTC 24 |
| Peak memory | 230428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268683094 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.kmac_key_error.4268683094 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/28.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/28.kmac_lc_escalation.4250690454 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 144045009 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 09:05:17 AM UTC 24 |
| Finished | Aug 23 09:05:19 AM UTC 24 |
| Peak memory | 229676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4250690454 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.kmac_lc_escalation.4250690454 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/28.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/28.kmac_long_msg_and_output.2470743510 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 38910617290 ps |
| CPU time | 845.79 seconds |
| Started | Aug 23 09:04:14 AM UTC 24 |
| Finished | Aug 23 09:18:28 AM UTC 24 |
| Peak memory | 1599364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470743510 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.kmac_long_msg_and_output.2470743510 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/28.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/28.kmac_sideload.2850394911 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 18165897465 ps |
| CPU time | 312.48 seconds |
| Started | Aug 23 09:04:23 AM UTC 24 |
| Finished | Aug 23 09:09:40 AM UTC 24 |
| Peak memory | 390940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2850394911 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.kmac_sideload.2850394911 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/28.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/28.kmac_smoke.131279139 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 464143879 ps |
| CPU time | 6.77 seconds |
| Started | Aug 23 09:04:06 AM UTC 24 |
| Finished | Aug 23 09:04:14 AM UTC 24 |
| Peak memory | 230516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=131279139 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 28.kmac_smoke.131279139 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/28.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/28.kmac_stress_all.2721237691 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 383283642 ps |
| CPU time | 5.45 seconds |
| Started | Aug 23 09:05:20 AM UTC 24 |
| Finished | Aug 23 09:05:26 AM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2721237691 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.kmac_stress_all.2721237691 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/28.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/29.kmac_alert_test.3094237351 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 17138942 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 09:06:55 AM UTC 24 |
| Finished | Aug 23 09:06:57 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3094237351 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.kmac_alert_test.3094237351 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/29.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/29.kmac_app.4202584390 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 3904293870 ps |
| CPU time | 80.1 seconds |
| Started | Aug 23 09:06:08 AM UTC 24 |
| Finished | Aug 23 09:07:30 AM UTC 24 |
| Peak memory | 331548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4202584390 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.kmac_app.4202584390 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/29.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/29.kmac_burst_write.2285016438 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 17889169281 ps |
| CPU time | 151.86 seconds |
| Started | Aug 23 09:05:46 AM UTC 24 |
| Finished | Aug 23 09:08:20 AM UTC 24 |
| Peak memory | 239640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285016438 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.kmac_burst_write.2285016438 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/29.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/29.kmac_entropy_refresh.1278954964 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 3707896567 ps |
| CPU time | 38.01 seconds |
| Started | Aug 23 09:06:17 AM UTC 24 |
| Finished | Aug 23 09:06:57 AM UTC 24 |
| Peak memory | 247632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1278954964 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.kmac_entropy_refresh.1278954964 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/29.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/29.kmac_error.1389575427 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 16699402516 ps |
| CPU time | 219.26 seconds |
| Started | Aug 23 09:06:17 AM UTC 24 |
| Finished | Aug 23 09:10:00 AM UTC 24 |
| Peak memory | 347976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1389575427 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 29.kmac_error.1389575427 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/29.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/29.kmac_key_error.2112202916 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 819539930 ps |
| CPU time | 4.6 seconds |
| Started | Aug 23 09:06:26 AM UTC 24 |
| Finished | Aug 23 09:06:31 AM UTC 24 |
| Peak memory | 230448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2112202916 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.kmac_key_error.2112202916 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/29.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/29.kmac_lc_escalation.2108212985 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 43997312 ps |
| CPU time | 1.13 seconds |
| Started | Aug 23 09:06:32 AM UTC 24 |
| Finished | Aug 23 09:06:34 AM UTC 24 |
| Peak memory | 231704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108212985 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.kmac_lc_escalation.2108212985 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/29.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/29.kmac_long_msg_and_output.758362788 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 189360108527 ps |
| CPU time | 2359.25 seconds |
| Started | Aug 23 09:05:27 AM UTC 24 |
| Finished | Aug 23 09:45:08 AM UTC 24 |
| Peak memory | 3424096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=758362788 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.kmac_long_msg_and_output.758362788 +enable_mask ing=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/29.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/29.kmac_sideload.1088056583 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 55089732600 ps |
| CPU time | 160.39 seconds |
| Started | Aug 23 09:05:39 AM UTC 24 |
| Finished | Aug 23 09:08:22 AM UTC 24 |
| Peak memory | 382808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088056583 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.kmac_sideload.1088056583 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/29.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/29.kmac_smoke.214340798 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 4167030976 ps |
| CPU time | 60.49 seconds |
| Started | Aug 23 09:05:23 AM UTC 24 |
| Finished | Aug 23 09:06:25 AM UTC 24 |
| Peak memory | 234672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=214340798 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 29.kmac_smoke.214340798 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/29.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/29.kmac_stress_all.2403479935 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 79825129798 ps |
| CPU time | 1081.46 seconds |
| Started | Aug 23 09:06:35 AM UTC 24 |
| Finished | Aug 23 09:24:47 AM UTC 24 |
| Peak memory | 1493088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403479935 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.kmac_stress_all.2403479935 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/29.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_alert_test.899398031 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 43861425 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 08:23:28 AM UTC 24 |
| Finished | Aug 23 08:23:30 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=899398031 -assert nopostproc +UVM_TESTNA ME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_alert_test.899398031 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_app.2518277650 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 67096031 ps |
| CPU time | 2.54 seconds |
| Started | Aug 23 08:21:41 AM UTC 24 |
| Finished | Aug 23 08:21:45 AM UTC 24 |
| Peak memory | 230508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2518277650 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_app.2518277650 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_app_with_partial_data.1482468965 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 32466787238 ps |
| CPU time | 238.49 seconds |
| Started | Aug 23 08:21:42 AM UTC 24 |
| Finished | Aug 23 08:25:44 AM UTC 24 |
| Peak memory | 335664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482468965 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_with_partial_data_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_app_with_partial_data.1482468965 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_app_with_partial_data/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_burst_write.1274609347 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 18833446401 ps |
| CPU time | 301.96 seconds |
| Started | Aug 23 08:20:53 AM UTC 24 |
| Finished | Aug 23 08:25:58 AM UTC 24 |
| Peak memory | 247640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274609347 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_burst_write.1274609347 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_edn_timeout_error.744699183 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 4584520237 ps |
| CPU time | 36.56 seconds |
| Started | Aug 23 08:22:02 AM UTC 24 |
| Finished | Aug 23 08:22:39 AM UTC 24 |
| Peak memory | 235404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=744699183 -assert nopostproc +UVM_TESTNAME=kmac_base_tes t +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_edn_timeout_error.744699183 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_entropy_mode_error.3986248661 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 3653202376 ps |
| CPU time | 23.74 seconds |
| Started | Aug 23 08:22:28 AM UTC 24 |
| Finished | Aug 23 08:22:53 AM UTC 24 |
| Peak memory | 235228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3986248661 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_entropy_mode_error.3986248661 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_entropy_ready_error.3675137329 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 6474094197 ps |
| CPU time | 47.41 seconds |
| Started | Aug 23 08:22:39 AM UTC 24 |
| Finished | Aug 23 08:23:28 AM UTC 24 |
| Peak memory | 230808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3675137329 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_entropy_ready_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_ unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_entropy_ready_error.3675137329 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_entropy_ready_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_entropy_refresh.3150067726 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 4208145770 ps |
| CPU time | 135.96 seconds |
| Started | Aug 23 08:21:42 AM UTC 24 |
| Finished | Aug 23 08:24:01 AM UTC 24 |
| Peak memory | 300884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3150067726 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_entropy_refresh.3150067726 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_error.4023794599 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 12772373197 ps |
| CPU time | 220.01 seconds |
| Started | Aug 23 08:21:49 AM UTC 24 |
| Finished | Aug 23 08:25:33 AM UTC 24 |
| Peak memory | 497576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4023794599 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_error.4023794599 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_key_error.1562121507 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 4097212539 ps |
| CPU time | 3.39 seconds |
| Started | Aug 23 08:21:57 AM UTC 24 |
| Finished | Aug 23 08:22:01 AM UTC 24 |
| Peak memory | 230460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1562121507 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_key_error.1562121507 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_lc_escalation.3031448383 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 223944851 ps |
| CPU time | 1.13 seconds |
| Started | Aug 23 08:22:40 AM UTC 24 |
| Finished | Aug 23 08:22:42 AM UTC 24 |
| Peak memory | 229808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3031448383 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_lc_escalation.3031448383 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_long_msg_and_output.3089408331 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 139061497448 ps |
| CPU time | 1068.78 seconds |
| Started | Aug 23 08:20:44 AM UTC 24 |
| Finished | Aug 23 08:38:44 AM UTC 24 |
| Peak memory | 1832804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3089408331 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_long_msg_and_output.3089408331 +enable_mas king=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_sec_cm.1575794257 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 25144401086 ps |
| CPU time | 54.66 seconds |
| Started | Aug 23 08:23:07 AM UTC 24 |
| Finished | Aug 23 08:24:03 AM UTC 24 |
| Peak memory | 285604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_R ELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1575794257 -assert nopostproc +UVM_TESTNA ME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_sec_cm.1575794257 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_sideload.883567586 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 13657132683 ps |
| CPU time | 239.89 seconds |
| Started | Aug 23 08:20:51 AM UTC 24 |
| Finished | Aug 23 08:24:54 AM UTC 24 |
| Peak memory | 528224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=883567586 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regressi on_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_sideload.883567586 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_smoke.3181075495 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 2299626054 ps |
| CPU time | 24.76 seconds |
| Started | Aug 23 08:20:44 AM UTC 24 |
| Finished | Aug 23 08:21:09 AM UTC 24 |
| Peak memory | 234748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3181075495 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_smoke.3181075495 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_stress_all.2218271740 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 11837842521 ps |
| CPU time | 430.79 seconds |
| Started | Aug 23 08:22:43 AM UTC 24 |
| Finished | Aug 23 08:29:59 AM UTC 24 |
| Peak memory | 587740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2218271740 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_stress_all.2218271740 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_test_vectors_kmac.4050451217 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 65090732 ps |
| CPU time | 1.82 seconds |
| Started | Aug 23 08:21:34 AM UTC 24 |
| Finished | Aug 23 08:21:37 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4050451217 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_v ectors_kmac_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.kmac_test_vectors_kmac.4050451217 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_test_vectors_kmac/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_test_vectors_kmac_xof.3936693221 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 125550866 ps |
| CPU time | 1.88 seconds |
| Started | Aug 23 08:21:38 AM UTC 24 |
| Finished | Aug 23 08:21:41 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936693221 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_v ectors_kmac_xof_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs /coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_test_vectors_kmac_xof.3936693221 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_test_vectors_kmac_xof/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_test_vectors_sha3_224.128056111 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 1770954353 ps |
| CPU time | 37.24 seconds |
| Started | Aug 23 08:21:03 AM UTC 24 |
| Finished | Aug 23 08:21:41 AM UTC 24 |
| Peak memory | 257732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=224 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=128056111 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/re po/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_test_vectors_sha3_224.128056111 + enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_test_vectors_sha3_224/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_test_vectors_sha3_256.1186669927 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 2190024174 ps |
| CPU time | 28.21 seconds |
| Started | Aug 23 08:21:11 AM UTC 24 |
| Finished | Aug 23 08:21:40 AM UTC 24 |
| Peak memory | 230636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=256 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1186669927 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_test_vectors_sha3_256.1186669927 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_test_vectors_sha3_256/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_test_vectors_sha3_384.129166248 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 13371840213 ps |
| CPU time | 986.6 seconds |
| Started | Aug 23 08:21:12 AM UTC 24 |
| Finished | Aug 23 08:37:49 AM UTC 24 |
| Peak memory | 919236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=384 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=129166248 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/re po/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_test_vectors_sha3_384.129166248 + enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_test_vectors_sha3_384/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_test_vectors_sha3_512.2545315397 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 64603168871 ps |
| CPU time | 951.24 seconds |
| Started | Aug 23 08:21:17 AM UTC 24 |
| Finished | Aug 23 08:37:18 AM UTC 24 |
| Peak memory | 1740484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=512 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2545315397 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_test_vectors_sha3_512.2545315397 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_test_vectors_sha3_512/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_test_vectors_shake_128.2992620606 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 48820857095 ps |
| CPU time | 167.04 seconds |
| Started | Aug 23 08:21:23 AM UTC 24 |
| Finished | Aug 23 08:24:13 AM UTC 24 |
| Peak memory | 440012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_shake_variant=128 +cdc_instrumentation _enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2992620606 -assert no postproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_shake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces /repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_test_vectors_shake_128.2992620 606 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_test_vectors_shake_128/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/3.kmac_test_vectors_shake_256.4109337916 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 6620000213 ps |
| CPU time | 251.07 seconds |
| Started | Aug 23 08:21:25 AM UTC 24 |
| Finished | Aug 23 08:25:40 AM UTC 24 |
| Peak memory | 263872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_shake_variant=256 +cdc_instrumentation _enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109337916 -assert no postproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_shake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces /repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.kmac_test_vectors_shake_256.4109337 916 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/3.kmac_test_vectors_shake_256/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/30.kmac_alert_test.2774975913 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 87186621 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 09:08:21 AM UTC 24 |
| Finished | Aug 23 09:08:22 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774975913 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.kmac_alert_test.2774975913 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/30.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/30.kmac_app.1233532995 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 15955372945 ps |
| CPU time | 271.02 seconds |
| Started | Aug 23 09:07:24 AM UTC 24 |
| Finished | Aug 23 09:11:59 AM UTC 24 |
| Peak memory | 524220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1233532995 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.kmac_app.1233532995 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/30.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/30.kmac_burst_write.3463684875 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 7755953837 ps |
| CPU time | 557.55 seconds |
| Started | Aug 23 09:07:03 AM UTC 24 |
| Finished | Aug 23 09:16:27 AM UTC 24 |
| Peak memory | 249760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3463684875 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.kmac_burst_write.3463684875 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/30.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/30.kmac_entropy_refresh.2844985313 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 3685778385 ps |
| CPU time | 71.69 seconds |
| Started | Aug 23 09:07:29 AM UTC 24 |
| Finished | Aug 23 09:08:43 AM UTC 24 |
| Peak memory | 304980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2844985313 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.kmac_entropy_refresh.2844985313 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/30.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/30.kmac_error.583610562 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 11561784663 ps |
| CPU time | 211.3 seconds |
| Started | Aug 23 09:07:32 AM UTC 24 |
| Finished | Aug 23 09:11:06 AM UTC 24 |
| Peak memory | 464740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=583610562 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 30.kmac_error.583610562 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/30.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/30.kmac_key_error.2551947192 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 944259044 ps |
| CPU time | 4.67 seconds |
| Started | Aug 23 09:08:13 AM UTC 24 |
| Finished | Aug 23 09:08:18 AM UTC 24 |
| Peak memory | 230376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551947192 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.kmac_key_error.2551947192 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/30.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/30.kmac_lc_escalation.2267939779 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 398726369 ps |
| CPU time | 17.64 seconds |
| Started | Aug 23 09:08:19 AM UTC 24 |
| Finished | Aug 23 09:08:37 AM UTC 24 |
| Peak memory | 245468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2267939779 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.kmac_lc_escalation.2267939779 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/30.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/30.kmac_long_msg_and_output.3575514146 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 93512752571 ps |
| CPU time | 399.58 seconds |
| Started | Aug 23 09:06:58 AM UTC 24 |
| Finished | Aug 23 09:13:43 AM UTC 24 |
| Peak memory | 806656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3575514146 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.kmac_long_msg_and_output.3575514146 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/30.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/30.kmac_sideload.2540441283 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 314325374 ps |
| CPU time | 1.87 seconds |
| Started | Aug 23 09:07:00 AM UTC 24 |
| Finished | Aug 23 09:07:03 AM UTC 24 |
| Peak memory | 229796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2540441283 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.kmac_sideload.2540441283 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/30.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/30.kmac_smoke.2079503925 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 2059708700 ps |
| CPU time | 30.4 seconds |
| Started | Aug 23 09:06:57 AM UTC 24 |
| Finished | Aug 23 09:07:29 AM UTC 24 |
| Peak memory | 235260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2079503925 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 30.kmac_smoke.2079503925 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/30.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/30.kmac_stress_all.1495821618 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 21762674367 ps |
| CPU time | 205.33 seconds |
| Started | Aug 23 09:08:21 AM UTC 24 |
| Finished | Aug 23 09:11:49 AM UTC 24 |
| Peak memory | 354132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1495821618 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.kmac_stress_all.1495821618 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/30.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/31.kmac_alert_test.80662726 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 210935466 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 09:09:40 AM UTC 24 |
| Finished | Aug 23 09:09:42 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=80662726 -assert nopostproc +UVM_TESTNAM E=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.kmac_alert_test.80662726 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/31.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/31.kmac_app.609602699 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 2096825738 ps |
| CPU time | 34.26 seconds |
| Started | Aug 23 09:08:43 AM UTC 24 |
| Finished | Aug 23 09:09:19 AM UTC 24 |
| Peak memory | 265944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=609602699 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.kmac_app.609602699 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/31.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/31.kmac_burst_write.1670105997 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 60145887387 ps |
| CPU time | 852.49 seconds |
| Started | Aug 23 09:08:38 AM UTC 24 |
| Finished | Aug 23 09:23:00 AM UTC 24 |
| Peak memory | 268132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1670105997 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.kmac_burst_write.1670105997 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/31.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/31.kmac_entropy_refresh.2300791681 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 37285783489 ps |
| CPU time | 275.05 seconds |
| Started | Aug 23 09:09:02 AM UTC 24 |
| Finished | Aug 23 09:13:41 AM UTC 24 |
| Peak memory | 501652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300791681 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.kmac_entropy_refresh.2300791681 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/31.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/31.kmac_error.2899723141 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 9320628436 ps |
| CPU time | 54.25 seconds |
| Started | Aug 23 09:09:19 AM UTC 24 |
| Finished | Aug 23 09:10:15 AM UTC 24 |
| Peak memory | 298772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899723141 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 31.kmac_error.2899723141 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/31.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/31.kmac_key_error.3671539232 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 2265710412 ps |
| CPU time | 3.58 seconds |
| Started | Aug 23 09:09:21 AM UTC 24 |
| Finished | Aug 23 09:09:25 AM UTC 24 |
| Peak memory | 230764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3671539232 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.kmac_key_error.3671539232 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/31.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/31.kmac_lc_escalation.348432472 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 5036951929 ps |
| CPU time | 20.65 seconds |
| Started | Aug 23 09:09:22 AM UTC 24 |
| Finished | Aug 23 09:09:44 AM UTC 24 |
| Peak memory | 247772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=348432472 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmaske d-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.kmac_lc_escalation.348432472 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/31.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/31.kmac_long_msg_and_output.3400247167 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 24171788578 ps |
| CPU time | 2077.8 seconds |
| Started | Aug 23 09:08:23 AM UTC 24 |
| Finished | Aug 23 09:43:21 AM UTC 24 |
| Peak memory | 1769352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400247167 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.kmac_long_msg_and_output.3400247167 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/31.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/31.kmac_sideload.1870574329 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 9911333284 ps |
| CPU time | 198.79 seconds |
| Started | Aug 23 09:08:30 AM UTC 24 |
| Finished | Aug 23 09:11:52 AM UTC 24 |
| Peak memory | 339744 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1870574329 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.kmac_sideload.1870574329 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/31.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/31.kmac_smoke.553916564 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 20680838269 ps |
| CPU time | 56.69 seconds |
| Started | Aug 23 09:08:23 AM UTC 24 |
| Finished | Aug 23 09:09:21 AM UTC 24 |
| Peak memory | 234804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=553916564 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 31.kmac_smoke.553916564 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/31.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/31.kmac_stress_all.1831941394 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 2099394745 ps |
| CPU time | 29.66 seconds |
| Started | Aug 23 09:09:26 AM UTC 24 |
| Finished | Aug 23 09:09:57 AM UTC 24 |
| Peak memory | 249688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1831941394 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.kmac_stress_all.1831941394 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/31.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/32.kmac_alert_test.1325054240 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 22026482 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 09:10:18 AM UTC 24 |
| Finished | Aug 23 09:10:20 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1325054240 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.kmac_alert_test.1325054240 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/32.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/32.kmac_app.3873208145 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 3281435857 ps |
| CPU time | 108.36 seconds |
| Started | Aug 23 09:09:57 AM UTC 24 |
| Finished | Aug 23 09:11:48 AM UTC 24 |
| Peak memory | 292688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3873208145 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.kmac_app.3873208145 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/32.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/32.kmac_burst_write.2755953937 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 25997622704 ps |
| CPU time | 670.01 seconds |
| Started | Aug 23 09:09:51 AM UTC 24 |
| Finished | Aug 23 09:21:09 AM UTC 24 |
| Peak memory | 264032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2755953937 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.kmac_burst_write.2755953937 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/32.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/32.kmac_entropy_refresh.1492489606 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 9946995736 ps |
| CPU time | 73.07 seconds |
| Started | Aug 23 09:09:59 AM UTC 24 |
| Finished | Aug 23 09:11:14 AM UTC 24 |
| Peak memory | 290776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1492489606 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.kmac_entropy_refresh.1492489606 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/32.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/32.kmac_error.2104295927 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 8428420614 ps |
| CPU time | 149.48 seconds |
| Started | Aug 23 09:10:01 AM UTC 24 |
| Finished | Aug 23 09:12:32 AM UTC 24 |
| Peak memory | 393128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2104295927 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 32.kmac_error.2104295927 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/32.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/32.kmac_key_error.2669393624 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 2647508699 ps |
| CPU time | 3.12 seconds |
| Started | Aug 23 09:10:13 AM UTC 24 |
| Finished | Aug 23 09:10:17 AM UTC 24 |
| Peak memory | 230692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2669393624 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.kmac_key_error.2669393624 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/32.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/32.kmac_lc_escalation.84901112 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 649404464 ps |
| CPU time | 1.28 seconds |
| Started | Aug 23 09:10:15 AM UTC 24 |
| Finished | Aug 23 09:10:17 AM UTC 24 |
| Peak memory | 229724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=84901112 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST _SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked -sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.kmac_lc_escalation.84901112 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/32.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/32.kmac_long_msg_and_output.1050091012 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 203828775727 ps |
| CPU time | 2977.07 seconds |
| Started | Aug 23 09:09:43 AM UTC 24 |
| Finished | Aug 23 09:59:48 AM UTC 24 |
| Peak memory | 4011856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1050091012 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.kmac_long_msg_and_output.1050091012 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/32.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/32.kmac_sideload.2086795576 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 12527994444 ps |
| CPU time | 282.09 seconds |
| Started | Aug 23 09:09:44 AM UTC 24 |
| Finished | Aug 23 09:14:30 AM UTC 24 |
| Peak memory | 560972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086795576 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.kmac_sideload.2086795576 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/32.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/32.kmac_smoke.1566625255 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 703740187 ps |
| CPU time | 15.32 seconds |
| Started | Aug 23 09:09:42 AM UTC 24 |
| Finished | Aug 23 09:09:59 AM UTC 24 |
| Peak memory | 230552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1566625255 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 32.kmac_smoke.1566625255 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/32.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/32.kmac_stress_all.956550043 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 59121032662 ps |
| CPU time | 583.77 seconds |
| Started | Aug 23 09:10:16 AM UTC 24 |
| Finished | Aug 23 09:20:06 AM UTC 24 |
| Peak memory | 497736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=956550043 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scrat ch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.kmac_stress_all.956550043 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/32.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/33.kmac_alert_test.3341725507 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 41035238 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 09:12:01 AM UTC 24 |
| Finished | Aug 23 09:12:02 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3341725507 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.kmac_alert_test.3341725507 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/33.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/33.kmac_app.4268861948 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 47010943183 ps |
| CPU time | 145.82 seconds |
| Started | Aug 23 09:11:15 AM UTC 24 |
| Finished | Aug 23 09:13:43 AM UTC 24 |
| Peak memory | 309072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268861948 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.kmac_app.4268861948 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/33.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/33.kmac_burst_write.3108576420 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 170497835246 ps |
| CPU time | 530.62 seconds |
| Started | Aug 23 09:11:07 AM UTC 24 |
| Finished | Aug 23 09:20:03 AM UTC 24 |
| Peak memory | 255776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3108576420 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.kmac_burst_write.3108576420 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/33.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/33.kmac_entropy_refresh.4125069551 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 4911484572 ps |
| CPU time | 136.04 seconds |
| Started | Aug 23 09:11:49 AM UTC 24 |
| Finished | Aug 23 09:14:07 AM UTC 24 |
| Peak memory | 305024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4125069551 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.kmac_entropy_refresh.4125069551 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/33.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/33.kmac_error.897471391 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 75032772526 ps |
| CPU time | 353.88 seconds |
| Started | Aug 23 09:11:50 AM UTC 24 |
| Finished | Aug 23 09:17:48 AM UTC 24 |
| Peak memory | 644976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=897471391 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 33.kmac_error.897471391 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/33.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/33.kmac_key_error.3759965938 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 6243601114 ps |
| CPU time | 8.51 seconds |
| Started | Aug 23 09:11:50 AM UTC 24 |
| Finished | Aug 23 09:12:00 AM UTC 24 |
| Peak memory | 232480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3759965938 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.kmac_key_error.3759965938 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/33.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/33.kmac_lc_escalation.401564885 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 1597189486 ps |
| CPU time | 14.76 seconds |
| Started | Aug 23 09:11:52 AM UTC 24 |
| Finished | Aug 23 09:12:08 AM UTC 24 |
| Peak memory | 245472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=401564885 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmaske d-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.kmac_lc_escalation.401564885 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/33.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/33.kmac_long_msg_and_output.787429430 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 3722598643 ps |
| CPU time | 124.21 seconds |
| Started | Aug 23 09:10:20 AM UTC 24 |
| Finished | Aug 23 09:12:27 AM UTC 24 |
| Peak memory | 317256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=787429430 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.kmac_long_msg_and_output.787429430 +enable_mask ing=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/33.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/33.kmac_sideload.3883166672 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 11597730262 ps |
| CPU time | 145.66 seconds |
| Started | Aug 23 09:10:43 AM UTC 24 |
| Finished | Aug 23 09:13:11 AM UTC 24 |
| Peak memory | 386852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3883166672 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.kmac_sideload.3883166672 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/33.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/33.kmac_smoke.3459575404 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 5179815892 ps |
| CPU time | 23.28 seconds |
| Started | Aug 23 09:10:18 AM UTC 24 |
| Finished | Aug 23 09:10:42 AM UTC 24 |
| Peak memory | 235272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3459575404 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 33.kmac_smoke.3459575404 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/33.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/33.kmac_stress_all.1350540939 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 19252256740 ps |
| CPU time | 622.57 seconds |
| Started | Aug 23 09:12:00 AM UTC 24 |
| Finished | Aug 23 09:22:30 AM UTC 24 |
| Peak memory | 610460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1350540939 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.kmac_stress_all.1350540939 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/33.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/34.kmac_alert_test.3083956310 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 76956384 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 09:13:47 AM UTC 24 |
| Finished | Aug 23 09:13:49 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083956310 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.kmac_alert_test.3083956310 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/34.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/34.kmac_app.2879476473 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 12443822830 ps |
| CPU time | 274.85 seconds |
| Started | Aug 23 09:12:44 AM UTC 24 |
| Finished | Aug 23 09:17:23 AM UTC 24 |
| Peak memory | 524196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2879476473 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.kmac_app.2879476473 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/34.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/34.kmac_burst_write.1114937966 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 67607954424 ps |
| CPU time | 865.71 seconds |
| Started | Aug 23 09:12:33 AM UTC 24 |
| Finished | Aug 23 09:27:08 AM UTC 24 |
| Peak memory | 270368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114937966 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.kmac_burst_write.1114937966 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/34.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/34.kmac_entropy_refresh.808100652 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 13005331269 ps |
| CPU time | 114.11 seconds |
| Started | Aug 23 09:13:05 AM UTC 24 |
| Finished | Aug 23 09:15:02 AM UTC 24 |
| Peak memory | 290644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=808100652 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_reg ression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.kmac_entropy_refresh.808100652 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/34.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/34.kmac_error.1251037314 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 4583485748 ps |
| CPU time | 139.37 seconds |
| Started | Aug 23 09:13:13 AM UTC 24 |
| Finished | Aug 23 09:15:34 AM UTC 24 |
| Peak memory | 317204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251037314 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 34.kmac_error.1251037314 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/34.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/34.kmac_key_error.3186178882 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 3433070456 ps |
| CPU time | 4.62 seconds |
| Started | Aug 23 09:13:42 AM UTC 24 |
| Finished | Aug 23 09:13:47 AM UTC 24 |
| Peak memory | 230540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186178882 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.kmac_key_error.3186178882 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/34.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/34.kmac_lc_escalation.18072634 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 37212905 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 09:13:44 AM UTC 24 |
| Finished | Aug 23 09:13:46 AM UTC 24 |
| Peak memory | 229720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=18072634 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST _SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked -sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.kmac_lc_escalation.18072634 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/34.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/34.kmac_long_msg_and_output.1086708976 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 27161562513 ps |
| CPU time | 646.01 seconds |
| Started | Aug 23 09:12:09 AM UTC 24 |
| Finished | Aug 23 09:23:02 AM UTC 24 |
| Peak memory | 1202056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086708976 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.kmac_long_msg_and_output.1086708976 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/34.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/34.kmac_sideload.1605932794 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 3613046400 ps |
| CPU time | 231.55 seconds |
| Started | Aug 23 09:12:28 AM UTC 24 |
| Finished | Aug 23 09:16:23 AM UTC 24 |
| Peak memory | 354268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1605932794 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.kmac_sideload.1605932794 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/34.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/34.kmac_smoke.4277368048 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 5674948436 ps |
| CPU time | 39.21 seconds |
| Started | Aug 23 09:12:03 AM UTC 24 |
| Finished | Aug 23 09:12:43 AM UTC 24 |
| Peak memory | 232752 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4277368048 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 34.kmac_smoke.4277368048 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/34.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/34.kmac_stress_all.1697578659 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 10648600208 ps |
| CPU time | 428.07 seconds |
| Started | Aug 23 09:13:44 AM UTC 24 |
| Finished | Aug 23 09:20:57 AM UTC 24 |
| Peak memory | 366692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1697578659 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.kmac_stress_all.1697578659 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/34.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/35.kmac_alert_test.441537954 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 21115947 ps |
| CPU time | 0.65 seconds |
| Started | Aug 23 09:15:43 AM UTC 24 |
| Finished | Aug 23 09:15:45 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=441537954 -assert nopostproc +UVM_TESTNA ME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.kmac_alert_test.441537954 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/35.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/35.kmac_app.1321666999 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 8976543272 ps |
| CPU time | 213.12 seconds |
| Started | Aug 23 09:14:40 AM UTC 24 |
| Finished | Aug 23 09:18:16 AM UTC 24 |
| Peak memory | 343832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1321666999 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.kmac_app.1321666999 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/35.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/35.kmac_burst_write.1164572454 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 162441475480 ps |
| CPU time | 793.46 seconds |
| Started | Aug 23 09:14:32 AM UTC 24 |
| Finished | Aug 23 09:27:54 AM UTC 24 |
| Peak memory | 270156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1164572454 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.kmac_burst_write.1164572454 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/35.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/35.kmac_entropy_refresh.4013477587 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 65185270769 ps |
| CPU time | 275.41 seconds |
| Started | Aug 23 09:15:03 AM UTC 24 |
| Finished | Aug 23 09:19:42 AM UTC 24 |
| Peak memory | 499536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4013477587 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.kmac_entropy_refresh.4013477587 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/35.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/35.kmac_error.3389976062 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 16643754581 ps |
| CPU time | 259.24 seconds |
| Started | Aug 23 09:15:05 AM UTC 24 |
| Finished | Aug 23 09:19:28 AM UTC 24 |
| Peak memory | 382808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3389976062 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 35.kmac_error.3389976062 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/35.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/35.kmac_lc_escalation.283793790 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 3213993748 ps |
| CPU time | 6.81 seconds |
| Started | Aug 23 09:15:35 AM UTC 24 |
| Finished | Aug 23 09:15:43 AM UTC 24 |
| Peak memory | 245588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=283793790 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmaske d-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.kmac_lc_escalation.283793790 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/35.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/35.kmac_long_msg_and_output.3002838800 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 428778729666 ps |
| CPU time | 2842.29 seconds |
| Started | Aug 23 09:13:49 AM UTC 24 |
| Finished | Aug 23 10:01:38 AM UTC 24 |
| Peak memory | 3948380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002838800 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.kmac_long_msg_and_output.3002838800 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/35.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/35.kmac_sideload.3409861317 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 31321624399 ps |
| CPU time | 80.59 seconds |
| Started | Aug 23 09:14:08 AM UTC 24 |
| Finished | Aug 23 09:15:31 AM UTC 24 |
| Peak memory | 321372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409861317 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.kmac_sideload.3409861317 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/35.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/35.kmac_smoke.1939231040 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 3886251481 ps |
| CPU time | 49.16 seconds |
| Started | Aug 23 09:13:48 AM UTC 24 |
| Finished | Aug 23 09:14:39 AM UTC 24 |
| Peak memory | 232668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939231040 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 35.kmac_smoke.1939231040 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/35.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/35.kmac_stress_all.2448733647 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 1768979429 ps |
| CPU time | 27.24 seconds |
| Started | Aug 23 09:15:36 AM UTC 24 |
| Finished | Aug 23 09:16:05 AM UTC 24 |
| Peak memory | 268248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2448733647 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.kmac_stress_all.2448733647 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/35.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/36.kmac_alert_test.1898433072 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 112514472 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 09:17:58 AM UTC 24 |
| Finished | Aug 23 09:18:00 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1898433072 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.kmac_alert_test.1898433072 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/36.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/36.kmac_app.738243710 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 15591190278 ps |
| CPU time | 197.41 seconds |
| Started | Aug 23 09:16:24 AM UTC 24 |
| Finished | Aug 23 09:19:45 AM UTC 24 |
| Peak memory | 333640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=738243710 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.kmac_app.738243710 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/36.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/36.kmac_burst_write.489330222 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 2163149326 ps |
| CPU time | 164.6 seconds |
| Started | Aug 23 09:16:21 AM UTC 24 |
| Finished | Aug 23 09:19:09 AM UTC 24 |
| Peak memory | 237344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=489330222 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.kmac_burst_write.489330222 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/36.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/36.kmac_entropy_refresh.3975260697 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 34138621733 ps |
| CPU time | 127.98 seconds |
| Started | Aug 23 09:16:28 AM UTC 24 |
| Finished | Aug 23 09:18:38 AM UTC 24 |
| Peak memory | 364320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3975260697 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.kmac_entropy_refresh.3975260697 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/36.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/36.kmac_error.2338795088 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 46839463212 ps |
| CPU time | 390.99 seconds |
| Started | Aug 23 09:17:23 AM UTC 24 |
| Finished | Aug 23 09:23:59 AM UTC 24 |
| Peak memory | 659348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2338795088 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 36.kmac_error.2338795088 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/36.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/36.kmac_key_error.953845187 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 1749494974 ps |
| CPU time | 2.94 seconds |
| Started | Aug 23 09:17:50 AM UTC 24 |
| Finished | Aug 23 09:17:54 AM UTC 24 |
| Peak memory | 232424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=953845187 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.kmac_key_error.953845187 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/36.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/36.kmac_lc_escalation.2722517209 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 115267398 ps |
| CPU time | 1.06 seconds |
| Started | Aug 23 09:17:55 AM UTC 24 |
| Finished | Aug 23 09:17:57 AM UTC 24 |
| Peak memory | 229836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722517209 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.kmac_lc_escalation.2722517209 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/36.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/36.kmac_long_msg_and_output.2316236900 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 33967809839 ps |
| CPU time | 635.5 seconds |
| Started | Aug 23 09:15:52 AM UTC 24 |
| Finished | Aug 23 09:26:35 AM UTC 24 |
| Peak memory | 714844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2316236900 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.kmac_long_msg_and_output.2316236900 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/36.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/36.kmac_sideload.2482665850 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 3727633553 ps |
| CPU time | 244.88 seconds |
| Started | Aug 23 09:16:06 AM UTC 24 |
| Finished | Aug 23 09:20:15 AM UTC 24 |
| Peak memory | 358236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2482665850 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.kmac_sideload.2482665850 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/36.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/36.kmac_smoke.1317251605 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 78066306 ps |
| CPU time | 3.84 seconds |
| Started | Aug 23 09:15:46 AM UTC 24 |
| Finished | Aug 23 09:15:50 AM UTC 24 |
| Peak memory | 230636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1317251605 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 36.kmac_smoke.1317251605 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/36.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/36.kmac_stress_all.616377499 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 216655930510 ps |
| CPU time | 1193.4 seconds |
| Started | Aug 23 09:17:55 AM UTC 24 |
| Finished | Aug 23 09:38:00 AM UTC 24 |
| Peak memory | 1525596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=616377499 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scrat ch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.kmac_stress_all.616377499 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/36.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/37.kmac_alert_test.2239453325 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 47748876 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 09:19:42 AM UTC 24 |
| Finished | Aug 23 09:19:44 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239453325 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.kmac_alert_test.2239453325 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/37.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/37.kmac_app.2156846632 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 5073355678 ps |
| CPU time | 208.48 seconds |
| Started | Aug 23 09:18:56 AM UTC 24 |
| Finished | Aug 23 09:22:27 AM UTC 24 |
| Peak memory | 335812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2156846632 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.kmac_app.2156846632 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/37.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/37.kmac_burst_write.2384014431 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 11541527685 ps |
| CPU time | 353.03 seconds |
| Started | Aug 23 09:18:40 AM UTC 24 |
| Finished | Aug 23 09:24:37 AM UTC 24 |
| Peak memory | 249696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2384014431 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.kmac_burst_write.2384014431 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/37.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/37.kmac_entropy_refresh.989643082 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 4461380545 ps |
| CPU time | 16.56 seconds |
| Started | Aug 23 09:19:10 AM UTC 24 |
| Finished | Aug 23 09:19:28 AM UTC 24 |
| Peak memory | 251740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=989643082 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_reg ression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.kmac_entropy_refresh.989643082 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/37.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/37.kmac_error.1022824725 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 37098348196 ps |
| CPU time | 340.2 seconds |
| Started | Aug 23 09:19:28 AM UTC 24 |
| Finished | Aug 23 09:25:12 AM UTC 24 |
| Peak memory | 651032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022824725 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 37.kmac_error.1022824725 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/37.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/37.kmac_key_error.1872771277 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 5781045064 ps |
| CPU time | 4.5 seconds |
| Started | Aug 23 09:19:28 AM UTC 24 |
| Finished | Aug 23 09:19:34 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1872771277 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.kmac_key_error.1872771277 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/37.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/37.kmac_lc_escalation.1570723046 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 85505050 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 09:19:34 AM UTC 24 |
| Finished | Aug 23 09:19:36 AM UTC 24 |
| Peak memory | 231760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570723046 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.kmac_lc_escalation.1570723046 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/37.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/37.kmac_long_msg_and_output.2920700386 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 301235399544 ps |
| CPU time | 2551.49 seconds |
| Started | Aug 23 09:18:16 AM UTC 24 |
| Finished | Aug 23 10:01:12 AM UTC 24 |
| Peak memory | 3573536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920700386 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.kmac_long_msg_and_output.2920700386 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/37.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/37.kmac_sideload.3449127924 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 43497056919 ps |
| CPU time | 273.71 seconds |
| Started | Aug 23 09:18:29 AM UTC 24 |
| Finished | Aug 23 09:23:07 AM UTC 24 |
| Peak memory | 534368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449127924 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.kmac_sideload.3449127924 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/37.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/37.kmac_smoke.3211717564 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 3807877735 ps |
| CPU time | 52.71 seconds |
| Started | Aug 23 09:18:01 AM UTC 24 |
| Finished | Aug 23 09:18:55 AM UTC 24 |
| Peak memory | 232660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3211717564 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 37.kmac_smoke.3211717564 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/37.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/37.kmac_stress_all.4080285334 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 24794091593 ps |
| CPU time | 717.5 seconds |
| Started | Aug 23 09:19:37 AM UTC 24 |
| Finished | Aug 23 09:31:43 AM UTC 24 |
| Peak memory | 436124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4080285334 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.kmac_stress_all.4080285334 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/37.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/38.kmac_alert_test.3995291856 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 41196141 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 09:21:09 AM UTC 24 |
| Finished | Aug 23 09:21:11 AM UTC 24 |
| Peak memory | 214264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3995291856 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.kmac_alert_test.3995291856 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/38.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/38.kmac_app.1350727431 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 70448743179 ps |
| CPU time | 282 seconds |
| Started | Aug 23 09:20:07 AM UTC 24 |
| Finished | Aug 23 09:24:53 AM UTC 24 |
| Peak memory | 538520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1350727431 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.kmac_app.1350727431 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/38.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/38.kmac_burst_write.1938049992 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 157954177856 ps |
| CPU time | 738.07 seconds |
| Started | Aug 23 09:20:04 AM UTC 24 |
| Finished | Aug 23 09:32:30 AM UTC 24 |
| Peak memory | 266212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1938049992 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.kmac_burst_write.1938049992 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/38.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/38.kmac_entropy_refresh.4278833095 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 108084345744 ps |
| CPU time | 318.09 seconds |
| Started | Aug 23 09:20:15 AM UTC 24 |
| Finished | Aug 23 09:25:37 AM UTC 24 |
| Peak memory | 530328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4278833095 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.kmac_entropy_refresh.4278833095 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/38.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/38.kmac_error.1566434377 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 17589979576 ps |
| CPU time | 293.2 seconds |
| Started | Aug 23 09:20:31 AM UTC 24 |
| Finished | Aug 23 09:25:29 AM UTC 24 |
| Peak memory | 397076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1566434377 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 38.kmac_error.1566434377 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/38.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/38.kmac_key_error.3762389630 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 2678131157 ps |
| CPU time | 2.5 seconds |
| Started | Aug 23 09:20:59 AM UTC 24 |
| Finished | Aug 23 09:21:02 AM UTC 24 |
| Peak memory | 230492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3762389630 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.kmac_key_error.3762389630 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/38.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/38.kmac_lc_escalation.1764803337 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 49482777 ps |
| CPU time | 1.15 seconds |
| Started | Aug 23 09:21:03 AM UTC 24 |
| Finished | Aug 23 09:21:05 AM UTC 24 |
| Peak memory | 229788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1764803337 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.kmac_lc_escalation.1764803337 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/38.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/38.kmac_long_msg_and_output.3627526188 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 109357418499 ps |
| CPU time | 2102.2 seconds |
| Started | Aug 23 09:19:46 AM UTC 24 |
| Finished | Aug 23 09:55:07 AM UTC 24 |
| Peak memory | 3202836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627526188 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.kmac_long_msg_and_output.3627526188 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/38.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/38.kmac_sideload.4150347689 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 1882476679 ps |
| CPU time | 30.26 seconds |
| Started | Aug 23 09:19:59 AM UTC 24 |
| Finished | Aug 23 09:20:30 AM UTC 24 |
| Peak memory | 257824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4150347689 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.kmac_sideload.4150347689 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/38.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/38.kmac_smoke.2716806065 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 6453108480 ps |
| CPU time | 12.02 seconds |
| Started | Aug 23 09:19:45 AM UTC 24 |
| Finished | Aug 23 09:19:58 AM UTC 24 |
| Peak memory | 230640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2716806065 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 38.kmac_smoke.2716806065 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/38.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/38.kmac_stress_all.1827739763 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 33854098574 ps |
| CPU time | 708.48 seconds |
| Started | Aug 23 09:21:06 AM UTC 24 |
| Finished | Aug 23 09:33:02 AM UTC 24 |
| Peak memory | 1302600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1827739763 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.kmac_stress_all.1827739763 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/38.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/39.kmac_alert_test.2859245567 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 14691076 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 09:23:08 AM UTC 24 |
| Finished | Aug 23 09:23:09 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859245567 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.kmac_alert_test.2859245567 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/39.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/39.kmac_app.2703366947 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 860096935 ps |
| CPU time | 4.99 seconds |
| Started | Aug 23 09:22:31 AM UTC 24 |
| Finished | Aug 23 09:22:37 AM UTC 24 |
| Peak memory | 230504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2703366947 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.kmac_app.2703366947 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/39.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/39.kmac_burst_write.425084522 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 4994882133 ps |
| CPU time | 110.79 seconds |
| Started | Aug 23 09:22:29 AM UTC 24 |
| Finished | Aug 23 09:24:22 AM UTC 24 |
| Peak memory | 235436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=425084522 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.kmac_burst_write.425084522 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/39.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/39.kmac_entropy_refresh.4015012627 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 5234633507 ps |
| CPU time | 73.76 seconds |
| Started | Aug 23 09:22:38 AM UTC 24 |
| Finished | Aug 23 09:23:53 AM UTC 24 |
| Peak memory | 294784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015012627 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.kmac_entropy_refresh.4015012627 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/39.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/39.kmac_error.636546395 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 4747860029 ps |
| CPU time | 300.37 seconds |
| Started | Aug 23 09:22:57 AM UTC 24 |
| Finished | Aug 23 09:28:01 AM UTC 24 |
| Peak memory | 397128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=636546395 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 39.kmac_error.636546395 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/39.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/39.kmac_key_error.2433690710 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 6530531748 ps |
| CPU time | 9.09 seconds |
| Started | Aug 23 09:23:01 AM UTC 24 |
| Finished | Aug 23 09:23:11 AM UTC 24 |
| Peak memory | 230480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2433690710 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.kmac_key_error.2433690710 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/39.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/39.kmac_lc_escalation.2951465728 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 125903639 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 09:23:03 AM UTC 24 |
| Finished | Aug 23 09:23:05 AM UTC 24 |
| Peak memory | 229776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2951465728 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.kmac_lc_escalation.2951465728 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/39.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/39.kmac_long_msg_and_output.1944101061 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 316131975078 ps |
| CPU time | 2044.38 seconds |
| Started | Aug 23 09:21:28 AM UTC 24 |
| Finished | Aug 23 09:55:52 AM UTC 24 |
| Peak memory | 2893644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944101061 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.kmac_long_msg_and_output.1944101061 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/39.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/39.kmac_sideload.3142174356 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 2176638638 ps |
| CPU time | 48.85 seconds |
| Started | Aug 23 09:22:05 AM UTC 24 |
| Finished | Aug 23 09:22:56 AM UTC 24 |
| Peak memory | 280480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3142174356 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.kmac_sideload.3142174356 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/39.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/39.kmac_smoke.3435722084 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 779670094 ps |
| CPU time | 14.49 seconds |
| Started | Aug 23 09:21:12 AM UTC 24 |
| Finished | Aug 23 09:21:28 AM UTC 24 |
| Peak memory | 234720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3435722084 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 39.kmac_smoke.3435722084 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/39.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/39.kmac_stress_all.3215221853 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 70813733617 ps |
| CPU time | 410.8 seconds |
| Started | Aug 23 09:23:06 AM UTC 24 |
| Finished | Aug 23 09:30:02 AM UTC 24 |
| Peak memory | 512068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3215221853 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.kmac_stress_all.3215221853 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/39.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_alert_test.3010260170 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 23469831 ps |
| CPU time | 0.65 seconds |
| Started | Aug 23 08:26:13 AM UTC 24 |
| Finished | Aug 23 08:26:14 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3010260170 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_alert_test.3010260170 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_app.543814287 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 3006782525 ps |
| CPU time | 102.47 seconds |
| Started | Aug 23 08:24:56 AM UTC 24 |
| Finished | Aug 23 08:26:40 AM UTC 24 |
| Peak memory | 282376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=543814287 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_app.543814287 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_app_with_partial_data.3525473352 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 6821826965 ps |
| CPU time | 133.79 seconds |
| Started | Aug 23 08:24:58 AM UTC 24 |
| Finished | Aug 23 08:27:14 AM UTC 24 |
| Peak memory | 354220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3525473352 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_with_partial_data_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_app_with_partial_data.3525473352 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_app_with_partial_data/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_edn_timeout_error.3114572366 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 182940031 ps |
| CPU time | 4.82 seconds |
| Started | Aug 23 08:25:41 AM UTC 24 |
| Finished | Aug 23 08:25:47 AM UTC 24 |
| Peak memory | 230428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114572366 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_edn_timeout_error.3114572366 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_entropy_mode_error.4046182491 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 822555685 ps |
| CPU time | 25.68 seconds |
| Started | Aug 23 08:25:45 AM UTC 24 |
| Finished | Aug 23 08:26:12 AM UTC 24 |
| Peak memory | 235160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4046182491 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_entropy_mode_error.4046182491 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_entropy_ready_error.3597386803 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 6601866807 ps |
| CPU time | 51.57 seconds |
| Started | Aug 23 08:25:46 AM UTC 24 |
| Finished | Aug 23 08:26:39 AM UTC 24 |
| Peak memory | 230628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597386803 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_entropy_ready_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_ unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_entropy_ready_error.3597386803 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_entropy_ready_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_entropy_refresh.2823086830 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 46608682149 ps |
| CPU time | 229.79 seconds |
| Started | Aug 23 08:25:18 AM UTC 24 |
| Finished | Aug 23 08:29:11 AM UTC 24 |
| Peak memory | 464732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2823086830 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_entropy_refresh.2823086830 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_key_error.2592109078 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 776946025 ps |
| CPU time | 4.15 seconds |
| Started | Aug 23 08:25:40 AM UTC 24 |
| Finished | Aug 23 08:25:45 AM UTC 24 |
| Peak memory | 230436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2592109078 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_key_error.2592109078 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_lc_escalation.617437901 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 51948972 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 08:25:47 AM UTC 24 |
| Finished | Aug 23 08:25:50 AM UTC 24 |
| Peak memory | 229852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=617437901 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmaske d-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_lc_escalation.617437901 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_long_msg_and_output.2091205190 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 1186224631 ps |
| CPU time | 88.29 seconds |
| Started | Aug 23 08:23:47 AM UTC 24 |
| Finished | Aug 23 08:25:17 AM UTC 24 |
| Peak memory | 288588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2091205190 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_long_msg_and_output.2091205190 +enable_mas king=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_mubi.551665648 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 8947839202 ps |
| CPU time | 106.97 seconds |
| Started | Aug 23 08:25:33 AM UTC 24 |
| Finished | Aug 23 08:27:22 AM UTC 24 |
| Peak memory | 284960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=551665648 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_mubi_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs /coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_mubi.551665648 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_mubi/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_sec_cm.3522880864 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 5189319387 ps |
| CPU time | 61.38 seconds |
| Started | Aug 23 08:26:00 AM UTC 24 |
| Finished | Aug 23 08:27:03 AM UTC 24 |
| Peak memory | 294220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_R ELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3522880864 -assert nopostproc +UVM_TESTNA ME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_sec_cm.3522880864 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_sideload.2797732968 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 9962571900 ps |
| CPU time | 113.98 seconds |
| Started | Aug 23 08:23:52 AM UTC 24 |
| Finished | Aug 23 08:25:48 AM UTC 24 |
| Peak memory | 358232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2797732968 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_sideload.2797732968 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_stress_all.1386509186 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 27324088260 ps |
| CPU time | 374.3 seconds |
| Started | Aug 23 08:25:50 AM UTC 24 |
| Finished | Aug 23 08:32:08 AM UTC 24 |
| Peak memory | 360300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386509186 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_stress_all.1386509186 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_test_vectors_kmac.471344604 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 442621772 ps |
| CPU time | 2.37 seconds |
| Started | Aug 23 08:24:52 AM UTC 24 |
| Finished | Aug 23 08:24:55 AM UTC 24 |
| Peak memory | 230744 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=471344604 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_ve ctors_kmac_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.kmac_test_vectors_kmac.471344604 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_test_vectors_kmac/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_test_vectors_kmac_xof.1322819470 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 213666743 ps |
| CPU time | 1.65 seconds |
| Started | Aug 23 08:24:55 AM UTC 24 |
| Finished | Aug 23 08:24:57 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1322819470 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_v ectors_kmac_xof_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs /coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_test_vectors_kmac_xof.1322819470 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_test_vectors_kmac_xof/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_test_vectors_sha3_224.1382579965 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 62341023194 ps |
| CPU time | 1908.61 seconds |
| Started | Aug 23 08:24:04 AM UTC 24 |
| Finished | Aug 23 08:56:12 AM UTC 24 |
| Peak memory | 3221292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=224 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382579965 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_test_vectors_sha3_224.1382579965 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_test_vectors_sha3_224/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_test_vectors_sha3_256.80410923 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 10795249060 ps |
| CPU time | 39.1 seconds |
| Started | Aug 23 08:24:10 AM UTC 24 |
| Finished | Aug 23 08:24:51 AM UTC 24 |
| Peak memory | 253696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=256 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=80410923 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_test_vectors_sha3_256.80410923 +en able_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_test_vectors_sha3_256/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_test_vectors_sha3_384.1509578296 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 246087299124 ps |
| CPU time | 1439.65 seconds |
| Started | Aug 23 08:24:14 AM UTC 24 |
| Finished | Aug 23 08:48:28 AM UTC 24 |
| Peak memory | 2408136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=384 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509578296 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_test_vectors_sha3_384.1509578296 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_test_vectors_sha3_384/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_test_vectors_sha3_512.1586951062 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 62160200077 ps |
| CPU time | 703.1 seconds |
| Started | Aug 23 08:24:30 AM UTC 24 |
| Finished | Aug 23 08:36:21 AM UTC 24 |
| Peak memory | 685756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_sha3_variant=512 +cdc_instrumentation_ enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1586951062 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_sha3_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/r epo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_test_vectors_sha3_512.1586951062 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_test_vectors_sha3_512/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_test_vectors_shake_128.627471212 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 9961522116 ps |
| CPU time | 184.29 seconds |
| Started | Aug 23 08:24:47 AM UTC 24 |
| Finished | Aug 23 08:27:54 AM UTC 24 |
| Peak memory | 280272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_shake_variant=128 +cdc_instrumentation _enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=627471212 -assert nop ostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_shake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/ repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_test_vectors_shake_128.62747121 2 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_test_vectors_shake_128/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/4.kmac_test_vectors_shake_256.2512651362 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 92057564311 ps |
| CPU time | 1994.58 seconds |
| Started | Aug 23 08:24:49 AM UTC 24 |
| Finished | Aug 23 08:58:22 AM UTC 24 |
| Peak memory | 3022632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_vectors_dir=/workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=5_000_000_000 +test_vectors_shake_variant=256 +cdc_instrumentation _enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2512651362 -assert no postproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_test_vectors_shake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces /repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.kmac_test_vectors_shake_256.2512651 362 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/4.kmac_test_vectors_shake_256/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/40.kmac_alert_test.355938488 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 47381968 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 09:24:48 AM UTC 24 |
| Finished | Aug 23 09:24:50 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=355938488 -assert nopostproc +UVM_TESTNA ME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.kmac_alert_test.355938488 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/40.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/40.kmac_app.1057210437 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 1718084998 ps |
| CPU time | 74.21 seconds |
| Started | Aug 23 09:23:59 AM UTC 24 |
| Finished | Aug 23 09:25:15 AM UTC 24 |
| Peak memory | 268052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1057210437 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.kmac_app.1057210437 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/40.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/40.kmac_burst_write.936792729 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 4575974779 ps |
| CPU time | 97.06 seconds |
| Started | Aug 23 09:23:54 AM UTC 24 |
| Finished | Aug 23 09:25:33 AM UTC 24 |
| Peak memory | 235056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=936792729 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.kmac_burst_write.936792729 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/40.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/40.kmac_entropy_refresh.2208912523 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 132510913589 ps |
| CPU time | 245.14 seconds |
| Started | Aug 23 09:24:12 AM UTC 24 |
| Finished | Aug 23 09:28:20 AM UTC 24 |
| Peak memory | 435992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2208912523 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.kmac_entropy_refresh.2208912523 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/40.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/40.kmac_error.1194604638 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 1297445718 ps |
| CPU time | 44.95 seconds |
| Started | Aug 23 09:24:23 AM UTC 24 |
| Finished | Aug 23 09:25:09 AM UTC 24 |
| Peak memory | 262044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194604638 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 40.kmac_error.1194604638 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/40.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/40.kmac_key_error.4165195121 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 551474289 ps |
| CPU time | 3.55 seconds |
| Started | Aug 23 09:24:38 AM UTC 24 |
| Finished | Aug 23 09:24:42 AM UTC 24 |
| Peak memory | 230448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4165195121 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.kmac_key_error.4165195121 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/40.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/40.kmac_lc_escalation.49882435 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 52201565 ps |
| CPU time | 1.24 seconds |
| Started | Aug 23 09:24:43 AM UTC 24 |
| Finished | Aug 23 09:24:45 AM UTC 24 |
| Peak memory | 229844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=49882435 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST _SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked -sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.kmac_lc_escalation.49882435 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/40.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/40.kmac_long_msg_and_output.4032723544 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 12154122394 ps |
| CPU time | 218.48 seconds |
| Started | Aug 23 09:23:12 AM UTC 24 |
| Finished | Aug 23 09:26:53 AM UTC 24 |
| Peak memory | 426004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032723544 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.kmac_long_msg_and_output.4032723544 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/40.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/40.kmac_sideload.2978566854 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 8864161782 ps |
| CPU time | 144.83 seconds |
| Started | Aug 23 09:23:50 AM UTC 24 |
| Finished | Aug 23 09:26:17 AM UTC 24 |
| Peak memory | 307040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978566854 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.kmac_sideload.2978566854 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/40.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/40.kmac_smoke.2070971852 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 7825525577 ps |
| CPU time | 38.44 seconds |
| Started | Aug 23 09:23:10 AM UTC 24 |
| Finished | Aug 23 09:23:49 AM UTC 24 |
| Peak memory | 232612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2070971852 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 40.kmac_smoke.2070971852 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/40.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/40.kmac_stress_all.3463570430 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 14160158542 ps |
| CPU time | 206.66 seconds |
| Started | Aug 23 09:24:46 AM UTC 24 |
| Finished | Aug 23 09:28:16 AM UTC 24 |
| Peak memory | 448684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3463570430 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.kmac_stress_all.3463570430 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/40.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/41.kmac_alert_test.3482838054 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 53143717 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 09:25:44 AM UTC 24 |
| Finished | Aug 23 09:25:45 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3482838054 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.kmac_alert_test.3482838054 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/41.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/41.kmac_app.296857823 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 5248432513 ps |
| CPU time | 114.57 seconds |
| Started | Aug 23 09:25:16 AM UTC 24 |
| Finished | Aug 23 09:27:13 AM UTC 24 |
| Peak memory | 358216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=296857823 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.kmac_app.296857823 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/41.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/41.kmac_burst_write.1228890441 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 48911746358 ps |
| CPU time | 332.53 seconds |
| Started | Aug 23 09:25:14 AM UTC 24 |
| Finished | Aug 23 09:30:50 AM UTC 24 |
| Peak memory | 249756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1228890441 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.kmac_burst_write.1228890441 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/41.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/41.kmac_entropy_refresh.2519241408 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 26892492405 ps |
| CPU time | 265.99 seconds |
| Started | Aug 23 09:25:25 AM UTC 24 |
| Finished | Aug 23 09:29:55 AM UTC 24 |
| Peak memory | 495652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2519241408 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.kmac_entropy_refresh.2519241408 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/41.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/41.kmac_error.724292541 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 36455750130 ps |
| CPU time | 338.05 seconds |
| Started | Aug 23 09:25:30 AM UTC 24 |
| Finished | Aug 23 09:31:12 AM UTC 24 |
| Peak memory | 622388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=724292541 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 41.kmac_error.724292541 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/41.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/41.kmac_key_error.1621498263 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 2896423871 ps |
| CPU time | 7.21 seconds |
| Started | Aug 23 09:25:34 AM UTC 24 |
| Finished | Aug 23 09:25:43 AM UTC 24 |
| Peak memory | 230480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621498263 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.kmac_key_error.1621498263 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/41.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/41.kmac_lc_escalation.1405374985 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 53783554 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 09:25:38 AM UTC 24 |
| Finished | Aug 23 09:25:40 AM UTC 24 |
| Peak memory | 229668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405374985 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.kmac_lc_escalation.1405374985 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/41.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/41.kmac_long_msg_and_output.3952637866 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 92004283193 ps |
| CPU time | 3228.4 seconds |
| Started | Aug 23 09:24:54 AM UTC 24 |
| Finished | Aug 23 10:19:12 AM UTC 24 |
| Peak memory | 4333436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3952637866 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.kmac_long_msg_and_output.3952637866 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/41.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/41.kmac_sideload.1770108428 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 1565207075 ps |
| CPU time | 100.05 seconds |
| Started | Aug 23 09:25:10 AM UTC 24 |
| Finished | Aug 23 09:26:52 AM UTC 24 |
| Peak memory | 282332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1770108428 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.kmac_sideload.1770108428 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/41.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/41.kmac_smoke.1540942335 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 35674068042 ps |
| CPU time | 32.42 seconds |
| Started | Aug 23 09:24:50 AM UTC 24 |
| Finished | Aug 23 09:25:24 AM UTC 24 |
| Peak memory | 230636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1540942335 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 41.kmac_smoke.1540942335 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/41.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/41.kmac_stress_all.1940381286 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 4985590994 ps |
| CPU time | 90.12 seconds |
| Started | Aug 23 09:25:42 AM UTC 24 |
| Finished | Aug 23 09:27:13 AM UTC 24 |
| Peak memory | 352400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940381286 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.kmac_stress_all.1940381286 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/41.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/42.kmac_alert_test.3108796728 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 19524528 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 09:27:24 AM UTC 24 |
| Finished | Aug 23 09:27:26 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3108796728 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.kmac_alert_test.3108796728 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/42.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/42.kmac_app.1455342823 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 37078839941 ps |
| CPU time | 175.67 seconds |
| Started | Aug 23 09:26:52 AM UTC 24 |
| Finished | Aug 23 09:29:51 AM UTC 24 |
| Peak memory | 413536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455342823 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.kmac_app.1455342823 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/42.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/42.kmac_burst_write.2149030193 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 7744325538 ps |
| CPU time | 139.73 seconds |
| Started | Aug 23 09:26:35 AM UTC 24 |
| Finished | Aug 23 09:28:57 AM UTC 24 |
| Peak memory | 237412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2149030193 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.kmac_burst_write.2149030193 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/42.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/42.kmac_entropy_refresh.3480858456 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 62839101501 ps |
| CPU time | 279.5 seconds |
| Started | Aug 23 09:26:55 AM UTC 24 |
| Finished | Aug 23 09:31:38 AM UTC 24 |
| Peak memory | 526296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3480858456 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.kmac_entropy_refresh.3480858456 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/42.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/42.kmac_error.556521218 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 10281733698 ps |
| CPU time | 82.42 seconds |
| Started | Aug 23 09:27:09 AM UTC 24 |
| Finished | Aug 23 09:28:33 AM UTC 24 |
| Peak memory | 333652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=556521218 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 42.kmac_error.556521218 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/42.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/42.kmac_key_error.237834746 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 20367402282 ps |
| CPU time | 8.58 seconds |
| Started | Aug 23 09:27:14 AM UTC 24 |
| Finished | Aug 23 09:27:23 AM UTC 24 |
| Peak memory | 230456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=237834746 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.kmac_key_error.237834746 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/42.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/42.kmac_lc_escalation.1172850955 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 82749000 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 09:27:14 AM UTC 24 |
| Finished | Aug 23 09:27:16 AM UTC 24 |
| Peak memory | 229728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1172850955 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.kmac_lc_escalation.1172850955 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/42.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/42.kmac_long_msg_and_output.3695266036 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 103261890769 ps |
| CPU time | 2003.46 seconds |
| Started | Aug 23 09:26:16 AM UTC 24 |
| Finished | Aug 23 09:59:59 AM UTC 24 |
| Peak memory | 1667024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3695266036 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.kmac_long_msg_and_output.3695266036 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/42.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/42.kmac_sideload.3252590783 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 2355433095 ps |
| CPU time | 170.46 seconds |
| Started | Aug 23 09:26:18 AM UTC 24 |
| Finished | Aug 23 09:29:12 AM UTC 24 |
| Peak memory | 321360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252590783 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.kmac_sideload.3252590783 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/42.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/42.kmac_smoke.3280931906 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 2537056009 ps |
| CPU time | 27.99 seconds |
| Started | Aug 23 09:25:46 AM UTC 24 |
| Finished | Aug 23 09:26:15 AM UTC 24 |
| Peak memory | 230612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3280931906 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 42.kmac_smoke.3280931906 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/42.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/42.kmac_stress_all.1109172937 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 29181690229 ps |
| CPU time | 2280.41 seconds |
| Started | Aug 23 09:27:17 AM UTC 24 |
| Finished | Aug 23 10:05:41 AM UTC 24 |
| Peak memory | 890824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1109172937 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.kmac_stress_all.1109172937 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/42.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/43.kmac_alert_test.3864753553 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 99732965 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 09:28:59 AM UTC 24 |
| Finished | Aug 23 09:29:00 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864753553 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.kmac_alert_test.3864753553 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/43.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/43.kmac_app.3391014516 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 4991427296 ps |
| CPU time | 12.08 seconds |
| Started | Aug 23 09:28:21 AM UTC 24 |
| Finished | Aug 23 09:28:34 AM UTC 24 |
| Peak memory | 235348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391014516 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.kmac_app.3391014516 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/43.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/43.kmac_burst_write.3459242368 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 27347904190 ps |
| CPU time | 780.97 seconds |
| Started | Aug 23 09:28:17 AM UTC 24 |
| Finished | Aug 23 09:41:26 AM UTC 24 |
| Peak memory | 268324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3459242368 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.kmac_burst_write.3459242368 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/43.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/43.kmac_entropy_refresh.4115615145 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 8328959094 ps |
| CPU time | 44.67 seconds |
| Started | Aug 23 09:28:23 AM UTC 24 |
| Finished | Aug 23 09:29:09 AM UTC 24 |
| Peak memory | 270096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4115615145 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.kmac_entropy_refresh.4115615145 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/43.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/43.kmac_error.2919457966 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 7378927601 ps |
| CPU time | 162.26 seconds |
| Started | Aug 23 09:28:34 AM UTC 24 |
| Finished | Aug 23 09:31:19 AM UTC 24 |
| Peak memory | 431948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919457966 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 43.kmac_error.2919457966 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/43.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/43.kmac_key_error.3330175742 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 1391765055 ps |
| CPU time | 2.37 seconds |
| Started | Aug 23 09:28:35 AM UTC 24 |
| Finished | Aug 23 09:28:39 AM UTC 24 |
| Peak memory | 230416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3330175742 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.kmac_key_error.3330175742 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/43.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/43.kmac_lc_escalation.3516420311 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 154519216 ps |
| CPU time | 1.22 seconds |
| Started | Aug 23 09:28:39 AM UTC 24 |
| Finished | Aug 23 09:28:42 AM UTC 24 |
| Peak memory | 231704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3516420311 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.kmac_lc_escalation.3516420311 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/43.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/43.kmac_long_msg_and_output.2904759783 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 21267375305 ps |
| CPU time | 1796.57 seconds |
| Started | Aug 23 09:27:54 AM UTC 24 |
| Finished | Aug 23 09:58:08 AM UTC 24 |
| Peak memory | 1562504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2904759783 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.kmac_long_msg_and_output.2904759783 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/43.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/43.kmac_sideload.720883928 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 13506056188 ps |
| CPU time | 252.61 seconds |
| Started | Aug 23 09:28:02 AM UTC 24 |
| Finished | Aug 23 09:32:18 AM UTC 24 |
| Peak memory | 511900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=720883928 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regressi on_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.kmac_sideload.720883928 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/43.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/43.kmac_smoke.2622585461 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 46443541435 ps |
| CPU time | 54.55 seconds |
| Started | Aug 23 09:27:26 AM UTC 24 |
| Finished | Aug 23 09:28:22 AM UTC 24 |
| Peak memory | 235392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2622585461 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 43.kmac_smoke.2622585461 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/43.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/43.kmac_stress_all.1520128339 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 36223490916 ps |
| CPU time | 646 seconds |
| Started | Aug 23 09:28:43 AM UTC 24 |
| Finished | Aug 23 09:39:36 AM UTC 24 |
| Peak memory | 565324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520128339 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.kmac_stress_all.1520128339 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/43.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/44.kmac_alert_test.3413747320 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 47707464 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 09:30:51 AM UTC 24 |
| Finished | Aug 23 09:30:53 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3413747320 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.kmac_alert_test.3413747320 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/44.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/44.kmac_app.2484766200 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 4965111188 ps |
| CPU time | 88.63 seconds |
| Started | Aug 23 09:29:51 AM UTC 24 |
| Finished | Aug 23 09:31:22 AM UTC 24 |
| Peak memory | 321348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2484766200 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.kmac_app.2484766200 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/44.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/44.kmac_burst_write.2305466587 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 24251997766 ps |
| CPU time | 240.68 seconds |
| Started | Aug 23 09:29:18 AM UTC 24 |
| Finished | Aug 23 09:33:22 AM UTC 24 |
| Peak memory | 241628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2305466587 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.kmac_burst_write.2305466587 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/44.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/44.kmac_entropy_refresh.1286052558 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 23827610734 ps |
| CPU time | 44.23 seconds |
| Started | Aug 23 09:29:55 AM UTC 24 |
| Finished | Aug 23 09:30:41 AM UTC 24 |
| Peak memory | 253768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1286052558 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.kmac_entropy_refresh.1286052558 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/44.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/44.kmac_error.2321664940 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 16522050373 ps |
| CPU time | 254.18 seconds |
| Started | Aug 23 09:30:04 AM UTC 24 |
| Finished | Aug 23 09:34:21 AM UTC 24 |
| Peak memory | 376596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2321664940 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 44.kmac_error.2321664940 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/44.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/44.kmac_key_error.3743682274 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 1290884678 ps |
| CPU time | 2.16 seconds |
| Started | Aug 23 09:30:42 AM UTC 24 |
| Finished | Aug 23 09:30:45 AM UTC 24 |
| Peak memory | 230416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3743682274 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.kmac_key_error.3743682274 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/44.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/44.kmac_lc_escalation.3573443087 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 44971319 ps |
| CPU time | 1.25 seconds |
| Started | Aug 23 09:30:46 AM UTC 24 |
| Finished | Aug 23 09:30:48 AM UTC 24 |
| Peak memory | 229788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3573443087 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.kmac_lc_escalation.3573443087 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/44.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/44.kmac_long_msg_and_output.2072715971 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 13870661741 ps |
| CPU time | 394.98 seconds |
| Started | Aug 23 09:29:11 AM UTC 24 |
| Finished | Aug 23 09:35:51 AM UTC 24 |
| Peak memory | 880468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2072715971 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.kmac_long_msg_and_output.2072715971 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/44.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/44.kmac_sideload.1201961164 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 10676708816 ps |
| CPU time | 180.45 seconds |
| Started | Aug 23 09:29:12 AM UTC 24 |
| Finished | Aug 23 09:32:15 AM UTC 24 |
| Peak memory | 444192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1201961164 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.kmac_sideload.1201961164 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/44.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/44.kmac_smoke.652067696 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 1697437169 ps |
| CPU time | 15.17 seconds |
| Started | Aug 23 09:29:01 AM UTC 24 |
| Finished | Aug 23 09:29:17 AM UTC 24 |
| Peak memory | 230508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=652067696 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 44.kmac_smoke.652067696 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/44.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/44.kmac_stress_all.3881859698 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 138600267592 ps |
| CPU time | 842.9 seconds |
| Started | Aug 23 09:30:49 AM UTC 24 |
| Finished | Aug 23 09:45:01 AM UTC 24 |
| Peak memory | 1300520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881859698 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.kmac_stress_all.3881859698 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/44.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/45.kmac_alert_test.3037409792 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 17927760 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 09:32:19 AM UTC 24 |
| Finished | Aug 23 09:32:20 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3037409792 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.kmac_alert_test.3037409792 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/45.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/45.kmac_app.3453265532 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 6783421929 ps |
| CPU time | 33.04 seconds |
| Started | Aug 23 09:31:32 AM UTC 24 |
| Finished | Aug 23 09:32:07 AM UTC 24 |
| Peak memory | 257868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3453265532 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.kmac_app.3453265532 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/45.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/45.kmac_burst_write.3485792642 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 3796298241 ps |
| CPU time | 294.01 seconds |
| Started | Aug 23 09:31:23 AM UTC 24 |
| Finished | Aug 23 09:36:21 AM UTC 24 |
| Peak memory | 243556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485792642 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.kmac_burst_write.3485792642 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/45.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/45.kmac_entropy_refresh.4195641057 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 73291661359 ps |
| CPU time | 148.85 seconds |
| Started | Aug 23 09:31:39 AM UTC 24 |
| Finished | Aug 23 09:34:10 AM UTC 24 |
| Peak memory | 374612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4195641057 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.kmac_entropy_refresh.4195641057 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/45.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/45.kmac_error.2386215340 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 4025714010 ps |
| CPU time | 268.19 seconds |
| Started | Aug 23 09:31:43 AM UTC 24 |
| Finished | Aug 23 09:36:15 AM UTC 24 |
| Peak memory | 374728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386215340 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 45.kmac_error.2386215340 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/45.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/45.kmac_key_error.3482630264 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 10053626189 ps |
| CPU time | 6.96 seconds |
| Started | Aug 23 09:32:07 AM UTC 24 |
| Finished | Aug 23 09:32:15 AM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3482630264 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.kmac_key_error.3482630264 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/45.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/45.kmac_lc_escalation.1323809339 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 37564616 ps |
| CPU time | 1.13 seconds |
| Started | Aug 23 09:32:16 AM UTC 24 |
| Finished | Aug 23 09:32:18 AM UTC 24 |
| Peak memory | 229676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1323809339 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.kmac_lc_escalation.1323809339 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/45.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/45.kmac_long_msg_and_output.1434396825 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 105652180034 ps |
| CPU time | 2265.69 seconds |
| Started | Aug 23 09:31:14 AM UTC 24 |
| Finished | Aug 23 10:09:21 AM UTC 24 |
| Peak memory | 1851280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1434396825 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.kmac_long_msg_and_output.1434396825 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/45.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/45.kmac_sideload.3830444051 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 11657436269 ps |
| CPU time | 61.46 seconds |
| Started | Aug 23 09:31:20 AM UTC 24 |
| Finished | Aug 23 09:32:23 AM UTC 24 |
| Peak memory | 294812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830444051 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.kmac_sideload.3830444051 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/45.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/45.kmac_smoke.910552621 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 5178669774 ps |
| CPU time | 36.11 seconds |
| Started | Aug 23 09:30:53 AM UTC 24 |
| Finished | Aug 23 09:31:31 AM UTC 24 |
| Peak memory | 235460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=910552621 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 45.kmac_smoke.910552621 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/45.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/45.kmac_stress_all.245805362 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 5133015921 ps |
| CPU time | 332.28 seconds |
| Started | Aug 23 09:32:17 AM UTC 24 |
| Finished | Aug 23 09:37:53 AM UTC 24 |
| Peak memory | 317720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=245805362 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scrat ch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.kmac_stress_all.245805362 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/45.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/46.kmac_alert_test.1070482931 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 75903753 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 09:33:46 AM UTC 24 |
| Finished | Aug 23 09:33:48 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1070482931 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.kmac_alert_test.1070482931 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/46.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/46.kmac_app.840310913 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 5748948851 ps |
| CPU time | 161.91 seconds |
| Started | Aug 23 09:32:31 AM UTC 24 |
| Finished | Aug 23 09:35:16 AM UTC 24 |
| Peak memory | 315160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=840310913 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.kmac_app.840310913 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/46.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/46.kmac_burst_write.2248607622 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 16777057777 ps |
| CPU time | 417.01 seconds |
| Started | Aug 23 09:32:31 AM UTC 24 |
| Finished | Aug 23 09:39:33 AM UTC 24 |
| Peak memory | 253792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2248607622 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.kmac_burst_write.2248607622 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/46.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/46.kmac_entropy_refresh.3302646466 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 1994086518 ps |
| CPU time | 28.54 seconds |
| Started | Aug 23 09:33:02 AM UTC 24 |
| Finished | Aug 23 09:33:32 AM UTC 24 |
| Peak memory | 255704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3302646466 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.kmac_entropy_refresh.3302646466 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/46.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/46.kmac_error.1613544303 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 7594048909 ps |
| CPU time | 78.12 seconds |
| Started | Aug 23 09:33:23 AM UTC 24 |
| Finished | Aug 23 09:34:42 AM UTC 24 |
| Peak memory | 327584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1613544303 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 46.kmac_error.1613544303 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/46.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/46.kmac_key_error.1422403331 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 2044724822 ps |
| CPU time | 9.03 seconds |
| Started | Aug 23 09:33:33 AM UTC 24 |
| Finished | Aug 23 09:33:43 AM UTC 24 |
| Peak memory | 230428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1422403331 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.kmac_key_error.1422403331 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/46.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/46.kmac_long_msg_and_output.1709390069 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 27363867648 ps |
| CPU time | 812.1 seconds |
| Started | Aug 23 09:32:21 AM UTC 24 |
| Finished | Aug 23 09:46:02 AM UTC 24 |
| Peak memory | 1519444 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709390069 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.kmac_long_msg_and_output.1709390069 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/46.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/46.kmac_sideload.3315588510 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 13846886037 ps |
| CPU time | 163.25 seconds |
| Started | Aug 23 09:32:24 AM UTC 24 |
| Finished | Aug 23 09:35:10 AM UTC 24 |
| Peak memory | 413528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3315588510 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.kmac_sideload.3315588510 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/46.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/46.kmac_smoke.468717877 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 235670919 ps |
| CPU time | 10.77 seconds |
| Started | Aug 23 09:32:19 AM UTC 24 |
| Finished | Aug 23 09:32:31 AM UTC 24 |
| Peak memory | 230560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=468717877 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 46.kmac_smoke.468717877 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/46.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/46.kmac_stress_all.1235852439 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 19919757165 ps |
| CPU time | 663.04 seconds |
| Started | Aug 23 09:33:44 AM UTC 24 |
| Finished | Aug 23 09:44:54 AM UTC 24 |
| Peak memory | 595864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1235852439 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.kmac_stress_all.1235852439 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/46.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/47.kmac_alert_test.3756576127 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 171405486 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 09:35:52 AM UTC 24 |
| Finished | Aug 23 09:35:53 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3756576127 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.kmac_alert_test.3756576127 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/47.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/47.kmac_app.3339387680 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 7748703470 ps |
| CPU time | 88.54 seconds |
| Started | Aug 23 09:34:43 AM UTC 24 |
| Finished | Aug 23 09:36:13 AM UTC 24 |
| Peak memory | 274272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3339387680 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.kmac_app.3339387680 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/47.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/47.kmac_burst_write.407006750 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 22522752456 ps |
| CPU time | 433.28 seconds |
| Started | Aug 23 09:34:23 AM UTC 24 |
| Finished | Aug 23 09:41:41 AM UTC 24 |
| Peak memory | 251796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=407006750 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.kmac_burst_write.407006750 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/47.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/47.kmac_entropy_refresh.2684293972 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 864825933 ps |
| CPU time | 8.04 seconds |
| Started | Aug 23 09:35:11 AM UTC 24 |
| Finished | Aug 23 09:35:20 AM UTC 24 |
| Peak memory | 245648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2684293972 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.kmac_entropy_refresh.2684293972 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/47.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/47.kmac_error.1548362582 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 12237824153 ps |
| CPU time | 219.85 seconds |
| Started | Aug 23 09:35:17 AM UTC 24 |
| Finished | Aug 23 09:39:00 AM UTC 24 |
| Peak memory | 485288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548362582 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 47.kmac_error.1548362582 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/47.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/47.kmac_key_error.4264249299 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 7501487442 ps |
| CPU time | 6.57 seconds |
| Started | Aug 23 09:35:21 AM UTC 24 |
| Finished | Aug 23 09:35:29 AM UTC 24 |
| Peak memory | 230500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4264249299 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.kmac_key_error.4264249299 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/47.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/47.kmac_lc_escalation.561768287 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 43847211 ps |
| CPU time | 1.11 seconds |
| Started | Aug 23 09:35:29 AM UTC 24 |
| Finished | Aug 23 09:35:32 AM UTC 24 |
| Peak memory | 229796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=561768287 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmaske d-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.kmac_lc_escalation.561768287 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/47.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/47.kmac_long_msg_and_output.695810404 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 135067409804 ps |
| CPU time | 960.01 seconds |
| Started | Aug 23 09:34:11 AM UTC 24 |
| Finished | Aug 23 09:50:21 AM UTC 24 |
| Peak memory | 1697696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=695810404 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.kmac_long_msg_and_output.695810404 +enable_mask ing=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/47.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/47.kmac_sideload.2813885467 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 8890570210 ps |
| CPU time | 152.27 seconds |
| Started | Aug 23 09:34:21 AM UTC 24 |
| Finished | Aug 23 09:36:55 AM UTC 24 |
| Peak memory | 403236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2813885467 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.kmac_sideload.2813885467 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/47.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/47.kmac_smoke.1223801099 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 8296729801 ps |
| CPU time | 29.89 seconds |
| Started | Aug 23 09:33:48 AM UTC 24 |
| Finished | Aug 23 09:34:20 AM UTC 24 |
| Peak memory | 230628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1223801099 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 47.kmac_smoke.1223801099 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/47.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/47.kmac_stress_all.3158828514 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 24543363319 ps |
| CPU time | 180.91 seconds |
| Started | Aug 23 09:35:33 AM UTC 24 |
| Finished | Aug 23 09:38:36 AM UTC 24 |
| Peak memory | 448680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3158828514 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.kmac_stress_all.3158828514 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/47.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/48.kmac_alert_test.2371992795 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 24621280 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 09:38:01 AM UTC 24 |
| Finished | Aug 23 09:38:03 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2371992795 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.kmac_alert_test.2371992795 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/48.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/48.kmac_app.953775276 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 10312263371 ps |
| CPU time | 69.81 seconds |
| Started | Aug 23 09:36:21 AM UTC 24 |
| Finished | Aug 23 09:37:33 AM UTC 24 |
| Peak memory | 292700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=953775276 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.kmac_app.953775276 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/48.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/48.kmac_burst_write.1281073384 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 33235531393 ps |
| CPU time | 885.51 seconds |
| Started | Aug 23 09:36:16 AM UTC 24 |
| Finished | Aug 23 09:51:11 AM UTC 24 |
| Peak memory | 268132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1281073384 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.kmac_burst_write.1281073384 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/48.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/48.kmac_entropy_refresh.2876609881 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 34030097557 ps |
| CPU time | 234.52 seconds |
| Started | Aug 23 09:36:56 AM UTC 24 |
| Finished | Aug 23 09:40:54 AM UTC 24 |
| Peak memory | 468948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2876609881 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.kmac_entropy_refresh.2876609881 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/48.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/48.kmac_error.1175371591 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 4490816127 ps |
| CPU time | 143.57 seconds |
| Started | Aug 23 09:37:19 AM UTC 24 |
| Finished | Aug 23 09:39:45 AM UTC 24 |
| Peak memory | 313112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175371591 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 48.kmac_error.1175371591 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/48.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/48.kmac_key_error.4198638746 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 14304802180 ps |
| CPU time | 8.98 seconds |
| Started | Aug 23 09:37:34 AM UTC 24 |
| Finished | Aug 23 09:37:44 AM UTC 24 |
| Peak memory | 230560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4198638746 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.kmac_key_error.4198638746 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/48.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/48.kmac_lc_escalation.682790272 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 1743370622 ps |
| CPU time | 20.6 seconds |
| Started | Aug 23 09:37:45 AM UTC 24 |
| Finished | Aug 23 09:38:07 AM UTC 24 |
| Peak memory | 247572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=682790272 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmaske d-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.kmac_lc_escalation.682790272 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/48.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/48.kmac_long_msg_and_output.3874333555 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 81389587432 ps |
| CPU time | 984.04 seconds |
| Started | Aug 23 09:35:59 AM UTC 24 |
| Finished | Aug 23 09:52:33 AM UTC 24 |
| Peak memory | 1808340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874333555 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.kmac_long_msg_and_output.3874333555 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/48.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/48.kmac_sideload.1772882880 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 21567280653 ps |
| CPU time | 280.79 seconds |
| Started | Aug 23 09:36:14 AM UTC 24 |
| Finished | Aug 23 09:40:58 AM UTC 24 |
| Peak memory | 536412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772882880 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.kmac_sideload.1772882880 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/48.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/48.kmac_smoke.3292088838 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 282149570 ps |
| CPU time | 3.53 seconds |
| Started | Aug 23 09:35:54 AM UTC 24 |
| Finished | Aug 23 09:35:58 AM UTC 24 |
| Peak memory | 232612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3292088838 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 48.kmac_smoke.3292088838 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/48.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/48.kmac_stress_all.3209832264 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 13332713122 ps |
| CPU time | 491.49 seconds |
| Started | Aug 23 09:37:54 AM UTC 24 |
| Finished | Aug 23 09:46:11 AM UTC 24 |
| Peak memory | 344172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209832264 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.kmac_stress_all.3209832264 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/48.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/49.kmac_alert_test.3987270178 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 56484706 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 09:40:55 AM UTC 24 |
| Finished | Aug 23 09:40:57 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987270178 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.kmac_alert_test.3987270178 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/49.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/49.kmac_app.1947605437 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 58317596497 ps |
| CPU time | 134.82 seconds |
| Started | Aug 23 09:39:01 AM UTC 24 |
| Finished | Aug 23 09:41:18 AM UTC 24 |
| Peak memory | 284520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1947605437 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.kmac_app.1947605437 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/49.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/49.kmac_burst_write.800708402 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 10867245345 ps |
| CPU time | 204.79 seconds |
| Started | Aug 23 09:38:42 AM UTC 24 |
| Finished | Aug 23 09:42:09 AM UTC 24 |
| Peak memory | 239388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=800708402 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.kmac_burst_write.800708402 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/49.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/49.kmac_entropy_refresh.2859988490 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 8465674281 ps |
| CPU time | 136.06 seconds |
| Started | Aug 23 09:39:34 AM UTC 24 |
| Finished | Aug 23 09:41:52 AM UTC 24 |
| Peak memory | 384908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859988490 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.kmac_entropy_refresh.2859988490 +enable_masking=0 +sw _key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/49.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/49.kmac_error.1189051136 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 8182523530 ps |
| CPU time | 248.29 seconds |
| Started | Aug 23 09:39:37 AM UTC 24 |
| Finished | Aug 23 09:43:49 AM UTC 24 |
| Peak memory | 370472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1189051136 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 49.kmac_error.1189051136 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/49.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/49.kmac_key_error.2578614766 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 1646421953 ps |
| CPU time | 4.01 seconds |
| Started | Aug 23 09:39:45 AM UTC 24 |
| Finished | Aug 23 09:39:51 AM UTC 24 |
| Peak memory | 230416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2578614766 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.kmac_key_error.2578614766 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/49.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/49.kmac_lc_escalation.570413199 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 48628336 ps |
| CPU time | 1.13 seconds |
| Started | Aug 23 09:39:51 AM UTC 24 |
| Finished | Aug 23 09:39:54 AM UTC 24 |
| Peak memory | 231828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=570413199 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmaske d-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.kmac_lc_escalation.570413199 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/49.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/49.kmac_long_msg_and_output.3314258440 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 83673397955 ps |
| CPU time | 1763.78 seconds |
| Started | Aug 23 09:38:07 AM UTC 24 |
| Finished | Aug 23 10:07:49 AM UTC 24 |
| Peak memory | 1541980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3314258440 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.kmac_long_msg_and_output.3314258440 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/49.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/49.kmac_sideload.3261284235 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 199606547599 ps |
| CPU time | 344.14 seconds |
| Started | Aug 23 09:38:38 AM UTC 24 |
| Finished | Aug 23 09:44:26 AM UTC 24 |
| Peak memory | 620376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3261284235 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.kmac_sideload.3261284235 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/49.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/49.kmac_smoke.1350079153 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 13747497165 ps |
| CPU time | 35.92 seconds |
| Started | Aug 23 09:38:03 AM UTC 24 |
| Finished | Aug 23 09:38:40 AM UTC 24 |
| Peak memory | 230580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1350079153 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 49.kmac_smoke.1350079153 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/49.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/49.kmac_stress_all.3886980101 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 43533086635 ps |
| CPU time | 1157.45 seconds |
| Started | Aug 23 09:39:54 AM UTC 24 |
| Finished | Aug 23 09:59:25 AM UTC 24 |
| Peak memory | 1036660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3886980101 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.kmac_stress_all.3886980101 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/49.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_alert_test.2016381967 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 51607522 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 08:28:36 AM UTC 24 |
| Finished | Aug 23 08:28:37 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2016381967 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_alert_test.2016381967 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_app.925807065 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 23602142804 ps |
| CPU time | 275.99 seconds |
| Started | Aug 23 08:26:41 AM UTC 24 |
| Finished | Aug 23 08:31:21 AM UTC 24 |
| Peak memory | 515996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=925807065 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_app.925807065 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_app_with_partial_data.890808697 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 3607794325 ps |
| CPU time | 46.73 seconds |
| Started | Aug 23 08:27:03 AM UTC 24 |
| Finished | Aug 23 08:27:51 AM UTC 24 |
| Peak memory | 272544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=890808697 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_with_partial_data_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_app_with_partial_data.890808697 +enable_mask ing=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_app_with_partial_data/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_burst_write.816143298 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 17098810342 ps |
| CPU time | 594.46 seconds |
| Started | Aug 23 08:26:40 AM UTC 24 |
| Finished | Aug 23 08:36:41 AM UTC 24 |
| Peak memory | 251724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=816143298 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_burst_write.816143298 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_edn_timeout_error.4268950472 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 3329590783 ps |
| CPU time | 22.15 seconds |
| Started | Aug 23 08:27:55 AM UTC 24 |
| Finished | Aug 23 08:28:18 AM UTC 24 |
| Peak memory | 235296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268950472 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_edn_timeout_error.4268950472 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_entropy_mode_error.261738434 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 25492910316 ps |
| CPU time | 34.02 seconds |
| Started | Aug 23 08:28:00 AM UTC 24 |
| Finished | Aug 23 08:28:35 AM UTC 24 |
| Peak memory | 235112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=261738434 -assert nopostproc +UVM_TESTNAME=kmac_base_tes t +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_entropy_mode_error.261738434 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_entropy_ready_error.2014610704 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 6986016810 ps |
| CPU time | 44.96 seconds |
| Started | Aug 23 08:28:03 AM UTC 24 |
| Finished | Aug 23 08:28:49 AM UTC 24 |
| Peak memory | 230620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2014610704 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_entropy_ready_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_ unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_entropy_ready_error.2014610704 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_entropy_ready_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_entropy_refresh.4164020356 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 10901024878 ps |
| CPU time | 69.74 seconds |
| Started | Aug 23 08:27:15 AM UTC 24 |
| Finished | Aug 23 08:28:27 AM UTC 24 |
| Peak memory | 262028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4164020356 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_entropy_refresh.4164020356 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_error.553575312 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 3740618823 ps |
| CPU time | 68.68 seconds |
| Started | Aug 23 08:27:33 AM UTC 24 |
| Finished | Aug 23 08:28:44 AM UTC 24 |
| Peak memory | 315372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=553575312 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_error.553575312 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_key_error.2427877842 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 1146812947 ps |
| CPU time | 5.67 seconds |
| Started | Aug 23 08:27:52 AM UTC 24 |
| Finished | Aug 23 08:27:59 AM UTC 24 |
| Peak memory | 230436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2427877842 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_key_error.2427877842 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_lc_escalation.3291701799 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 84441026 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 08:28:19 AM UTC 24 |
| Finished | Aug 23 08:28:21 AM UTC 24 |
| Peak memory | 229800 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291701799 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_lc_escalation.3291701799 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_long_msg_and_output.2239003435 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 78598651526 ps |
| CPU time | 2609.34 seconds |
| Started | Aug 23 08:26:18 AM UTC 24 |
| Finished | Aug 23 09:10:12 AM UTC 24 |
| Peak memory | 3794884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239003435 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_long_msg_and_output.2239003435 +enable_mas king=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_mubi.3795318400 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 9717448754 ps |
| CPU time | 237.32 seconds |
| Started | Aug 23 08:27:22 AM UTC 24 |
| Finished | Aug 23 08:31:23 AM UTC 24 |
| Peak memory | 360540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3795318400 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_mubi_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_mubi.3795318400 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_mubi/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_smoke.728919405 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 2664105652 ps |
| CPU time | 12.63 seconds |
| Started | Aug 23 08:26:16 AM UTC 24 |
| Finished | Aug 23 08:26:30 AM UTC 24 |
| Peak memory | 230716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=728919405 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_smoke.728919405 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/5.kmac_stress_all.787503809 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 262798264159 ps |
| CPU time | 1363.08 seconds |
| Started | Aug 23 08:28:22 AM UTC 24 |
| Finished | Aug 23 08:51:19 AM UTC 24 |
| Peak memory | 1392848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=787503809 -assert nopos tproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scrat ch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.kmac_stress_all.787503809 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/5.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_alert_test.2052028171 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 59016228 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 08:30:34 AM UTC 24 |
| Finished | Aug 23 08:30:36 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2052028171 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_alert_test.2052028171 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_app.2931209284 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 4159369210 ps |
| CPU time | 220.54 seconds |
| Started | Aug 23 08:29:07 AM UTC 24 |
| Finished | Aug 23 08:32:51 AM UTC 24 |
| Peak memory | 348048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2931209284 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_app.2931209284 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_app_with_partial_data.1438180178 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 11986179404 ps |
| CPU time | 88.56 seconds |
| Started | Aug 23 08:29:12 AM UTC 24 |
| Finished | Aug 23 08:30:43 AM UTC 24 |
| Peak memory | 315156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1438180178 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_with_partial_data_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_app_with_partial_data.1438180178 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_app_with_partial_data/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_burst_write.1273064467 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 7518535060 ps |
| CPU time | 557.9 seconds |
| Started | Aug 23 08:28:50 AM UTC 24 |
| Finished | Aug 23 08:38:14 AM UTC 24 |
| Peak memory | 249832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1273064467 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regres sion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_burst_write.1273064467 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_edn_timeout_error.182300288 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 1839302341 ps |
| CPU time | 32.35 seconds |
| Started | Aug 23 08:30:00 AM UTC 24 |
| Finished | Aug 23 08:30:34 AM UTC 24 |
| Peak memory | 235092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=182300288 -assert nopostproc +UVM_TESTNAME=kmac_base_tes t +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_edn_timeout_error.182300288 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_entropy_mode_error.2240929011 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 245015259 ps |
| CPU time | 5.29 seconds |
| Started | Aug 23 08:30:06 AM UTC 24 |
| Finished | Aug 23 08:30:12 AM UTC 24 |
| Peak memory | 228392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2240929011 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_entropy_mode_error.2240929011 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_entropy_ready_error.1872071337 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 2863690701 ps |
| CPU time | 9.28 seconds |
| Started | Aug 23 08:30:09 AM UTC 24 |
| Finished | Aug 23 08:30:19 AM UTC 24 |
| Peak memory | 230704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1872071337 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_entropy_ready_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_ unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_entropy_ready_error.1872071337 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_entropy_ready_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_entropy_refresh.3769222618 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 1191797994 ps |
| CPU time | 17.82 seconds |
| Started | Aug 23 08:29:34 AM UTC 24 |
| Finished | Aug 23 08:29:53 AM UTC 24 |
| Peak memory | 241492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3769222618 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_entropy_refresh.3769222618 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_error.4195082935 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 2388277207 ps |
| CPU time | 15.19 seconds |
| Started | Aug 23 08:29:52 AM UTC 24 |
| Finished | Aug 23 08:30:08 AM UTC 24 |
| Peak memory | 251168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4195082935 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_error.4195082935 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_key_error.3753107722 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 6870270453 ps |
| CPU time | 9.9 seconds |
| Started | Aug 23 08:29:54 AM UTC 24 |
| Finished | Aug 23 08:30:05 AM UTC 24 |
| Peak memory | 230508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3753107722 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_key_error.3753107722 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_lc_escalation.218183915 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 57220786 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 08:30:13 AM UTC 24 |
| Finished | Aug 23 08:30:15 AM UTC 24 |
| Peak memory | 231896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=218183915 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmaske d-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_lc_escalation.218183915 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_long_msg_and_output.3359581717 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 9688465414 ps |
| CPU time | 582.28 seconds |
| Started | Aug 23 08:28:40 AM UTC 24 |
| Finished | Aug 23 08:38:29 AM UTC 24 |
| Peak memory | 686044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3359581717 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_long_msg_and_output.3359581717 +enable_mas king=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_mubi.3395215200 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 97875011586 ps |
| CPU time | 166.91 seconds |
| Started | Aug 23 08:29:38 AM UTC 24 |
| Finished | Aug 23 08:32:27 AM UTC 24 |
| Peak memory | 421980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395215200 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_mubi_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_mubi.3395215200 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_mubi/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_sideload.1465006263 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 8093148378 ps |
| CPU time | 193.3 seconds |
| Started | Aug 23 08:28:44 AM UTC 24 |
| Finished | Aug 23 08:32:00 AM UTC 24 |
| Peak memory | 454496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1465006263 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_sideload.1465006263 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_smoke.2763126223 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 17581879482 ps |
| CPU time | 27.22 seconds |
| Started | Aug 23 08:28:38 AM UTC 24 |
| Finished | Aug 23 08:29:06 AM UTC 24 |
| Peak memory | 230692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2763126223 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_smoke.2763126223 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/6.kmac_stress_all.3835558108 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 150028391085 ps |
| CPU time | 739.21 seconds |
| Started | Aug 23 08:30:16 AM UTC 24 |
| Finished | Aug 23 08:42:43 AM UTC 24 |
| Peak memory | 495812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3835558108 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.kmac_stress_all.3835558108 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/6.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_alert_test.3383511699 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 43705634 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 08:32:28 AM UTC 24 |
| Finished | Aug 23 08:32:30 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383511699 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_alert_test.3383511699 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_app.3855105927 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 426130508 ps |
| CPU time | 7.13 seconds |
| Started | Aug 23 08:31:18 AM UTC 24 |
| Finished | Aug 23 08:31:27 AM UTC 24 |
| Peak memory | 235264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3855105927 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_app.3855105927 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_app_with_partial_data.1398066400 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 28973681125 ps |
| CPU time | 205.45 seconds |
| Started | Aug 23 08:31:22 AM UTC 24 |
| Finished | Aug 23 08:34:51 AM UTC 24 |
| Peak memory | 440144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1398066400 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_with_partial_data_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_app_with_partial_data.1398066400 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_app_with_partial_data/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_burst_write.576891120 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 23663820242 ps |
| CPU time | 468.78 seconds |
| Started | Aug 23 08:31:12 AM UTC 24 |
| Finished | Aug 23 08:39:07 AM UTC 24 |
| Peak memory | 245548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=576891120 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_burst_write.576891120 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_edn_timeout_error.4199477391 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 479852627 ps |
| CPU time | 7.47 seconds |
| Started | Aug 23 08:32:01 AM UTC 24 |
| Finished | Aug 23 08:32:09 AM UTC 24 |
| Peak memory | 235280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4199477391 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_edn_timeout_error.4199477391 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_entropy_mode_error.6841382 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 1466747216 ps |
| CPU time | 26.31 seconds |
| Started | Aug 23 08:32:02 AM UTC 24 |
| Finished | Aug 23 08:32:29 AM UTC 24 |
| Peak memory | 235216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=6841382 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22 /kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_entropy_mode_error.6841382 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_entropy_ready_error.1953083373 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 1945407658 ps |
| CPU time | 22.64 seconds |
| Started | Aug 23 08:32:09 AM UTC 24 |
| Finished | Aug 23 08:32:33 AM UTC 24 |
| Peak memory | 230652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953083373 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_entropy_ready_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_ unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_entropy_ready_error.1953083373 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_entropy_ready_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_entropy_refresh.122752326 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 14118510620 ps |
| CPU time | 218.67 seconds |
| Started | Aug 23 08:31:24 AM UTC 24 |
| Finished | Aug 23 08:35:06 AM UTC 24 |
| Peak memory | 466772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=122752326 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_reg ression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_entropy_refresh.122752326 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_error.4218731782 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 7103738287 ps |
| CPU time | 160.64 seconds |
| Started | Aug 23 08:31:32 AM UTC 24 |
| Finished | Aug 23 08:34:15 AM UTC 24 |
| Peak memory | 423752 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4218731782 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_error.4218731782 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_key_error.1171856194 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 652341159 ps |
| CPU time | 3.74 seconds |
| Started | Aug 23 08:31:57 AM UTC 24 |
| Finished | Aug 23 08:32:01 AM UTC 24 |
| Peak memory | 230712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171856194 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_key_error.1171856194 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_lc_escalation.479850997 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 2219060022 ps |
| CPU time | 9.71 seconds |
| Started | Aug 23 08:32:10 AM UTC 24 |
| Finished | Aug 23 08:32:21 AM UTC 24 |
| Peak memory | 245576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=479850997 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmaske d-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_lc_escalation.479850997 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_long_msg_and_output.781283514 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 11956423454 ps |
| CPU time | 941.78 seconds |
| Started | Aug 23 08:30:36 AM UTC 24 |
| Finished | Aug 23 08:46:28 AM UTC 24 |
| Peak memory | 966620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=781283514 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_long_msg_and_output.781283514 +enable_maski ng=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_mubi.2507221233 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 12393077968 ps |
| CPU time | 182.61 seconds |
| Started | Aug 23 08:31:28 AM UTC 24 |
| Finished | Aug 23 08:34:33 AM UTC 24 |
| Peak memory | 327904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2507221233 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_mubi_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_mubi.2507221233 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_mubi/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_sideload.1520130402 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 7462316068 ps |
| CPU time | 90.22 seconds |
| Started | Aug 23 08:30:43 AM UTC 24 |
| Finished | Aug 23 08:32:15 AM UTC 24 |
| Peak memory | 329496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520130402 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_sideload.1520130402 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_smoke.2573280860 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 2459771023 ps |
| CPU time | 34.96 seconds |
| Started | Aug 23 08:30:35 AM UTC 24 |
| Finished | Aug 23 08:31:11 AM UTC 24 |
| Peak memory | 230768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573280860 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_smoke.2573280860 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/7.kmac_stress_all.1138187961 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 31222357132 ps |
| CPU time | 960.91 seconds |
| Started | Aug 23 08:32:16 AM UTC 24 |
| Finished | Aug 23 08:48:28 AM UTC 24 |
| Peak memory | 1122532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1138187961 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.kmac_stress_all.1138187961 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/7.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_alert_test.3878872247 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 29869450 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 08:35:10 AM UTC 24 |
| Finished | Aug 23 08:35:12 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3878872247 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_alert_test.3878872247 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_app.3928841871 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 4881877303 ps |
| CPU time | 202.65 seconds |
| Started | Aug 23 08:32:51 AM UTC 24 |
| Finished | Aug 23 08:36:17 AM UTC 24 |
| Peak memory | 341840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3928841871 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_app.3928841871 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_app_with_partial_data.1088262347 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 7116754802 ps |
| CPU time | 79.33 seconds |
| Started | Aug 23 08:33:06 AM UTC 24 |
| Finished | Aug 23 08:34:27 AM UTC 24 |
| Peak memory | 296796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088262347 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_with_partial_data_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_app_with_partial_data.1088262347 +enable_ma sking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_app_with_partial_data/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_burst_write.921944207 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 25023275683 ps |
| CPU time | 696.2 seconds |
| Started | Aug 23 08:32:44 AM UTC 24 |
| Finished | Aug 23 08:44:29 AM UTC 24 |
| Peak memory | 264076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=921944207 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_burst_write.921944207 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_edn_timeout_error.1651627169 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 399344350 ps |
| CPU time | 24.99 seconds |
| Started | Aug 23 08:34:32 AM UTC 24 |
| Finished | Aug 23 08:34:59 AM UTC 24 |
| Peak memory | 235396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651627169 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_edn_timeout_error.1651627169 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_entropy_mode_error.1881343622 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 2264337210 ps |
| CPU time | 34.25 seconds |
| Started | Aug 23 08:34:34 AM UTC 24 |
| Finished | Aug 23 08:35:10 AM UTC 24 |
| Peak memory | 235148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1881343622 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08 _22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_entropy_mode_error.1881343622 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_entropy_ready_error.767374592 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 13217376372 ps |
| CPU time | 33.26 seconds |
| Started | Aug 23 08:34:51 AM UTC 24 |
| Finished | Aug 23 08:35:26 AM UTC 24 |
| Peak memory | 230552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=767374592 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_entropy_ready_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_u nmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_entropy_ready_error.767374592 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_entropy_ready_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_entropy_refresh.2198451984 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 5503802342 ps |
| CPU time | 83.57 seconds |
| Started | Aug 23 08:34:07 AM UTC 24 |
| Finished | Aug 23 08:35:32 AM UTC 24 |
| Peak memory | 302916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2198451984 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_entropy_refresh.2198451984 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_key_error.3580243145 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 1661107133 ps |
| CPU time | 2.77 seconds |
| Started | Aug 23 08:34:27 AM UTC 24 |
| Finished | Aug 23 08:34:31 AM UTC 24 |
| Peak memory | 230380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3580243145 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-s im-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_key_error.3580243145 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_lc_escalation.351049679 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 61206692 ps |
| CPU time | 1.64 seconds |
| Started | Aug 23 08:34:59 AM UTC 24 |
| Finished | Aug 23 08:35:02 AM UTC 24 |
| Peak memory | 229804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=351049679 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmaske d-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_lc_escalation.351049679 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_long_msg_and_output.2147237019 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 44898139746 ps |
| CPU time | 1908.82 seconds |
| Started | Aug 23 08:32:30 AM UTC 24 |
| Finished | Aug 23 09:04:39 AM UTC 24 |
| Peak memory | 1617756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2147237019 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_long_msg_and_output.2147237019 +enable_mas king=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_mubi.970156662 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 43921735510 ps |
| CPU time | 209.69 seconds |
| Started | Aug 23 08:34:16 AM UTC 24 |
| Finished | Aug 23 08:37:49 AM UTC 24 |
| Peak memory | 465052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=970156662 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_mubi_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs /coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_mubi.970156662 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_mubi/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_sideload.523113446 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 4560822712 ps |
| CPU time | 90.59 seconds |
| Started | Aug 23 08:32:33 AM UTC 24 |
| Finished | Aug 23 08:34:06 AM UTC 24 |
| Peak memory | 329560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=523113446 -assert nopostproc +UVM_T ESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regressi on_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_sideload.523113446 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_smoke.2990674728 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 2979130234 ps |
| CPU time | 32.96 seconds |
| Started | Aug 23 08:32:30 AM UTC 24 |
| Finished | Aug 23 08:33:04 AM UTC 24 |
| Peak memory | 230696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2990674728 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_smoke.2990674728 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/8.kmac_stress_all.1660649320 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 16779805883 ps |
| CPU time | 1014.08 seconds |
| Started | Aug 23 08:35:02 AM UTC 24 |
| Finished | Aug 23 08:52:07 AM UTC 24 |
| Peak memory | 544948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660649320 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.kmac_stress_all.1660649320 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/8.kmac_stress_all/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_alert_test.3497063097 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 16387622 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 08:37:40 AM UTC 24 |
| Finished | Aug 23 08:37:42 AM UTC 24 |
| Peak memory | 214268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +run_alert_test +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_ RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3497063097 -assert nopostproc +UVM_TESTN AME=kmac_base_test +UVM_TEST_SEQ=kmac_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_alert_test.3497063097 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_app.534173504 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 24332940950 ps |
| CPU time | 186.95 seconds |
| Started | Aug 23 08:35:33 AM UTC 24 |
| Finished | Aug 23 08:38:42 AM UTC 24 |
| Peak memory | 333656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=534173504 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_app.534173504 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_app/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_app_with_partial_data.997610338 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 4270852723 ps |
| CPU time | 112.32 seconds |
| Started | Aug 23 08:35:52 AM UTC 24 |
| Finished | Aug 23 08:37:46 AM UTC 24 |
| Peak memory | 282384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=997610338 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_app_with_partial_data_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_app_with_partial_data.997610338 +enable_mask ing=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_app_with_partial_data/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_burst_write.800890494 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 64957623621 ps |
| CPU time | 459.14 seconds |
| Started | Aug 23 08:35:27 AM UTC 24 |
| Finished | Aug 23 08:43:11 AM UTC 24 |
| Peak memory | 253788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=800890494 -assert nopostproc +UVM_TES TNAME=kmac_base_test +UVM_TEST_SEQ=kmac_burst_write_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_burst_write.800890494 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_burst_write/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_edn_timeout_error.2004409965 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 511594797 ps |
| CPU time | 17.2 seconds |
| Started | Aug 23 08:36:46 AM UTC 24 |
| Finished | Aug 23 08:37:05 AM UTC 24 |
| Peak memory | 235344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004409965 -assert nopostproc +UVM_TESTNAME=kmac_base_te st +UVM_TEST_SEQ=kmac_edn_timeout_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_edn_timeout_error.2004409965 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_edn_timeout_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_entropy_mode_error.251488741 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 698817904 ps |
| CPU time | 7.07 seconds |
| Started | Aug 23 08:36:54 AM UTC 24 |
| Finished | Aug 23 08:37:03 AM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +en_scb=0 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=251488741 -assert nopostproc +UVM_TESTNAME=kmac_base_tes t +UVM_TEST_SEQ=kmac_entropy_mode_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_entropy_mode_error.251488741 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_entropy_mode_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_entropy_ready_error.2905462301 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 20142207051 ps |
| CPU time | 37.52 seconds |
| Started | Aug 23 08:37:04 AM UTC 24 |
| Finished | Aug 23 08:37:42 AM UTC 24 |
| Peak memory | 230576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2905462301 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_entropy_ready_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_ unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_entropy_ready_error.2905462301 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_entropy_ready_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_entropy_refresh.1987555692 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 34661997894 ps |
| CPU time | 224.12 seconds |
| Started | Aug 23 08:36:07 AM UTC 24 |
| Finished | Aug 23 08:39:54 AM UTC 24 |
| Peak memory | 340008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=500_000_000 +cdc_instrumentation_enabled=1 +UVM_ NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1987555692 -assert nopostproc +UVM_TE STNAME=kmac_base_test +UVM_TEST_SEQ=kmac_entropy_refresh_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_re gression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_entropy_refresh.1987555692 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_entropy_refresh/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_error.2149685937 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 16350225204 ps |
| CPU time | 255.83 seconds |
| Started | Aug 23 08:36:21 AM UTC 24 |
| Finished | Aug 23 08:40:40 AM UTC 24 |
| Peak memory | 382876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2149685937 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_error.2149685937 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_key_error.790273770 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 1235764812 ps |
| CPU time | 3.45 seconds |
| Started | Aug 23 08:36:41 AM UTC 24 |
| Finished | Aug 23 08:36:46 AM UTC 24 |
| Peak memory | 230480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=790273770 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TES T_SEQ=kmac_key_error_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_key_error.790273770 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_key_error/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_lc_escalation.1298366690 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 50483791 ps |
| CPU time | 1.12 seconds |
| Started | Aug 23 08:37:06 AM UTC 24 |
| Finished | Aug 23 08:37:08 AM UTC 24 |
| Peak memory | 229968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1298366690 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_lc_escalation_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmask ed-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_lc_escalation.1298366690 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_lc_escalation/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_long_msg_and_output.4250120744 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 2229622172 ps |
| CPU time | 52.82 seconds |
| Started | Aug 23 08:35:12 AM UTC 24 |
| Finished | Aug 23 08:36:07 AM UTC 24 |
| Peak memory | 309076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +cdc_instrumentation_enabled=1 +U VM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4250120744 -assert nopostproc +UVM _TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_long_msg_and_output_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_long_msg_and_output.4250120744 +enable_mas king=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_long_msg_and_output/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_mubi.2677377594 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 7422714195 ps |
| CPU time | 131.89 seconds |
| Started | Aug 23 08:36:18 AM UTC 24 |
| Finished | Aug 23 08:38:32 AM UTC 24 |
| Peak memory | 376996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2677377594 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_mubi_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_mubi.2677377594 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_mubi/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_sideload.2524939423 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 32177656320 ps |
| CPU time | 90.99 seconds |
| Started | Aug 23 08:35:21 AM UTC 24 |
| Finished | Aug 23 08:36:53 AM UTC 24 |
| Peak memory | 327636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=1_000_000_000 +cdc_instrumentation_enabled=1 +UV M_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2524939423 -assert nopostproc +UVM_ TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_sideload_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regress ion_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_sideload.2524939423 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_sideload/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_smoke.1183655435 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 410928108 ps |
| CPU time | 7.73 seconds |
| Started | Aug 23 08:35:11 AM UTC 24 |
| Finished | Aug 23 08:35:20 AM UTC 24 |
| Peak memory | 230560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1183655435 -assert nopostproc +UVM_TESTNAME=kmac_base_test +UVM_TE ST_SEQ=kmac_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_smoke.1183655435 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default/9.kmac_stress_all.3837198974 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 43029997418 ps |
| CPU time | 250.95 seconds |
| Started | Aug 23 08:37:09 AM UTC 24 |
| Finished | Aug 23 08:41:23 AM UTC 24 |
| Peak memory | 348328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/simv +test_timeout_ns=10_000_000_000 +test_vectors_dir=/workspaces/rep o/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/default/src/lowrisc_dv_test_vectors_0 +test_timeout_ns=10000000000 +cdc_instrumentation_e nabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3837198974 -assert nopo stproc +UVM_TESTNAME=kmac_base_test +UVM_TEST_SEQ=kmac_stress_all_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scra tch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.kmac_stress_all.3837198974 +enable_masking=0 +sw_key_masked=0 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/kmac_unmasked-sim-vcs/9.kmac_stress_all/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |