Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_24/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	310	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2897	1			T137	2		T43	5		T44	9
len_5001_7500	7065	1			T137	5		T43	13		T44	26
len_2501_5000	1554	1			T137	2		T56	1		T43	1
len_1025_2500	893	1			T43	2		T44	4		T190	1
len_769_1024	4994	1			T13	6		T14	12		T27	1
len_513_768	5642	1			T13	11		T14	7		T27	3
len_257_512	5807	1			T13	5		T14	13		T27	3
len_0_256	18424	1			T1	3		T2	3		T12	3
len_keccak_block_sizes[72]	37	1			T80	1		T81	1		T174	1
len_keccak_block_sizes[104]	37	1			T14	1		T27	1		T188	1
len_keccak_block_sizes[136]	29	1			T22	1		T77	1		T78	1
len_keccak_block_sizes[144]	31	1			T78	1		T147	1		T160	1
len_keccak_block_sizes[168]	31	1			T14	1		T160	1		T191	1
len_1	70	1			T80	1		T81	1		T174	1
len_0	559	1			T80	1		T81	1		T174	1