Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_28/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	282	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2527	1			T149	5		T156	5		T53	14
len_5001_7500	5882	1			T149	21		T156	17		T53	28
len_2501_5000	1346	1			T149	4		T53	8		T157	3
len_1025_2500	804	1			T149	4		T156	2		T53	4
len_769_1024	5637	1			T23	3		T25	2		T26	4
len_513_768	6049	1			T23	1		T25	3		T26	7
len_257_512	6166	1			T122	80		T23	1		T25	3
len_0_256	21349	1			T1	3		T2	3		T12	3
len_keccak_block_sizes[72]	41	1			T14	1		T16	1		T18	1
len_keccak_block_sizes[104]	31	1			T16	1		T95	1		T96	1
len_keccak_block_sizes[136]	29	1			T16	1		T79	1		T82	1
len_keccak_block_sizes[144]	26	1			T79	1		T122	1		T93	1
len_keccak_block_sizes[168]	34	1			T122	1		T93	1		T167	1
len_1	56	1			T14	1		T16	1		T18	1
len_0	453	1			T14	1		T16	1		T18	1