Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_31/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	307	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2900	1			T35	2		T46	16		T136	9
len_5001_7500	6937	1			T35	4		T46	23		T136	17
len_2501_5000	1735	1			T35	3		T46	5		T136	4
len_1025_2500	1016	1			T35	1		T47	9		T180	1
len_769_1024	5228	1			T18	4		T22	4		T24	11
len_513_768	5601	1			T18	3		T22	6		T24	7
len_257_512	5656	1			T18	3		T22	8		T24	9
len_0_256	21771	1			T1	3		T4	3		T14	3
len_keccak_block_sizes[72]	36	1			T43	1		T80	1		T32	1
len_keccak_block_sizes[104]	31	1			T43	1		T80	1		T147	1
len_keccak_block_sizes[136]	22	1			T80	1		T32	1		T147	1
len_keccak_block_sizes[144]	20	1			T80	1		T181	1		T121	1
len_keccak_block_sizes[168]	25	1			T24	1		T121	1		T148	1
len_1	56	1			T43	1		T80	1		T77	1
len_0	557	1			T17	3		T43	1		T80	1