Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_31/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	672	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5397	1			T18	2		T22	5		T24	9
len_601_800	12201	1			T18	3		T22	7		T24	9
len_401_600	7988	1			T18	3		T22	4		T24	12
len_201_400	4555	1			T18	1		T22	2		T24	6
len_65_200	9286	1			T17	39		T18	1		T22	2
len_min_for_xof_require_squeeze	112	1			T30	1		T35	1		T182	9
len_keccak_block_sizes[72]	89	1			T17	1		T78	2		T135	1
len_keccak_block_sizes[104]	74	1			T78	2		T182	9		T29	1
len_keccak_block_sizes[136]	93	1			T77	3		T78	1		T182	9
len_keccak_block_sizes[144]	44	1			T135	1		T26	1		T183	5
len_keccak_block_sizes[168]	55	1			T78	2		T135	1		T36	1
len_datapath_width	1113	1			T4	3		T14	3		T15	3
len_2_63	16207	1			T1	3		T17	27		T18	12
len_1	54	1			T17	1		T77	1		T78	1