Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_03/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	651	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5487	1			T4	1		T39	3		T52	2
len_601_800	12335	1			T32	1		T39	1		T52	4
len_401_600	8239	1			T4	1		T32	3		T52	2
len_201_400	4577	1			T4	1		T32	3		T52	3
len_65_200	7965	1			T12	8		T14	8		T103	76
len_min_for_xof_require_squeeze	88	1			T195	1		T97	1		T196	9
len_keccak_block_sizes[72]	73	1			T14	1		T97	1		T196	9
len_keccak_block_sizes[104]	80	1			T103	1		T97	3		T196	9
len_keccak_block_sizes[136]	92	1			T12	1		T97	2		T196	9
len_keccak_block_sizes[144]	51	1			T98	1		T23	1		T106	1
len_keccak_block_sizes[168]	37	1			T197	5		T160	5		T198	2
len_datapath_width	943	1			T2	3		T12	1		T16	3
len_2_63	15140	1			T1	3		T4	3		T12	10
len_1	47	1			T103	1		T199	1		T198	1