Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_08/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	336	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2907	1			T42	11		T27	2		T128	12
len_5001_7500	7320	1			T42	31		T27	9		T128	48
len_2501_5000	1846	1			T42	6		T27	1		T128	4
len_1025_2500	1056	1			T42	4		T128	3		T168	2
len_769_1024	5275	1			T13	3		T17	10		T68	3
len_513_768	5709	1			T13	3		T4	1		T17	14
len_257_512	5901	1			T13	4		T4	1		T17	10
len_0_256	17945	1			T1	2		T2	3		T3	3
len_keccak_block_sizes[72]	35	1			T40	1		T69	1		T85	1
len_keccak_block_sizes[104]	36	1			T40	1		T69	1		T41	1
len_keccak_block_sizes[136]	32	1			T40	1		T69	1		T85	1
len_keccak_block_sizes[144]	23	1			T40	1		T85	1		T169	1
len_keccak_block_sizes[168]	27	1			T40	1		T21	1		T85	1
len_1	57	1			T39	1		T40	1		T69	1
len_0	533	1			T39	3		T40	1		T69	1