Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_10/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	291	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2993	1			T47	3		T183	2		T142	21
len_5001_7500	7337	1			T47	4		T183	9		T142	60
len_2501_5000	1840	1			T47	2		T183	2		T142	9
len_1025_2500	1017	1			T47	1		T142	6		T50	6
len_769_1024	5586	1			T16	7		T29	3		T22	12
len_513_768	6027	1			T16	6		T29	6		T22	13
len_257_512	6193	1			T16	7		T29	1		T22	15
len_0_256	19831	1			T1	25		T2	3		T3	3
len_keccak_block_sizes[72]	36	1			T12	1		T13	1		T77	1
len_keccak_block_sizes[104]	36	1			T12	1		T13	1		T77	1
len_keccak_block_sizes[136]	30	1			T13	1		T77	1		T80	1
len_keccak_block_sizes[144]	35	1			T13	1		T77	1		T184	1
len_keccak_block_sizes[168]	22	1			T184	1		T35	1		T111	1
len_1	61	1			T12	1		T13	1		T48	3
len_0	479	1			T12	1		T13	1		T48	3