Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_17/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	302	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2803	1			T96	1		T133	2		T139	7
len_5001_7500	6472	1			T96	9		T133	7		T139	14
len_2501_5000	1575	1			T133	1		T139	6		T32	2
len_1025_2500	942	1			T96	1		T139	1		T187	1
len_769_1024	5423	1			T22	7		T62	1		T37	8
len_513_768	5902	1			T4	1		T22	6		T37	14
len_257_512	5955	1			T4	1		T22	7		T37	6
len_0_256	21182	1			T2	3		T3	3		T4	1
len_keccak_block_sizes[72]	33	1			T16	1		T77	1		T79	1
len_keccak_block_sizes[104]	30	1			T77	1		T79	1		T85	1
len_keccak_block_sizes[136]	31	1			T77	1		T79	1		T91	1
len_keccak_block_sizes[144]	31	1			T79	1		T91	1		T188	1
len_keccak_block_sizes[168]	30	1			T91	1		T164	1		T54	1
len_1	81	1			T16	1		T77	1		T60	2
len_0	527	1			T16	1		T77	1		T60	3