Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_17/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	678	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5458	1			T22	4		T96	1		T37	6
len_601_800	12336	1			T4	1		T22	8		T96	9
len_401_600	8323	1			T4	1		T22	7		T62	1
len_201_400	4445	1			T4	1		T22	1		T96	2
len_65_200	8522	1			T60	84		T83	64		T22	1
len_min_for_xof_require_squeeze	92	1			T60	2		T133	1		T190	9
len_keccak_block_sizes[72]	86	1			T60	3		T83	1		T190	9
len_keccak_block_sizes[104]	87	1			T60	3		T84	1		T90	1
len_keccak_block_sizes[136]	90	1			T60	2		T84	2		T90	1
len_keccak_block_sizes[144]	48	1			T84	1		T39	1		T130	1
len_keccak_block_sizes[168]	41	1			T60	1		T191	1		T192	1
len_datapath_width	1029	1			T13	3		T15	3		T16	73
len_2_63	15465	1			T2	3		T3	3		T12	32
len_1	59	1			T84	1		T90	1		T38	1