Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_23/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	315	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	3110	1			T85	2		T157	2		T137	2
len_5001_7500	7500	1			T85	1		T157	3		T137	8
len_2501_5000	1781	1			T85	4		T157	1		T137	1
len_1025_2500	1051	1			T85	1		T157	2		T137	1
len_769_1024	5341	1			T21	4		T25	8		T34	3
len_513_768	5916	1			T21	2		T22	2		T25	4
len_257_512	6006	1			T21	5		T22	1		T25	5
len_0_256	16238	1			T1	3		T2	3		T14	3
len_keccak_block_sizes[72]	24	1			T45	1		T73	1		T74	1
len_keccak_block_sizes[104]	39	1			T73	1		T74	1		T83	1
len_keccak_block_sizes[136]	28	1			T73	1		T74	1		T83	1
len_keccak_block_sizes[144]	29	1			T74	1		T183	1		T184	1
len_keccak_block_sizes[168]	24	1			T184	1		T36	1		T185	1
len_1	55	1			T15	2		T18	1		T45	1
len_0	547	1			T15	1		T45	1		T73	1