Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_23/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	684	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5614	1			T21	5		T22	2		T25	3
len_601_800	12967	1			T21	7		T22	1		T25	4
len_401_600	8351	1			T21	2		T22	1		T25	2
len_201_400	4117	1			T22	1		T25	5		T34	2
len_65_200	5797	1			T15	30		T18	47		T105	1
len_min_for_xof_require_squeeze	58	1			T188	9		T189	1		T160	1
len_keccak_block_sizes[72]	61	1			T18	1		T188	9		T190	1
len_keccak_block_sizes[104]	49	1			T188	9		T191	1		T78	1
len_keccak_block_sizes[136]	50	1			T188	9		T191	1		T157	1
len_keccak_block_sizes[144]	31	1			T192	2		T190	2		T149	1
len_keccak_block_sizes[168]	33	1			T18	2		T78	1		T190	1
len_datapath_width	1053	1			T15	4		T17	3		T18	4
len_2_63	14538	1			T1	3		T2	3		T14	3
len_1	42	1			T15	3		T156	1		T149	2