Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	247	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2906	1			T30	2		T53	3		T40	1
len_5001_7500	7067	1			T30	1		T53	6		T40	2
len_2501_5000	1645	1			T182	1		T54	13		T55	13
len_1025_2500	934	1			T182	1		T54	10		T55	6
len_769_1024	5085	1			T22	2		T23	1		T32	3
len_513_768	5591	1			T3	1		T22	3		T32	3
len_257_512	5846	1			T22	3		T30	1		T32	4
len_0_256	20497	1			T1	3		T2	3		T12	3
len_keccak_block_sizes[72]	38	1			T13	1		T17	1		T52	1
len_keccak_block_sizes[104]	34	1			T13	1		T52	1		T81	1
len_keccak_block_sizes[136]	33	1			T52	1		T81	1		T85	1
len_keccak_block_sizes[144]	26	1			T85	1		T183	1		T24	1
len_keccak_block_sizes[168]	29	1			T94	1		T117	1		T184	1
len_1	60	1			T13	1		T16	1		T17	1
len_0	514	1			T13	1		T16	2		T17	1