Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_02/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	643	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5447	1			T22	4		T23	1		T32	3
len_601_800	12394	1			T22	6		T30	2		T23	1
len_401_600	8305	1			T3	1		T22	1		T32	3
len_201_400	4519	1			T22	1		T30	1		T32	1
len_65_200	8038	1			T16	30		T22	1		T62	70
len_min_for_xof_require_squeeze	93	1			T98	2		T157	9		T185	1
len_keccak_block_sizes[72]	83	1			T16	1		T62	1		T157	9
len_keccak_block_sizes[104]	84	1			T16	1		T62	1		T82	1
len_keccak_block_sizes[136]	72	1			T186	1		T157	9		T185	1
len_keccak_block_sizes[144]	37	1			T185	1		T187	1		T188	5
len_keccak_block_sizes[168]	41	1			T64	1		T27	1		T188	5
len_datapath_width	1012	1			T1	3		T17	73		T51	3
len_2_63	14972	1			T2	3		T3	1		T12	3
len_1	51	1			T62	1		T186	1		T117	1