Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_08/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	172	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2733	1			T49	7		T50	20		T51	12
len_5001_7500	6624	1			T86	2		T49	3		T50	53
len_2501_5000	1541	1			T49	2		T50	9		T51	6
len_1025_2500	876	1			T49	1		T50	7		T51	4
len_769_1024	5108	1			T21	2		T22	7		T47	18
len_513_768	5594	1			T21	4		T22	5		T47	12
len_257_512	5728	1			T21	5		T22	11		T47	24
len_0_256	21510	1			T1	3		T2	3		T12	93
len_keccak_block_sizes[72]	37	1			T14	1		T46	1		T78	1
len_keccak_block_sizes[104]	27	1			T14	1		T46	1		T78	1
len_keccak_block_sizes[136]	41	1			T14	1		T46	1		T188	1
len_keccak_block_sizes[144]	33	1			T14	1		T37	1		T188	1
len_keccak_block_sizes[168]	22	1			T189	1		T190	1		T191	1
len_1	78	1			T12	3		T14	1		T46	1
len_0	462	1			T12	5		T14	1		T46	1