Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_08/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	640	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5234	1			T21	3		T22	1		T47	9
len_601_800	11924	1			T21	4		T22	11		T47	33
len_401_600	7983	1			T21	3		T22	10		T47	13
len_201_400	4571	1			T21	2		T22	5		T47	14
len_65_200	8778	1			T12	38		T60	82		T75	52
len_min_for_xof_require_squeeze	97	1			T12	2		T36	1		T128	9
len_keccak_block_sizes[72]	85	1			T60	1		T75	1		T85	1
len_keccak_block_sizes[104]	82	1			T128	9		T192	9		T137	5
len_keccak_block_sizes[136]	74	1			T60	1		T75	1		T85	1
len_keccak_block_sizes[144]	54	1			T75	1		T85	1		T135	1
len_keccak_block_sizes[168]	42	1			T137	5		T193	5		T194	5
len_datapath_width	1059	1			T1	3		T12	5		T16	3
len_2_63	15176	1			T2	3		T11	24		T12	49
len_1	64	1			T12	1		T60	1		T195	1