Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_14/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	398	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	2844	1			T98	1		T145	19		T146	8
len_5001_7500	6517	1			T66	1		T145	33		T146	35
len_2501_5000	1618	1			T98	1		T145	7		T146	3
len_1025_2500	941	1			T145	8		T146	5		T147	1
len_769_1024	5345	1			T19	22		T21	1		T97	4
len_513_768	5799	1			T19	27		T21	4		T97	3
len_257_512	6127	1			T19	25		T21	3		T97	5
len_0_256	17049	1			T1	3		T2	3		T15	73
len_keccak_block_sizes[72]	42	1			T15	1		T52	1		T53	1
len_keccak_block_sizes[104]	24	1			T53	1		T85	1		T185	1
len_keccak_block_sizes[136]	28	1			T85	1		T185	1		T84	1
len_keccak_block_sizes[144]	28	1			T85	1		T185	1		T138	1
len_keccak_block_sizes[168]	28	1			T138	1		T186	1		T187	1
len_1	71	1			T15	1		T51	1		T52	1
len_0	494	1			T15	1		T51	2		T52	1