Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_14/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	656	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5370	1			T19	13		T21	3		T97	3
len_601_800	12364	1			T19	25		T21	3		T97	4
len_401_600	8182	1			T19	23		T21	3		T97	1
len_201_400	4111	1			T19	12		T21	1		T97	3
len_65_200	6119	1			T19	4		T51	39		T100	88
len_min_for_xof_require_squeeze	65	1			T190	1		T191	1		T192	1
len_keccak_block_sizes[72]	62	1			T100	1		T190	2		T37	1
len_keccak_block_sizes[104]	68	1			T100	1		T23	1		T190	2
len_keccak_block_sizes[136]	60	1			T51	1		T100	2		T93	1
len_keccak_block_sizes[144]	43	1			T93	1		T39	1		T192	2
len_keccak_block_sizes[168]	30	1			T116	1		T193	1		T194	5
len_datapath_width	923	1			T15	73		T16	3		T51	2
len_2_63	14652	1			T1	3		T2	3		T5	7
len_1	48	1			T51	1		T100	1		T93	2