Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression/kmac_unmasked-sim-vcs/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10354	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9271	1			T84	14		T135	16		T136	6
len_5001_7500	14923	1			T84	27		T135	34		T136	22
len_2501_5000	9348	1			T84	6		T135	7		T136	6
len_1025_2500	5534	1			T84	1		T135	5		T136	1
len_769_1024	6640	1			T4	3		T15	11		T21	6
len_513_768	6948	1			T4	1		T15	12		T21	7
len_257_512	21436	1			T15	7		T21	8		T22	26
len_0_256	258501	1			T1	9		T2	9		T13	77
len_keccak_block_sizes[72]	731	1			T106	1		T169	1		T30	1
len_keccak_block_sizes[104]	626	1			T23	1		T34	1		T170	1
len_keccak_block_sizes[136]	522	1			T34	1		T28	1		T148	2
len_keccak_block_sizes[144]	426	1			T34	1		T106	1		T170	1
len_keccak_block_sizes[168]	317	1			T35	1		T29	1		T74	1
len_1	748	1			T17	2		T86	1		T171	1
len_0	1254	1			T13	3		T17	7		T105	1