T829 |
/workspace/coverage/default/14.lc_ctrl_smoke.49331819 |
|
|
Feb 29 01:57:14 PM PST 24 |
Feb 29 01:57:16 PM PST 24 |
22005978 ps |
T830 |
/workspace/coverage/default/24.lc_ctrl_security_escalation.3910861236 |
|
|
Feb 29 01:58:35 PM PST 24 |
Feb 29 01:58:49 PM PST 24 |
3700651616 ps |
T831 |
/workspace/coverage/default/6.lc_ctrl_stress_all.2046510987 |
|
|
Feb 29 01:55:45 PM PST 24 |
Feb 29 02:01:03 PM PST 24 |
58871163422 ps |
T832 |
/workspace/coverage/default/2.lc_ctrl_prog_failure.1142991339 |
|
|
Feb 29 01:54:28 PM PST 24 |
Feb 29 01:54:30 PM PST 24 |
124428709 ps |
T833 |
/workspace/coverage/default/35.lc_ctrl_prog_failure.2251982103 |
|
|
Feb 29 01:59:39 PM PST 24 |
Feb 29 01:59:41 PM PST 24 |
39777923 ps |
T834 |
/workspace/coverage/default/1.lc_ctrl_jtag_priority.521972898 |
|
|
Feb 29 01:54:31 PM PST 24 |
Feb 29 01:54:53 PM PST 24 |
3933400928 ps |
T835 |
/workspace/coverage/default/3.lc_ctrl_jtag_access.1388511924 |
|
|
Feb 29 01:55:01 PM PST 24 |
Feb 29 01:55:14 PM PST 24 |
632319101 ps |
T836 |
/workspace/coverage/default/12.lc_ctrl_state_failure.3426536416 |
|
|
Feb 29 01:56:58 PM PST 24 |
Feb 29 01:57:28 PM PST 24 |
1474664728 ps |
T837 |
/workspace/coverage/default/44.lc_ctrl_sec_token_digest.3895213118 |
|
|
Feb 29 02:00:30 PM PST 24 |
Feb 29 02:00:41 PM PST 24 |
1176833582 ps |
T838 |
/workspace/coverage/default/0.lc_ctrl_jtag_prog_failure.4073545618 |
|
|
Feb 29 01:54:07 PM PST 24 |
Feb 29 01:54:10 PM PST 24 |
223445801 ps |
T839 |
/workspace/coverage/default/41.lc_ctrl_state_failure.2772873291 |
|
|
Feb 29 02:00:12 PM PST 24 |
Feb 29 02:00:32 PM PST 24 |
595015320 ps |
T840 |
/workspace/coverage/default/36.lc_ctrl_errors.2568346194 |
|
|
Feb 29 01:59:48 PM PST 24 |
Feb 29 01:59:59 PM PST 24 |
930634272 ps |
T54 |
/workspace/coverage/default/42.lc_ctrl_stress_all.3016066679 |
|
|
Feb 29 02:00:14 PM PST 24 |
Feb 29 02:03:27 PM PST 24 |
3847375908 ps |
T841 |
/workspace/coverage/default/17.lc_ctrl_jtag_state_failure.576381592 |
|
|
Feb 29 01:57:50 PM PST 24 |
Feb 29 01:58:58 PM PST 24 |
24435275000 ps |
T842 |
/workspace/coverage/default/3.lc_ctrl_jtag_prog_failure.1427533727 |
|
|
Feb 29 01:55:01 PM PST 24 |
Feb 29 01:55:05 PM PST 24 |
673807598 ps |
T843 |
/workspace/coverage/default/16.lc_ctrl_jtag_access.3559141488 |
|
|
Feb 29 01:57:36 PM PST 24 |
Feb 29 01:57:38 PM PST 24 |
636094268 ps |
T844 |
/workspace/coverage/default/2.lc_ctrl_jtag_access.3509126361 |
|
|
Feb 29 01:54:48 PM PST 24 |
Feb 29 01:54:51 PM PST 24 |
88772613 ps |
T845 |
/workspace/coverage/default/30.lc_ctrl_sec_token_mux.2291462096 |
|
|
Feb 29 01:59:16 PM PST 24 |
Feb 29 01:59:23 PM PST 24 |
991256728 ps |
T846 |
/workspace/coverage/default/3.lc_ctrl_alert_test.3449246597 |
|
|
Feb 29 01:55:03 PM PST 24 |
Feb 29 01:55:04 PM PST 24 |
32134029 ps |
T847 |
/workspace/coverage/default/1.lc_ctrl_stress_all.2883069387 |
|
|
Feb 29 01:54:29 PM PST 24 |
Feb 29 01:55:11 PM PST 24 |
1000292452 ps |
T235 |
/workspace/coverage/default/1.lc_ctrl_claim_transition_if.4070486992 |
|
|
Feb 29 01:54:20 PM PST 24 |
Feb 29 01:54:21 PM PST 24 |
63233736 ps |
T848 |
/workspace/coverage/default/26.lc_ctrl_errors.707425830 |
|
|
Feb 29 01:58:52 PM PST 24 |
Feb 29 01:59:06 PM PST 24 |
1026404556 ps |
T849 |
/workspace/coverage/default/24.lc_ctrl_alert_test.2583531320 |
|
|
Feb 29 01:58:34 PM PST 24 |
Feb 29 01:58:35 PM PST 24 |
27503896 ps |
T850 |
/workspace/coverage/default/3.lc_ctrl_jtag_smoke.2934293835 |
|
|
Feb 29 01:54:50 PM PST 24 |
Feb 29 01:54:53 PM PST 24 |
196340981 ps |
T851 |
/workspace/coverage/default/11.lc_ctrl_stress_all_with_rand_reset.3656389184 |
|
|
Feb 29 01:56:49 PM PST 24 |
Feb 29 02:13:55 PM PST 24 |
132631799450 ps |
T852 |
/workspace/coverage/default/24.lc_ctrl_smoke.1474849718 |
|
|
Feb 29 01:58:34 PM PST 24 |
Feb 29 01:58:37 PM PST 24 |
177643337 ps |
T853 |
/workspace/coverage/default/24.lc_ctrl_state_failure.2499320527 |
|
|
Feb 29 01:58:35 PM PST 24 |
Feb 29 01:58:56 PM PST 24 |
1783004536 ps |
T854 |
/workspace/coverage/default/7.lc_ctrl_jtag_priority.1721188265 |
|
|
Feb 29 01:56:06 PM PST 24 |
Feb 29 01:56:16 PM PST 24 |
1617125251 ps |
T855 |
/workspace/coverage/default/24.lc_ctrl_sec_token_digest.1810477289 |
|
|
Feb 29 01:58:36 PM PST 24 |
Feb 29 01:58:49 PM PST 24 |
2349046972 ps |
T856 |
/workspace/coverage/default/8.lc_ctrl_claim_transition_if.1166504990 |
|
|
Feb 29 01:56:05 PM PST 24 |
Feb 29 01:56:07 PM PST 24 |
12306061 ps |
T857 |
/workspace/coverage/default/5.lc_ctrl_jtag_state_failure.3235356889 |
|
|
Feb 29 01:55:32 PM PST 24 |
Feb 29 01:56:31 PM PST 24 |
1399037415 ps |
T858 |
/workspace/coverage/default/9.lc_ctrl_regwen_during_op.1587493684 |
|
|
Feb 29 01:56:16 PM PST 24 |
Feb 29 01:56:45 PM PST 24 |
873739403 ps |
T859 |
/workspace/coverage/default/40.lc_ctrl_sec_mubi.587684374 |
|
|
Feb 29 02:00:04 PM PST 24 |
Feb 29 02:00:16 PM PST 24 |
563684371 ps |
T860 |
/workspace/coverage/default/32.lc_ctrl_security_escalation.2039098904 |
|
|
Feb 29 01:59:19 PM PST 24 |
Feb 29 01:59:27 PM PST 24 |
1220477403 ps |
T861 |
/workspace/coverage/default/27.lc_ctrl_sec_token_mux.3182640581 |
|
|
Feb 29 01:58:55 PM PST 24 |
Feb 29 01:59:03 PM PST 24 |
232998635 ps |
T862 |
/workspace/coverage/default/9.lc_ctrl_claim_transition_if.3501828815 |
|
|
Feb 29 01:56:27 PM PST 24 |
Feb 29 01:56:28 PM PST 24 |
13804412 ps |
T863 |
/workspace/coverage/default/31.lc_ctrl_stress_all.3467673700 |
|
|
Feb 29 01:59:21 PM PST 24 |
Feb 29 02:01:09 PM PST 24 |
4518386721 ps |
T864 |
/workspace/coverage/default/32.lc_ctrl_errors.436999747 |
|
|
Feb 29 01:59:19 PM PST 24 |
Feb 29 01:59:33 PM PST 24 |
1514220734 ps |
T865 |
/workspace/coverage/default/31.lc_ctrl_sec_mubi.1807671542 |
|
|
Feb 29 01:59:18 PM PST 24 |
Feb 29 01:59:31 PM PST 24 |
413754815 ps |
T866 |
/workspace/coverage/default/46.lc_ctrl_prog_failure.3669396122 |
|
|
Feb 29 02:00:38 PM PST 24 |
Feb 29 02:00:46 PM PST 24 |
299069729 ps |
T867 |
/workspace/coverage/default/8.lc_ctrl_state_failure.3114017211 |
|
|
Feb 29 01:56:05 PM PST 24 |
Feb 29 01:56:36 PM PST 24 |
998074757 ps |
T868 |
/workspace/coverage/default/39.lc_ctrl_sec_token_mux.3792896745 |
|
|
Feb 29 02:00:01 PM PST 24 |
Feb 29 02:00:11 PM PST 24 |
396271329 ps |
T62 |
/workspace/coverage/default/1.lc_ctrl_sec_cm.3946292440 |
|
|
Feb 29 01:54:34 PM PST 24 |
Feb 29 01:55:08 PM PST 24 |
2298211713 ps |
T869 |
/workspace/coverage/default/12.lc_ctrl_state_post_trans.3779377973 |
|
|
Feb 29 01:56:58 PM PST 24 |
Feb 29 01:57:06 PM PST 24 |
414392092 ps |
T870 |
/workspace/coverage/default/22.lc_ctrl_sec_mubi.250226462 |
|
|
Feb 29 01:58:22 PM PST 24 |
Feb 29 01:58:37 PM PST 24 |
1218735201 ps |
T871 |
/workspace/coverage/default/24.lc_ctrl_sec_token_mux.1087189179 |
|
|
Feb 29 01:58:38 PM PST 24 |
Feb 29 01:58:50 PM PST 24 |
1420072173 ps |
T872 |
/workspace/coverage/default/17.lc_ctrl_jtag_errors.3485902026 |
|
|
Feb 29 01:57:49 PM PST 24 |
Feb 29 01:58:21 PM PST 24 |
30436439889 ps |
T873 |
/workspace/coverage/default/31.lc_ctrl_prog_failure.209272287 |
|
|
Feb 29 01:59:19 PM PST 24 |
Feb 29 01:59:22 PM PST 24 |
470269811 ps |
T874 |
/workspace/coverage/default/25.lc_ctrl_prog_failure.169495337 |
|
|
Feb 29 01:58:34 PM PST 24 |
Feb 29 01:58:38 PM PST 24 |
224895722 ps |
T875 |
/workspace/coverage/default/35.lc_ctrl_smoke.995356083 |
|
|
Feb 29 01:59:37 PM PST 24 |
Feb 29 01:59:40 PM PST 24 |
170561995 ps |
T876 |
/workspace/coverage/default/29.lc_ctrl_smoke.2875684746 |
|
|
Feb 29 01:59:09 PM PST 24 |
Feb 29 01:59:12 PM PST 24 |
55862691 ps |
T877 |
/workspace/coverage/default/41.lc_ctrl_smoke.2590624796 |
|
|
Feb 29 02:00:02 PM PST 24 |
Feb 29 02:00:07 PM PST 24 |
247513651 ps |
T878 |
/workspace/coverage/default/26.lc_ctrl_security_escalation.3750966502 |
|
|
Feb 29 01:58:52 PM PST 24 |
Feb 29 01:59:02 PM PST 24 |
597644648 ps |
T879 |
/workspace/coverage/default/6.lc_ctrl_sec_token_mux.60341632 |
|
|
Feb 29 01:55:44 PM PST 24 |
Feb 29 01:55:54 PM PST 24 |
295457697 ps |
T81 |
/workspace/coverage/default/3.lc_ctrl_smoke.3256551488 |
|
|
Feb 29 01:54:50 PM PST 24 |
Feb 29 01:54:53 PM PST 24 |
36804522 ps |
T880 |
/workspace/coverage/default/25.lc_ctrl_sec_mubi.2910624781 |
|
|
Feb 29 01:58:34 PM PST 24 |
Feb 29 01:58:42 PM PST 24 |
589828361 ps |
T881 |
/workspace/coverage/default/47.lc_ctrl_prog_failure.1559881561 |
|
|
Feb 29 02:00:42 PM PST 24 |
Feb 29 02:00:47 PM PST 24 |
430571342 ps |
T882 |
/workspace/coverage/default/26.lc_ctrl_prog_failure.1678387784 |
|
|
Feb 29 01:58:52 PM PST 24 |
Feb 29 01:58:55 PM PST 24 |
865073257 ps |
T883 |
/workspace/coverage/default/43.lc_ctrl_sec_token_digest.3536590724 |
|
|
Feb 29 02:00:26 PM PST 24 |
Feb 29 02:00:40 PM PST 24 |
308479691 ps |
T884 |
/workspace/coverage/default/9.lc_ctrl_security_escalation.808671333 |
|
|
Feb 29 01:56:16 PM PST 24 |
Feb 29 01:56:24 PM PST 24 |
551784470 ps |
T885 |
/workspace/coverage/default/28.lc_ctrl_state_post_trans.3948238075 |
|
|
Feb 29 01:58:56 PM PST 24 |
Feb 29 01:59:03 PM PST 24 |
279539257 ps |
T201 |
/workspace/coverage/default/6.lc_ctrl_stress_all_with_rand_reset.396294825 |
|
|
Feb 29 01:55:51 PM PST 24 |
Feb 29 02:21:07 PM PST 24 |
171849804571 ps |
T886 |
/workspace/coverage/default/1.lc_ctrl_regwen_during_op.1882798645 |
|
|
Feb 29 01:54:20 PM PST 24 |
Feb 29 01:54:27 PM PST 24 |
168876909 ps |
T887 |
/workspace/coverage/default/2.lc_ctrl_jtag_prog_failure.503940376 |
|
|
Feb 29 01:54:42 PM PST 24 |
Feb 29 01:54:47 PM PST 24 |
1144577937 ps |
T888 |
/workspace/coverage/default/15.lc_ctrl_jtag_access.5726567 |
|
|
Feb 29 01:57:35 PM PST 24 |
Feb 29 01:57:39 PM PST 24 |
140670176 ps |
T889 |
/workspace/coverage/default/37.lc_ctrl_errors.478669261 |
|
|
Feb 29 01:59:51 PM PST 24 |
Feb 29 02:00:03 PM PST 24 |
1076331790 ps |
T890 |
/workspace/coverage/default/13.lc_ctrl_jtag_access.1971605653 |
|
|
Feb 29 01:57:14 PM PST 24 |
Feb 29 01:57:19 PM PST 24 |
1706744402 ps |
T891 |
/workspace/coverage/default/47.lc_ctrl_sec_token_mux.2937970960 |
|
|
Feb 29 02:00:38 PM PST 24 |
Feb 29 02:00:56 PM PST 24 |
462654312 ps |
T139 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1379647272 |
|
|
Feb 29 02:31:02 PM PST 24 |
Feb 29 02:31:05 PM PST 24 |
393469360 ps |
T126 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.2207931444 |
|
|
Feb 29 02:31:26 PM PST 24 |
Feb 29 02:31:29 PM PST 24 |
42050191 ps |
T140 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.3152498070 |
|
|
Feb 29 02:31:04 PM PST 24 |
Feb 29 02:31:06 PM PST 24 |
191050495 ps |
T127 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.1109592915 |
|
|
Feb 29 02:31:40 PM PST 24 |
Feb 29 02:31:44 PM PST 24 |
117851279 ps |
T141 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.3356176442 |
|
|
Feb 29 01:27:48 PM PST 24 |
Feb 29 01:27:50 PM PST 24 |
399581016 ps |
T134 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.4158175093 |
|
|
Feb 29 02:31:21 PM PST 24 |
Feb 29 02:31:32 PM PST 24 |
1693126218 ps |
T128 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.391332018 |
|
|
Feb 29 01:27:57 PM PST 24 |
Feb 29 01:28:00 PM PST 24 |
939438760 ps |
T135 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.2400746276 |
|
|
Feb 29 01:27:16 PM PST 24 |
Feb 29 01:27:18 PM PST 24 |
74147852 ps |
T173 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.3643494122 |
|
|
Feb 29 02:31:27 PM PST 24 |
Feb 29 02:31:29 PM PST 24 |
118050397 ps |
T131 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.4225468874 |
|
|
Feb 29 02:30:39 PM PST 24 |
Feb 29 02:30:41 PM PST 24 |
275233832 ps |
T181 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.1213957451 |
|
|
Feb 29 01:27:31 PM PST 24 |
Feb 29 01:27:34 PM PST 24 |
42156548 ps |
T133 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.1320125110 |
|
|
Feb 29 02:31:44 PM PST 24 |
Feb 29 02:31:46 PM PST 24 |
182127543 ps |
T225 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.649888031 |
|
|
Feb 29 01:27:59 PM PST 24 |
Feb 29 01:28:00 PM PST 24 |
15125197 ps |
T892 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.3693474018 |
|
|
Feb 29 01:27:20 PM PST 24 |
Feb 29 01:27:22 PM PST 24 |
199173649 ps |
T132 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.133493046 |
|
|
Feb 29 01:27:49 PM PST 24 |
Feb 29 01:27:52 PM PST 24 |
66784538 ps |
T182 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.632142621 |
|
|
Feb 29 02:31:42 PM PST 24 |
Feb 29 02:31:43 PM PST 24 |
67386731 ps |
T226 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.2033838453 |
|
|
Feb 29 02:30:55 PM PST 24 |
Feb 29 02:30:56 PM PST 24 |
16900820 ps |
T227 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.2545512458 |
|
|
Feb 29 02:31:02 PM PST 24 |
Feb 29 02:31:03 PM PST 24 |
42473472 ps |
T893 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.3289641625 |
|
|
Feb 29 01:27:47 PM PST 24 |
Feb 29 01:27:49 PM PST 24 |
233540530 ps |
T142 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.3535013446 |
|
|
Feb 29 01:28:02 PM PST 24 |
Feb 29 01:28:06 PM PST 24 |
112030187 ps |
T183 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.2104328623 |
|
|
Feb 29 01:27:47 PM PST 24 |
Feb 29 01:27:49 PM PST 24 |
28455673 ps |
T894 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.1782561130 |
|
|
Feb 29 02:31:11 PM PST 24 |
Feb 29 02:31:22 PM PST 24 |
3628082306 ps |
T895 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.1780763133 |
|
|
Feb 29 02:30:38 PM PST 24 |
Feb 29 02:30:40 PM PST 24 |
37789218 ps |
T165 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.203345933 |
|
|
Feb 29 02:31:28 PM PST 24 |
Feb 29 02:31:31 PM PST 24 |
454361560 ps |
T896 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.1050898684 |
|
|
Feb 29 01:27:50 PM PST 24 |
Feb 29 01:27:52 PM PST 24 |
153636860 ps |
T138 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.3939564786 |
|
|
Feb 29 01:27:32 PM PST 24 |
Feb 29 01:27:36 PM PST 24 |
46936633 ps |
T897 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.1613471202 |
|
|
Feb 29 02:31:01 PM PST 24 |
Feb 29 02:31:07 PM PST 24 |
4897659483 ps |
T898 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.36124110 |
|
|
Feb 29 02:31:29 PM PST 24 |
Feb 29 02:31:30 PM PST 24 |
107255957 ps |
T207 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.3520937626 |
|
|
Feb 29 01:27:47 PM PST 24 |
Feb 29 01:27:48 PM PST 24 |
42984847 ps |
T899 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.128837253 |
|
|
Feb 29 02:31:29 PM PST 24 |
Feb 29 02:31:31 PM PST 24 |
55818808 ps |
T145 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.3779077435 |
|
|
Feb 29 01:28:01 PM PST 24 |
Feb 29 01:28:05 PM PST 24 |
235326668 ps |
T208 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.797001821 |
|
|
Feb 29 01:28:01 PM PST 24 |
Feb 29 01:28:02 PM PST 24 |
28499585 ps |
T900 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.1692969576 |
|
|
Feb 29 02:31:12 PM PST 24 |
Feb 29 02:31:14 PM PST 24 |
83963713 ps |
T901 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.3885703497 |
|
|
Feb 29 01:27:50 PM PST 24 |
Feb 29 01:27:51 PM PST 24 |
26841143 ps |
T228 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.430385181 |
|
|
Feb 29 02:31:36 PM PST 24 |
Feb 29 02:31:38 PM PST 24 |
35181152 ps |
T902 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.2380264111 |
|
|
Feb 29 01:27:31 PM PST 24 |
Feb 29 01:27:35 PM PST 24 |
92368604 ps |
T229 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.1454250009 |
|
|
Feb 29 02:31:03 PM PST 24 |
Feb 29 02:31:05 PM PST 24 |
104810148 ps |
T903 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.2951777756 |
|
|
Feb 29 01:28:02 PM PST 24 |
Feb 29 01:28:03 PM PST 24 |
79216926 ps |
T904 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.3459682717 |
|
|
Feb 29 02:31:17 PM PST 24 |
Feb 29 02:31:21 PM PST 24 |
585101992 ps |
T143 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.2794205054 |
|
|
Feb 29 01:27:49 PM PST 24 |
Feb 29 01:27:51 PM PST 24 |
90420088 ps |
T905 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.3190448822 |
|
|
Feb 29 01:27:29 PM PST 24 |
Feb 29 01:27:31 PM PST 24 |
94679406 ps |
T906 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.3409947622 |
|
|
Feb 29 02:31:27 PM PST 24 |
Feb 29 02:31:29 PM PST 24 |
15884344 ps |
T164 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.1472399227 |
|
|
Feb 29 02:30:52 PM PST 24 |
Feb 29 02:30:54 PM PST 24 |
248401035 ps |
T907 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.2114218125 |
|
|
Feb 29 01:27:31 PM PST 24 |
Feb 29 01:27:33 PM PST 24 |
282914861 ps |
T908 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.2374879546 |
|
|
Feb 29 01:27:30 PM PST 24 |
Feb 29 01:27:31 PM PST 24 |
217001151 ps |
T909 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.1351979154 |
|
|
Feb 29 02:30:51 PM PST 24 |
Feb 29 02:30:54 PM PST 24 |
238016413 ps |
T910 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.289171088 |
|
|
Feb 29 01:27:29 PM PST 24 |
Feb 29 01:27:30 PM PST 24 |
20302674 ps |
T911 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4211847810 |
|
|
Feb 29 01:27:51 PM PST 24 |
Feb 29 01:27:55 PM PST 24 |
146416904 ps |
T912 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.2631695144 |
|
|
Feb 29 02:30:45 PM PST 24 |
Feb 29 02:30:52 PM PST 24 |
253656497 ps |
T913 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.3349150679 |
|
|
Feb 29 01:27:28 PM PST 24 |
Feb 29 01:27:29 PM PST 24 |
326713826 ps |
T209 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.2490530786 |
|
|
Feb 29 02:31:28 PM PST 24 |
Feb 29 02:31:30 PM PST 24 |
16281991 ps |
T914 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.3031588088 |
|
|
Feb 29 02:31:11 PM PST 24 |
Feb 29 02:31:14 PM PST 24 |
40805030 ps |
T915 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.1539701362 |
|
|
Feb 29 01:28:02 PM PST 24 |
Feb 29 01:28:04 PM PST 24 |
32471609 ps |
T916 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.3297306129 |
|
|
Feb 29 02:30:51 PM PST 24 |
Feb 29 02:30:52 PM PST 24 |
45950246 ps |
T917 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.722737858 |
|
|
Feb 29 02:30:37 PM PST 24 |
Feb 29 02:30:47 PM PST 24 |
1075381653 ps |
T918 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.462864038 |
|
|
Feb 29 01:27:22 PM PST 24 |
Feb 29 01:27:23 PM PST 24 |
14671721 ps |
T210 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.2621497124 |
|
|
Feb 29 02:30:50 PM PST 24 |
Feb 29 02:30:51 PM PST 24 |
37650396 ps |
T230 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.645004745 |
|
|
Feb 29 02:31:12 PM PST 24 |
Feb 29 02:31:14 PM PST 24 |
34530585 ps |
T919 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.175902251 |
|
|
Feb 29 01:27:34 PM PST 24 |
Feb 29 01:27:37 PM PST 24 |
127396295 ps |
T920 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.912784775 |
|
|
Feb 29 01:27:48 PM PST 24 |
Feb 29 01:27:50 PM PST 24 |
43286837 ps |
T921 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.1170434690 |
|
|
Feb 29 02:30:44 PM PST 24 |
Feb 29 02:30:45 PM PST 24 |
297265055 ps |
T211 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.3084031766 |
|
|
Feb 29 01:27:51 PM PST 24 |
Feb 29 01:27:52 PM PST 24 |
12370820 ps |
T922 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.2340461608 |
|
|
Feb 29 01:27:44 PM PST 24 |
Feb 29 01:27:46 PM PST 24 |
27325842 ps |
T146 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.1768212110 |
|
|
Feb 29 01:27:48 PM PST 24 |
Feb 29 01:27:52 PM PST 24 |
114970067 ps |
T923 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.3928260533 |
|
|
Feb 29 02:30:51 PM PST 24 |
Feb 29 02:30:53 PM PST 24 |
65308417 ps |
T924 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.715617617 |
|
|
Feb 29 02:31:03 PM PST 24 |
Feb 29 02:31:05 PM PST 24 |
128956945 ps |
T925 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.3566475798 |
|
|
Feb 29 01:27:59 PM PST 24 |
Feb 29 01:28:00 PM PST 24 |
42697179 ps |
T171 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.1728096045 |
|
|
Feb 29 01:27:20 PM PST 24 |
Feb 29 01:27:22 PM PST 24 |
103014897 ps |
T926 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.2506040864 |
|
|
Feb 29 02:30:52 PM PST 24 |
Feb 29 02:30:54 PM PST 24 |
54867914 ps |
T927 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.742297770 |
|
|
Feb 29 02:31:02 PM PST 24 |
Feb 29 02:31:03 PM PST 24 |
53733341 ps |
T928 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.1207460064 |
|
|
Feb 29 02:31:11 PM PST 24 |
Feb 29 02:31:13 PM PST 24 |
49677668 ps |
T172 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3907106539 |
|
|
Feb 29 01:27:47 PM PST 24 |
Feb 29 01:27:49 PM PST 24 |
828822779 ps |
T929 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.2001348580 |
|
|
Feb 29 02:31:02 PM PST 24 |
Feb 29 02:31:03 PM PST 24 |
87521389 ps |
T160 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.137663775 |
|
|
Feb 29 02:31:13 PM PST 24 |
Feb 29 02:31:17 PM PST 24 |
337128808 ps |
T930 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.2630228771 |
|
|
Feb 29 02:30:49 PM PST 24 |
Feb 29 02:30:51 PM PST 24 |
47007471 ps |
T931 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.2605123874 |
|
|
Feb 29 01:27:32 PM PST 24 |
Feb 29 01:27:43 PM PST 24 |
3082164102 ps |
T932 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.839939070 |
|
|
Feb 29 02:30:53 PM PST 24 |
Feb 29 02:30:57 PM PST 24 |
1895667393 ps |
T933 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.4196901266 |
|
|
Feb 29 02:31:21 PM PST 24 |
Feb 29 02:31:23 PM PST 24 |
52748699 ps |
T934 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.929454767 |
|
|
Feb 29 02:30:38 PM PST 24 |
Feb 29 02:30:40 PM PST 24 |
49000804 ps |
T168 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.224807155 |
|
|
Feb 29 02:31:43 PM PST 24 |
Feb 29 02:31:45 PM PST 24 |
152842837 ps |
T935 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.2045779938 |
|
|
Feb 29 02:30:52 PM PST 24 |
Feb 29 02:30:53 PM PST 24 |
155069379 ps |
T212 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.3144706796 |
|
|
Feb 29 02:31:17 PM PST 24 |
Feb 29 02:31:18 PM PST 24 |
13085865 ps |
T148 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.1131437797 |
|
|
Feb 29 02:30:51 PM PST 24 |
Feb 29 02:30:54 PM PST 24 |
58389710 ps |
T213 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.3980199607 |
|
|
Feb 29 01:27:59 PM PST 24 |
Feb 29 01:28:00 PM PST 24 |
184811559 ps |
T936 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.3744358145 |
|
|
Feb 29 01:27:21 PM PST 24 |
Feb 29 01:27:23 PM PST 24 |
58268416 ps |
T937 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.3046419286 |
|
|
Feb 29 01:27:31 PM PST 24 |
Feb 29 01:27:33 PM PST 24 |
18536142 ps |
T170 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.3116604090 |
|
|
Feb 29 01:28:04 PM PST 24 |
Feb 29 01:28:06 PM PST 24 |
88540346 ps |
T938 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.3281855472 |
|
|
Feb 29 01:27:30 PM PST 24 |
Feb 29 01:27:32 PM PST 24 |
46165380 ps |
T939 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.4132253066 |
|
|
Feb 29 02:31:44 PM PST 24 |
Feb 29 02:31:45 PM PST 24 |
68695374 ps |
T940 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.2860280416 |
|
|
Feb 29 02:30:51 PM PST 24 |
Feb 29 02:30:53 PM PST 24 |
134596631 ps |
T941 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3868532714 |
|
|
Feb 29 01:27:20 PM PST 24 |
Feb 29 01:27:23 PM PST 24 |
197093992 ps |
T152 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.2539931251 |
|
|
Feb 29 02:31:42 PM PST 24 |
Feb 29 02:31:45 PM PST 24 |
204171820 ps |
T942 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.2250035030 |
|
|
Feb 29 02:30:56 PM PST 24 |
Feb 29 02:30:57 PM PST 24 |
44696502 ps |
T214 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.3334689401 |
|
|
Feb 29 02:31:28 PM PST 24 |
Feb 29 02:31:30 PM PST 24 |
11860918 ps |
T943 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.4155266751 |
|
|
Feb 29 01:28:00 PM PST 24 |
Feb 29 01:28:01 PM PST 24 |
56272639 ps |
T944 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.2317751716 |
|
|
Feb 29 01:27:44 PM PST 24 |
Feb 29 01:27:46 PM PST 24 |
22492784 ps |
T215 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.342747494 |
|
|
Feb 29 01:27:26 PM PST 24 |
Feb 29 01:27:28 PM PST 24 |
15116222 ps |
T945 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.723987926 |
|
|
Feb 29 02:30:55 PM PST 24 |
Feb 29 02:30:56 PM PST 24 |
24156250 ps |
T946 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.1442143901 |
|
|
Feb 29 01:27:49 PM PST 24 |
Feb 29 01:27:54 PM PST 24 |
377645458 ps |
T947 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.2610567831 |
|
|
Feb 29 01:27:30 PM PST 24 |
Feb 29 01:27:33 PM PST 24 |
238021761 ps |
T948 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.1410444168 |
|
|
Feb 29 02:31:13 PM PST 24 |
Feb 29 02:31:14 PM PST 24 |
30092636 ps |
T949 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.3082023344 |
|
|
Feb 29 01:27:32 PM PST 24 |
Feb 29 01:27:35 PM PST 24 |
51617116 ps |
T950 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.394016173 |
|
|
Feb 29 01:27:33 PM PST 24 |
Feb 29 01:27:45 PM PST 24 |
496850785 ps |
T951 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.4076750066 |
|
|
Feb 29 01:27:21 PM PST 24 |
Feb 29 01:27:36 PM PST 24 |
1412274781 ps |
T952 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.1060718121 |
|
|
Feb 29 01:27:30 PM PST 24 |
Feb 29 01:27:32 PM PST 24 |
48306107 ps |
T953 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.3163281752 |
|
|
Feb 29 02:30:51 PM PST 24 |
Feb 29 02:31:09 PM PST 24 |
3153643434 ps |
T954 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.492199846 |
|
|
Feb 29 01:27:20 PM PST 24 |
Feb 29 01:27:34 PM PST 24 |
4143098274 ps |
T955 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1249457267 |
|
|
Feb 29 02:30:55 PM PST 24 |
Feb 29 02:30:58 PM PST 24 |
132303892 ps |
T956 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.448452801 |
|
|
Feb 29 02:30:40 PM PST 24 |
Feb 29 02:30:44 PM PST 24 |
260829233 ps |
T957 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3666283226 |
|
|
Feb 29 02:30:51 PM PST 24 |
Feb 29 02:30:53 PM PST 24 |
80061882 ps |
T216 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.3505298932 |
|
|
Feb 29 02:30:38 PM PST 24 |
Feb 29 02:30:40 PM PST 24 |
225877047 ps |
T958 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.2240833062 |
|
|
Feb 29 01:27:49 PM PST 24 |
Feb 29 01:27:51 PM PST 24 |
40126303 ps |
T959 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.104843091 |
|
|
Feb 29 02:30:51 PM PST 24 |
Feb 29 02:30:53 PM PST 24 |
57318539 ps |
T960 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.3073995046 |
|
|
Feb 29 01:27:43 PM PST 24 |
Feb 29 01:27:45 PM PST 24 |
288304798 ps |
T961 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.2661905624 |
|
|
Feb 29 01:27:45 PM PST 24 |
Feb 29 01:27:47 PM PST 24 |
41333756 ps |
T962 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.298558552 |
|
|
Feb 29 02:31:01 PM PST 24 |
Feb 29 02:31:03 PM PST 24 |
143740012 ps |
T963 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.505762313 |
|
|
Feb 29 01:28:02 PM PST 24 |
Feb 29 01:28:04 PM PST 24 |
53801719 ps |
T964 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.3565197298 |
|
|
Feb 29 02:30:39 PM PST 24 |
Feb 29 02:30:41 PM PST 24 |
171809122 ps |
T965 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.2947362671 |
|
|
Feb 29 01:27:49 PM PST 24 |
Feb 29 01:27:50 PM PST 24 |
14261964 ps |
T966 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.1109618230 |
|
|
Feb 29 02:31:21 PM PST 24 |
Feb 29 02:31:24 PM PST 24 |
549519764 ps |
T967 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2374102794 |
|
|
Feb 29 02:31:02 PM PST 24 |
Feb 29 02:31:06 PM PST 24 |
478253687 ps |
T968 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.1659076147 |
|
|
Feb 29 01:27:31 PM PST 24 |
Feb 29 01:27:33 PM PST 24 |
303445664 ps |
T969 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.1481566776 |
|
|
Feb 29 01:27:27 PM PST 24 |
Feb 29 01:27:28 PM PST 24 |
378071801 ps |
T970 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.3239853783 |
|
|
Feb 29 02:31:14 PM PST 24 |
Feb 29 02:31:17 PM PST 24 |
83550365 ps |
T971 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.1729164641 |
|
|
Feb 29 02:30:38 PM PST 24 |
Feb 29 02:30:41 PM PST 24 |
109851512 ps |
T972 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.3516230062 |
|
|
Feb 29 02:31:28 PM PST 24 |
Feb 29 02:31:30 PM PST 24 |
26030094 ps |
T973 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3453814834 |
|
|
Feb 29 02:31:13 PM PST 24 |
Feb 29 02:31:16 PM PST 24 |
495968261 ps |
T974 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.2920316627 |
|
|
Feb 29 01:27:49 PM PST 24 |
Feb 29 01:27:50 PM PST 24 |
17649804 ps |
T975 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.692461652 |
|
|
Feb 29 01:27:31 PM PST 24 |
Feb 29 01:27:33 PM PST 24 |
69339348 ps |
T976 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.918003448 |
|
|
Feb 29 02:31:12 PM PST 24 |
Feb 29 02:31:14 PM PST 24 |
79918358 ps |
T218 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.469069120 |
|
|
Feb 29 02:30:38 PM PST 24 |
Feb 29 02:30:40 PM PST 24 |
77172671 ps |
T977 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.981890251 |
|
|
Feb 29 01:27:48 PM PST 24 |
Feb 29 01:27:51 PM PST 24 |
196872598 ps |
T978 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4217732915 |
|
|
Feb 29 02:30:38 PM PST 24 |
Feb 29 02:30:44 PM PST 24 |
370191588 ps |
T979 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.4039246714 |
|
|
Feb 29 01:27:29 PM PST 24 |
Feb 29 01:27:31 PM PST 24 |
287464233 ps |
T980 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.3271389489 |
|
|
Feb 29 02:31:02 PM PST 24 |
Feb 29 02:31:08 PM PST 24 |
468898566 ps |
T981 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.2310525958 |
|
|
Feb 29 01:27:48 PM PST 24 |
Feb 29 01:28:10 PM PST 24 |
1755219971 ps |
T982 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.1624136664 |
|
|
Feb 29 01:27:46 PM PST 24 |
Feb 29 01:27:47 PM PST 24 |
210709655 ps |
T983 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.2667381817 |
|
|
Feb 29 01:28:00 PM PST 24 |
Feb 29 01:28:01 PM PST 24 |
21297780 ps |
T984 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.1886744355 |
|
|
Feb 29 02:31:03 PM PST 24 |
Feb 29 02:31:04 PM PST 24 |
17006827 ps |
T985 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.850364686 |
|
|
Feb 29 02:31:43 PM PST 24 |
Feb 29 02:31:44 PM PST 24 |
18645646 ps |
T986 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.1831065514 |
|
|
Feb 29 01:27:49 PM PST 24 |
Feb 29 01:28:08 PM PST 24 |
3087641188 ps |
T987 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.2265733991 |
|
|
Feb 29 01:27:30 PM PST 24 |
Feb 29 01:27:34 PM PST 24 |
652636480 ps |
T988 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.781225930 |
|
|
Feb 29 01:27:29 PM PST 24 |
Feb 29 01:27:31 PM PST 24 |
27276450 ps |
T989 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.4093948683 |
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|
Feb 29 02:30:50 PM PST 24 |
Feb 29 02:30:53 PM PST 24 |
180269166 ps |
T990 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.4111077704 |
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|
Feb 29 02:31:00 PM PST 24 |
Feb 29 02:31:03 PM PST 24 |
132572227 ps |
T991 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.1372635834 |
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|
Feb 29 01:27:22 PM PST 24 |
Feb 29 01:27:24 PM PST 24 |
240061597 ps |
T992 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.3364151889 |
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|
Feb 29 02:31:03 PM PST 24 |
Feb 29 02:31:04 PM PST 24 |
36133576 ps |
T993 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.1125281524 |
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|
Feb 29 02:31:28 PM PST 24 |
Feb 29 02:31:32 PM PST 24 |
75832571 ps |
T994 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.2436304599 |
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|
Feb 29 01:27:32 PM PST 24 |
Feb 29 01:27:44 PM PST 24 |
1048119876 ps |
T995 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.939665187 |
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|
Feb 29 01:27:33 PM PST 24 |
Feb 29 01:27:35 PM PST 24 |
325075985 ps |
T996 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.1539631996 |
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|
Feb 29 01:27:34 PM PST 24 |
Feb 29 01:27:36 PM PST 24 |
37118148 ps |
T144 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.95425230 |
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Feb 29 02:31:00 PM PST 24 |
Feb 29 02:31:03 PM PST 24 |
410287108 ps |
T219 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.2099534262 |
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|
Feb 29 02:30:50 PM PST 24 |
Feb 29 02:30:51 PM PST 24 |
46979765 ps |
T997 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.2695927896 |
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|
Feb 29 02:31:01 PM PST 24 |
Feb 29 02:31:03 PM PST 24 |
44294404 ps |
T998 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.2538305412 |
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|
Feb 29 01:27:28 PM PST 24 |
Feb 29 01:27:31 PM PST 24 |
88135645 ps |
T999 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.2099564164 |
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|
Feb 29 02:30:50 PM PST 24 |
Feb 29 02:30:52 PM PST 24 |
99889991 ps |
T1000 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.3324711241 |
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|
Feb 29 02:31:00 PM PST 24 |
Feb 29 02:31:01 PM PST 24 |
17066628 ps |
T1001 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.4135551240 |
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|
Feb 29 01:27:29 PM PST 24 |
Feb 29 01:27:30 PM PST 24 |
86131807 ps |
T1002 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.507599942 |
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Feb 29 02:30:40 PM PST 24 |
Feb 29 02:30:41 PM PST 24 |
54382590 ps |
T1003 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.3217841 |
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Feb 29 02:31:40 PM PST 24 |
Feb 29 02:31:42 PM PST 24 |
15385670 ps |
T220 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.2663238931 |
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|
Feb 29 01:27:59 PM PST 24 |
Feb 29 01:28:00 PM PST 24 |
24568602 ps |
T1004 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.154540527 |
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|
Feb 29 01:27:45 PM PST 24 |
Feb 29 01:27:47 PM PST 24 |
153021905 ps |
T1005 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.600369885 |
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|
Feb 29 01:27:48 PM PST 24 |
Feb 29 01:27:50 PM PST 24 |
24577118 ps |
T1006 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.3195800136 |
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|
Feb 29 01:27:35 PM PST 24 |
Feb 29 01:27:37 PM PST 24 |
22650892 ps |
T1007 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.1860280559 |
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|
Feb 29 01:27:18 PM PST 24 |
Feb 29 01:27:20 PM PST 24 |
28340240 ps |
T1008 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.4175424374 |
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|
Feb 29 02:31:28 PM PST 24 |
Feb 29 02:31:29 PM PST 24 |
28759923 ps |
T1009 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.4125615406 |
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|
Feb 29 01:27:48 PM PST 24 |
Feb 29 01:27:50 PM PST 24 |
91827382 ps |
T1010 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.1589160195 |
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|
Feb 29 01:27:31 PM PST 24 |
Feb 29 01:27:35 PM PST 24 |
1048658048 ps |
T1011 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.3716407377 |
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|
Feb 29 01:27:31 PM PST 24 |
Feb 29 01:27:34 PM PST 24 |
50840013 ps |
T1012 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.2718805970 |
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|
Feb 29 01:27:44 PM PST 24 |
Feb 29 01:27:51 PM PST 24 |
581480036 ps |
T1013 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.2114260888 |
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|
Feb 29 02:30:38 PM PST 24 |
Feb 29 02:30:43 PM PST 24 |
262236841 ps |
T221 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.2891728891 |
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|
Feb 29 01:28:01 PM PST 24 |
Feb 29 01:28:02 PM PST 24 |
12233353 ps |
T169 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.2528463165 |
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|
Feb 29 01:27:32 PM PST 24 |
Feb 29 01:27:36 PM PST 24 |
482484942 ps |
T1014 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.3065952717 |
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|
Feb 29 01:27:30 PM PST 24 |
Feb 29 01:27:32 PM PST 24 |
51478874 ps |
T1015 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.386849950 |
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|
Feb 29 01:27:19 PM PST 24 |
Feb 29 01:27:21 PM PST 24 |
216519576 ps |
T1016 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.3673923972 |
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|
Feb 29 01:27:49 PM PST 24 |
Feb 29 01:27:50 PM PST 24 |
72617553 ps |
T1017 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.1013711948 |
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|
Feb 29 02:30:53 PM PST 24 |
Feb 29 02:30:55 PM PST 24 |
173739669 ps |
T1018 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.2665479789 |
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|
Feb 29 02:31:46 PM PST 24 |
Feb 29 02:31:48 PM PST 24 |
29100098 ps |
T1019 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.1527097337 |
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|
Feb 29 01:27:49 PM PST 24 |
Feb 29 01:28:02 PM PST 24 |
1153115130 ps |
T1020 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.3375212001 |
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|
Feb 29 01:28:04 PM PST 24 |
Feb 29 01:28:06 PM PST 24 |
85703010 ps |
T1021 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.1284200984 |
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|
Feb 29 01:27:46 PM PST 24 |
Feb 29 01:27:48 PM PST 24 |
282653593 ps |
T1022 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.4070818889 |
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|
Feb 29 02:30:53 PM PST 24 |
Feb 29 02:31:17 PM PST 24 |
2027492061 ps |