T1594 |
/workspace/coverage/default/35.lc_ctrl_alert_test.4696860 |
|
|
Mar 03 02:43:39 PM PST 24 |
Mar 03 02:43:40 PM PST 24 |
16392322 ps |
T1595 |
/workspace/coverage/default/3.lc_ctrl_smoke.1101338354 |
|
|
Mar 03 02:40:34 PM PST 24 |
Mar 03 02:40:39 PM PST 24 |
230081042 ps |
T257 |
/workspace/coverage/default/30.lc_ctrl_stress_all_with_rand_reset.2809278874 |
|
|
Mar 03 02:43:15 PM PST 24 |
Mar 03 03:11:35 PM PST 24 |
265731824878 ps |
T1596 |
/workspace/coverage/default/0.lc_ctrl_smoke.1409674713 |
|
|
Mar 03 02:39:54 PM PST 24 |
Mar 03 02:40:02 PM PST 24 |
89914826 ps |
T1597 |
/workspace/coverage/default/35.lc_ctrl_stress_all.752893088 |
|
|
Mar 03 01:33:56 PM PST 24 |
Mar 03 01:34:15 PM PST 24 |
675615663 ps |
T1598 |
/workspace/coverage/default/43.lc_ctrl_volatile_unlock_smoke.292324424 |
|
|
Mar 03 02:44:02 PM PST 24 |
Mar 03 02:44:04 PM PST 24 |
14277936 ps |
T1599 |
/workspace/coverage/default/43.lc_ctrl_jtag_access.4243872875 |
|
|
Mar 03 01:34:17 PM PST 24 |
Mar 03 01:34:23 PM PST 24 |
993201901 ps |
T1600 |
/workspace/coverage/default/27.lc_ctrl_sec_token_mux.961395320 |
|
|
Mar 03 02:43:08 PM PST 24 |
Mar 03 02:43:19 PM PST 24 |
1150211067 ps |
T1601 |
/workspace/coverage/default/42.lc_ctrl_sec_token_mux.1669832972 |
|
|
Mar 03 02:43:56 PM PST 24 |
Mar 03 02:44:05 PM PST 24 |
1028527582 ps |
T1602 |
/workspace/coverage/default/41.lc_ctrl_state_failure.3629972881 |
|
|
Mar 03 01:34:15 PM PST 24 |
Mar 03 01:34:40 PM PST 24 |
1268832995 ps |
T1603 |
/workspace/coverage/default/9.lc_ctrl_sec_token_mux.106287084 |
|
|
Mar 03 01:32:11 PM PST 24 |
Mar 03 01:32:21 PM PST 24 |
238293087 ps |
T1604 |
/workspace/coverage/default/40.lc_ctrl_state_post_trans.3753244229 |
|
|
Mar 03 01:34:08 PM PST 24 |
Mar 03 01:34:16 PM PST 24 |
197530144 ps |
T1605 |
/workspace/coverage/default/30.lc_ctrl_sec_token_mux.599482501 |
|
|
Mar 03 02:43:18 PM PST 24 |
Mar 03 02:43:27 PM PST 24 |
1214711077 ps |
T1606 |
/workspace/coverage/default/39.lc_ctrl_errors.4188854843 |
|
|
Mar 03 02:43:52 PM PST 24 |
Mar 03 02:44:05 PM PST 24 |
734100055 ps |
T1607 |
/workspace/coverage/default/29.lc_ctrl_jtag_access.3422434890 |
|
|
Mar 03 01:33:32 PM PST 24 |
Mar 03 01:33:39 PM PST 24 |
734890189 ps |
T1608 |
/workspace/coverage/default/45.lc_ctrl_smoke.1481568023 |
|
|
Mar 03 01:34:24 PM PST 24 |
Mar 03 01:34:28 PM PST 24 |
71412318 ps |
T1609 |
/workspace/coverage/default/42.lc_ctrl_state_failure.3824277518 |
|
|
Mar 03 01:34:17 PM PST 24 |
Mar 03 01:34:45 PM PST 24 |
1844622917 ps |
T1610 |
/workspace/coverage/default/41.lc_ctrl_state_post_trans.2201350247 |
|
|
Mar 03 02:43:53 PM PST 24 |
Mar 03 02:44:00 PM PST 24 |
138554320 ps |
T1611 |
/workspace/coverage/default/24.lc_ctrl_volatile_unlock_smoke.1214057163 |
|
|
Mar 03 02:42:53 PM PST 24 |
Mar 03 02:42:55 PM PST 24 |
62712647 ps |
T1612 |
/workspace/coverage/default/22.lc_ctrl_state_failure.3729401625 |
|
|
Mar 03 01:33:12 PM PST 24 |
Mar 03 01:33:32 PM PST 24 |
149991107 ps |
T1613 |
/workspace/coverage/default/3.lc_ctrl_jtag_regwen_during_op.97547967 |
|
|
Mar 03 01:31:24 PM PST 24 |
Mar 03 01:31:36 PM PST 24 |
4380284664 ps |
T1614 |
/workspace/coverage/default/16.lc_ctrl_jtag_smoke.4200604488 |
|
|
Mar 03 01:32:53 PM PST 24 |
Mar 03 01:32:59 PM PST 24 |
750606103 ps |
T1615 |
/workspace/coverage/default/12.lc_ctrl_jtag_state_post_trans.3551101902 |
|
|
Mar 03 02:41:52 PM PST 24 |
Mar 03 02:42:07 PM PST 24 |
407747135 ps |
T1616 |
/workspace/coverage/default/12.lc_ctrl_state_post_trans.4134923594 |
|
|
Mar 03 01:32:23 PM PST 24 |
Mar 03 01:32:30 PM PST 24 |
777252691 ps |
T1617 |
/workspace/coverage/default/41.lc_ctrl_stress_all_with_rand_reset.419910200 |
|
|
Mar 03 01:34:15 PM PST 24 |
Mar 03 01:43:13 PM PST 24 |
295592496973 ps |
T1618 |
/workspace/coverage/default/5.lc_ctrl_jtag_priority.1628739303 |
|
|
Mar 03 02:40:57 PM PST 24 |
Mar 03 02:41:01 PM PST 24 |
86709931 ps |
T1619 |
/workspace/coverage/default/6.lc_ctrl_jtag_priority.532545386 |
|
|
Mar 03 01:31:51 PM PST 24 |
Mar 03 01:31:54 PM PST 24 |
114087273 ps |
T1620 |
/workspace/coverage/default/27.lc_ctrl_state_post_trans.3073159413 |
|
|
Mar 03 02:43:06 PM PST 24 |
Mar 03 02:43:13 PM PST 24 |
397876518 ps |
T1621 |
/workspace/coverage/default/38.lc_ctrl_sec_token_mux.3242044375 |
|
|
Mar 03 01:34:07 PM PST 24 |
Mar 03 01:34:18 PM PST 24 |
242563158 ps |
T1622 |
/workspace/coverage/default/0.lc_ctrl_sec_token_digest.2093559107 |
|
|
Mar 03 02:39:58 PM PST 24 |
Mar 03 02:40:09 PM PST 24 |
1396527750 ps |
T1623 |
/workspace/coverage/default/32.lc_ctrl_state_post_trans.1674694069 |
|
|
Mar 03 02:43:20 PM PST 24 |
Mar 03 02:43:28 PM PST 24 |
54127666 ps |
T220 |
/workspace/coverage/default/22.lc_ctrl_stress_all_with_rand_reset.2202391017 |
|
|
Mar 03 01:33:13 PM PST 24 |
Mar 03 01:41:27 PM PST 24 |
13477884602 ps |
T264 |
/workspace/coverage/default/2.lc_ctrl_claim_transition_if.1568820452 |
|
|
Mar 03 01:31:17 PM PST 24 |
Mar 03 01:31:18 PM PST 24 |
40013674 ps |
T1624 |
/workspace/coverage/default/29.lc_ctrl_volatile_unlock_smoke.1140490276 |
|
|
Mar 03 02:43:11 PM PST 24 |
Mar 03 02:43:12 PM PST 24 |
46907877 ps |
T1625 |
/workspace/coverage/default/13.lc_ctrl_sec_token_mux.1535448688 |
|
|
Mar 03 02:42:00 PM PST 24 |
Mar 03 02:42:08 PM PST 24 |
729116971 ps |
T1626 |
/workspace/coverage/default/3.lc_ctrl_security_escalation.85656010 |
|
|
Mar 03 01:31:23 PM PST 24 |
Mar 03 01:31:34 PM PST 24 |
1176858330 ps |
T1627 |
/workspace/coverage/default/29.lc_ctrl_smoke.743711052 |
|
|
Mar 03 01:33:34 PM PST 24 |
Mar 03 01:33:38 PM PST 24 |
49097190 ps |
T1628 |
/workspace/coverage/default/43.lc_ctrl_sec_token_mux.3970986405 |
|
|
Mar 03 02:44:08 PM PST 24 |
Mar 03 02:44:19 PM PST 24 |
1187156080 ps |
T1629 |
/workspace/coverage/default/2.lc_ctrl_jtag_priority.2205234352 |
|
|
Mar 03 01:31:18 PM PST 24 |
Mar 03 01:31:20 PM PST 24 |
708968236 ps |
T1630 |
/workspace/coverage/default/8.lc_ctrl_stress_all.2516024543 |
|
|
Mar 03 01:32:13 PM PST 24 |
Mar 03 01:33:15 PM PST 24 |
2507700726 ps |
T1631 |
/workspace/coverage/default/10.lc_ctrl_jtag_errors.1498201205 |
|
|
Mar 03 01:32:23 PM PST 24 |
Mar 03 01:33:12 PM PST 24 |
13001403449 ps |
T1632 |
/workspace/coverage/default/46.lc_ctrl_state_post_trans.4260922261 |
|
|
Mar 03 01:34:29 PM PST 24 |
Mar 03 01:34:33 PM PST 24 |
92279825 ps |
T1633 |
/workspace/coverage/default/48.lc_ctrl_volatile_unlock_smoke.3521417677 |
|
|
Mar 03 01:34:29 PM PST 24 |
Mar 03 01:34:31 PM PST 24 |
31576481 ps |
T1634 |
/workspace/coverage/default/37.lc_ctrl_security_escalation.2295055740 |
|
|
Mar 03 02:43:42 PM PST 24 |
Mar 03 02:43:52 PM PST 24 |
1012487427 ps |
T1635 |
/workspace/coverage/default/26.lc_ctrl_sec_mubi.4285199082 |
|
|
Mar 03 02:43:01 PM PST 24 |
Mar 03 02:43:15 PM PST 24 |
455924747 ps |
T1636 |
/workspace/coverage/default/38.lc_ctrl_state_failure.2482003884 |
|
|
Mar 03 02:43:41 PM PST 24 |
Mar 03 02:44:09 PM PST 24 |
715936340 ps |
T1637 |
/workspace/coverage/default/46.lc_ctrl_sec_mubi.4026780673 |
|
|
Mar 03 01:34:22 PM PST 24 |
Mar 03 01:34:42 PM PST 24 |
1727944575 ps |
T1638 |
/workspace/coverage/default/11.lc_ctrl_jtag_state_failure.1511143550 |
|
|
Mar 03 01:32:24 PM PST 24 |
Mar 03 01:33:37 PM PST 24 |
1447376113 ps |
T1639 |
/workspace/coverage/default/41.lc_ctrl_volatile_unlock_smoke.1012270750 |
|
|
Mar 03 01:34:14 PM PST 24 |
Mar 03 01:34:15 PM PST 24 |
68970214 ps |
T1640 |
/workspace/coverage/default/18.lc_ctrl_state_post_trans.2065760938 |
|
|
Mar 03 01:32:57 PM PST 24 |
Mar 03 01:33:04 PM PST 24 |
73211819 ps |
T1641 |
/workspace/coverage/default/23.lc_ctrl_jtag_access.740089847 |
|
|
Mar 03 01:33:16 PM PST 24 |
Mar 03 01:33:21 PM PST 24 |
3703146425 ps |
T1642 |
/workspace/coverage/default/19.lc_ctrl_state_failure.1099401166 |
|
|
Mar 03 02:42:29 PM PST 24 |
Mar 03 02:43:10 PM PST 24 |
697983385 ps |
T1643 |
/workspace/coverage/default/18.lc_ctrl_jtag_prog_failure.2888267888 |
|
|
Mar 03 01:33:01 PM PST 24 |
Mar 03 01:33:13 PM PST 24 |
1687221708 ps |
T1644 |
/workspace/coverage/default/1.lc_ctrl_smoke.1740304563 |
|
|
Mar 03 02:40:05 PM PST 24 |
Mar 03 02:40:08 PM PST 24 |
399279689 ps |
T1645 |
/workspace/coverage/default/36.lc_ctrl_security_escalation.2657270090 |
|
|
Mar 03 02:43:39 PM PST 24 |
Mar 03 02:43:54 PM PST 24 |
1386943997 ps |
T1646 |
/workspace/coverage/default/44.lc_ctrl_sec_token_mux.3473003831 |
|
|
Mar 03 02:44:10 PM PST 24 |
Mar 03 02:44:20 PM PST 24 |
2725950873 ps |
T1647 |
/workspace/coverage/default/48.lc_ctrl_sec_token_digest.4247472344 |
|
|
Mar 03 01:34:34 PM PST 24 |
Mar 03 01:34:46 PM PST 24 |
907738133 ps |
T1648 |
/workspace/coverage/default/29.lc_ctrl_jtag_access.1619032892 |
|
|
Mar 03 02:43:09 PM PST 24 |
Mar 03 02:43:16 PM PST 24 |
1267652997 ps |
T1649 |
/workspace/coverage/default/24.lc_ctrl_sec_token_mux.2116701572 |
|
|
Mar 03 02:42:53 PM PST 24 |
Mar 03 02:43:00 PM PST 24 |
360164563 ps |
T1650 |
/workspace/coverage/default/20.lc_ctrl_alert_test.67917128 |
|
|
Mar 03 01:33:05 PM PST 24 |
Mar 03 01:33:06 PM PST 24 |
109671336 ps |
T1651 |
/workspace/coverage/default/9.lc_ctrl_alert_test.1084721775 |
|
|
Mar 03 02:41:36 PM PST 24 |
Mar 03 02:41:37 PM PST 24 |
36849818 ps |
T1652 |
/workspace/coverage/default/44.lc_ctrl_prog_failure.969966816 |
|
|
Mar 03 02:44:03 PM PST 24 |
Mar 03 02:44:06 PM PST 24 |
29925279 ps |
T1653 |
/workspace/coverage/default/39.lc_ctrl_sec_token_mux.2408680819 |
|
|
Mar 03 01:34:07 PM PST 24 |
Mar 03 01:34:14 PM PST 24 |
266578119 ps |
T1654 |
/workspace/coverage/default/28.lc_ctrl_prog_failure.297837963 |
|
|
Mar 03 02:43:08 PM PST 24 |
Mar 03 02:43:12 PM PST 24 |
656549293 ps |
T1655 |
/workspace/coverage/default/47.lc_ctrl_state_failure.477453995 |
|
|
Mar 03 01:34:21 PM PST 24 |
Mar 03 01:34:42 PM PST 24 |
252361353 ps |
T1656 |
/workspace/coverage/default/26.lc_ctrl_sec_mubi.800237752 |
|
|
Mar 03 01:33:19 PM PST 24 |
Mar 03 01:33:42 PM PST 24 |
634100819 ps |
T1657 |
/workspace/coverage/default/28.lc_ctrl_state_failure.391130660 |
|
|
Mar 03 02:43:07 PM PST 24 |
Mar 03 02:43:34 PM PST 24 |
536787921 ps |
T1658 |
/workspace/coverage/default/42.lc_ctrl_state_post_trans.2371391271 |
|
|
Mar 03 02:43:58 PM PST 24 |
Mar 03 02:44:07 PM PST 24 |
226685575 ps |
T1659 |
/workspace/coverage/default/40.lc_ctrl_sec_mubi.1818228282 |
|
|
Mar 03 02:43:59 PM PST 24 |
Mar 03 02:44:17 PM PST 24 |
1801921311 ps |
T1660 |
/workspace/coverage/default/7.lc_ctrl_security_escalation.1510744278 |
|
|
Mar 03 02:41:18 PM PST 24 |
Mar 03 02:41:32 PM PST 24 |
2692660428 ps |
T267 |
/workspace/coverage/default/4.lc_ctrl_claim_transition_if.198290097 |
|
|
Mar 03 01:31:31 PM PST 24 |
Mar 03 01:31:32 PM PST 24 |
18867347 ps |
T1661 |
/workspace/coverage/default/17.lc_ctrl_jtag_smoke.968248884 |
|
|
Mar 03 01:32:52 PM PST 24 |
Mar 03 01:33:02 PM PST 24 |
533685754 ps |
T1662 |
/workspace/coverage/default/23.lc_ctrl_security_escalation.529231503 |
|
|
Mar 03 02:42:49 PM PST 24 |
Mar 03 02:43:01 PM PST 24 |
6681380422 ps |
T1663 |
/workspace/coverage/default/46.lc_ctrl_security_escalation.3216085098 |
|
|
Mar 03 01:34:24 PM PST 24 |
Mar 03 01:34:34 PM PST 24 |
2414519244 ps |
T1664 |
/workspace/coverage/default/14.lc_ctrl_sec_token_mux.741569596 |
|
|
Mar 03 02:42:07 PM PST 24 |
Mar 03 02:42:16 PM PST 24 |
1225468352 ps |
T1665 |
/workspace/coverage/default/9.lc_ctrl_jtag_priority.3244764752 |
|
|
Mar 03 02:41:33 PM PST 24 |
Mar 03 02:42:25 PM PST 24 |
2141720834 ps |
T1666 |
/workspace/coverage/default/13.lc_ctrl_errors.1617133311 |
|
|
Mar 03 02:41:56 PM PST 24 |
Mar 03 02:42:07 PM PST 24 |
287098800 ps |
T1667 |
/workspace/coverage/default/39.lc_ctrl_alert_test.3221340007 |
|
|
Mar 03 01:34:09 PM PST 24 |
Mar 03 01:34:10 PM PST 24 |
67670440 ps |
T1668 |
/workspace/coverage/default/20.lc_ctrl_errors.575691737 |
|
|
Mar 03 01:33:06 PM PST 24 |
Mar 03 01:33:19 PM PST 24 |
1114940158 ps |
T1669 |
/workspace/coverage/default/32.lc_ctrl_smoke.2334412221 |
|
|
Mar 03 02:43:22 PM PST 24 |
Mar 03 02:43:24 PM PST 24 |
44338448 ps |
T1670 |
/workspace/coverage/default/2.lc_ctrl_regwen_during_op.2612772067 |
|
|
Mar 03 02:40:23 PM PST 24 |
Mar 03 02:40:48 PM PST 24 |
1398124551 ps |
T59 |
/workspace/coverage/default/49.lc_ctrl_errors.3950785430 |
|
|
Mar 03 02:44:26 PM PST 24 |
Mar 03 02:44:41 PM PST 24 |
660347394 ps |
T1671 |
/workspace/coverage/default/16.lc_ctrl_prog_failure.1407999439 |
|
|
Mar 03 02:42:16 PM PST 24 |
Mar 03 02:42:18 PM PST 24 |
28762697 ps |
T1672 |
/workspace/coverage/default/44.lc_ctrl_sec_token_digest.633325809 |
|
|
Mar 03 02:44:10 PM PST 24 |
Mar 03 02:44:19 PM PST 24 |
685286003 ps |
T1673 |
/workspace/coverage/default/9.lc_ctrl_jtag_regwen_during_op.779624215 |
|
|
Mar 03 02:41:35 PM PST 24 |
Mar 03 02:42:02 PM PST 24 |
1015931421 ps |
T1674 |
/workspace/coverage/default/1.lc_ctrl_jtag_access.1093709562 |
|
|
Mar 03 01:31:13 PM PST 24 |
Mar 03 01:31:21 PM PST 24 |
302483454 ps |
T1675 |
/workspace/coverage/default/33.lc_ctrl_errors.3464033869 |
|
|
Mar 03 02:43:26 PM PST 24 |
Mar 03 02:43:35 PM PST 24 |
873416784 ps |
T1676 |
/workspace/coverage/default/18.lc_ctrl_jtag_prog_failure.3956738686 |
|
|
Mar 03 02:42:27 PM PST 24 |
Mar 03 02:42:33 PM PST 24 |
353303150 ps |
T1677 |
/workspace/coverage/default/21.lc_ctrl_stress_all_with_rand_reset.3044395914 |
|
|
Mar 03 02:42:44 PM PST 24 |
Mar 03 02:51:30 PM PST 24 |
43687030491 ps |
T1678 |
/workspace/coverage/default/18.lc_ctrl_prog_failure.2764761150 |
|
|
Mar 03 01:32:59 PM PST 24 |
Mar 03 01:33:01 PM PST 24 |
20683300 ps |
T1679 |
/workspace/coverage/default/13.lc_ctrl_jtag_prog_failure.1365342321 |
|
|
Mar 03 02:41:56 PM PST 24 |
Mar 03 02:42:06 PM PST 24 |
1197237674 ps |
T1680 |
/workspace/coverage/default/4.lc_ctrl_sec_token_digest.2535393830 |
|
|
Mar 03 01:31:36 PM PST 24 |
Mar 03 01:31:49 PM PST 24 |
280954026 ps |
T1681 |
/workspace/coverage/default/35.lc_ctrl_state_post_trans.364218422 |
|
|
Mar 03 01:33:48 PM PST 24 |
Mar 03 01:33:51 PM PST 24 |
244209271 ps |
T1682 |
/workspace/coverage/default/26.lc_ctrl_volatile_unlock_smoke.2346547980 |
|
|
Mar 03 01:33:22 PM PST 24 |
Mar 03 01:33:23 PM PST 24 |
45765738 ps |
T60 |
/workspace/coverage/default/13.lc_ctrl_stress_all_with_rand_reset.105405090 |
|
|
Mar 03 02:42:07 PM PST 24 |
Mar 03 03:14:34 PM PST 24 |
183094116059 ps |
T1683 |
/workspace/coverage/default/35.lc_ctrl_state_failure.2892826970 |
|
|
Mar 03 01:33:50 PM PST 24 |
Mar 03 01:34:20 PM PST 24 |
760244887 ps |
T1684 |
/workspace/coverage/default/2.lc_ctrl_jtag_prog_failure.121254013 |
|
|
Mar 03 02:40:30 PM PST 24 |
Mar 03 02:40:37 PM PST 24 |
923068420 ps |
T1685 |
/workspace/coverage/default/20.lc_ctrl_smoke.2777226997 |
|
|
Mar 03 02:42:36 PM PST 24 |
Mar 03 02:42:41 PM PST 24 |
619705798 ps |
T1686 |
/workspace/coverage/default/8.lc_ctrl_errors.98026634 |
|
|
Mar 03 01:32:05 PM PST 24 |
Mar 03 01:32:21 PM PST 24 |
2453855654 ps |
T1687 |
/workspace/coverage/default/18.lc_ctrl_jtag_state_failure.2711336720 |
|
|
Mar 03 02:42:29 PM PST 24 |
Mar 03 02:43:10 PM PST 24 |
910400967 ps |
T1688 |
/workspace/coverage/default/39.lc_ctrl_alert_test.3701950603 |
|
|
Mar 03 02:43:52 PM PST 24 |
Mar 03 02:43:54 PM PST 24 |
18332206 ps |
T1689 |
/workspace/coverage/default/44.lc_ctrl_sec_mubi.2949637785 |
|
|
Mar 03 01:34:16 PM PST 24 |
Mar 03 01:34:27 PM PST 24 |
353717545 ps |
T1690 |
/workspace/coverage/default/11.lc_ctrl_jtag_smoke.1486733475 |
|
|
Mar 03 02:41:48 PM PST 24 |
Mar 03 02:41:53 PM PST 24 |
616604480 ps |
T1691 |
/workspace/coverage/default/13.lc_ctrl_errors.326555780 |
|
|
Mar 03 01:32:39 PM PST 24 |
Mar 03 01:32:48 PM PST 24 |
194604475 ps |
T1692 |
/workspace/coverage/default/3.lc_ctrl_jtag_access.338486431 |
|
|
Mar 03 02:40:43 PM PST 24 |
Mar 03 02:40:48 PM PST 24 |
880240481 ps |
T1693 |
/workspace/coverage/default/32.lc_ctrl_state_post_trans.1716194906 |
|
|
Mar 03 01:33:46 PM PST 24 |
Mar 03 01:33:52 PM PST 24 |
270168531 ps |
T1694 |
/workspace/coverage/default/14.lc_ctrl_jtag_state_failure.4104994468 |
|
|
Mar 03 01:32:37 PM PST 24 |
Mar 03 01:33:47 PM PST 24 |
3205625922 ps |
T1695 |
/workspace/coverage/default/44.lc_ctrl_volatile_unlock_smoke.1241974806 |
|
|
Mar 03 01:34:15 PM PST 24 |
Mar 03 01:34:16 PM PST 24 |
45135683 ps |
T1696 |
/workspace/coverage/default/16.lc_ctrl_alert_test.2481972726 |
|
|
Mar 03 02:42:22 PM PST 24 |
Mar 03 02:42:24 PM PST 24 |
91994123 ps |
T1697 |
/workspace/coverage/default/25.lc_ctrl_sec_token_mux.1769009098 |
|
|
Mar 03 01:33:23 PM PST 24 |
Mar 03 01:33:32 PM PST 24 |
943384586 ps |
T1698 |
/workspace/coverage/default/46.lc_ctrl_jtag_access.1396168782 |
|
|
Mar 03 02:44:15 PM PST 24 |
Mar 03 02:44:21 PM PST 24 |
278714365 ps |
T1699 |
/workspace/coverage/default/11.lc_ctrl_state_post_trans.2264093752 |
|
|
Mar 03 01:32:16 PM PST 24 |
Mar 03 01:32:24 PM PST 24 |
281943462 ps |
T1700 |
/workspace/coverage/default/29.lc_ctrl_security_escalation.2796968596 |
|
|
Mar 03 01:33:34 PM PST 24 |
Mar 03 01:33:41 PM PST 24 |
940078050 ps |
T1701 |
/workspace/coverage/default/22.lc_ctrl_errors.485478440 |
|
|
Mar 03 01:33:17 PM PST 24 |
Mar 03 01:33:34 PM PST 24 |
572504359 ps |
T1702 |
/workspace/coverage/default/0.lc_ctrl_volatile_unlock_smoke.240021433 |
|
|
Mar 03 01:30:52 PM PST 24 |
Mar 03 01:30:53 PM PST 24 |
15207688 ps |
T1703 |
/workspace/coverage/default/10.lc_ctrl_jtag_prog_failure.1593336941 |
|
|
Mar 03 01:32:16 PM PST 24 |
Mar 03 01:32:26 PM PST 24 |
558615931 ps |
T1704 |
/workspace/coverage/default/4.lc_ctrl_security_escalation.2054601925 |
|
|
Mar 03 01:31:33 PM PST 24 |
Mar 03 01:31:45 PM PST 24 |
1377572145 ps |
T1705 |
/workspace/coverage/default/30.lc_ctrl_errors.3091521822 |
|
|
Mar 03 02:43:19 PM PST 24 |
Mar 03 02:43:32 PM PST 24 |
321796628 ps |
T1706 |
/workspace/coverage/default/8.lc_ctrl_alert_test.98801807 |
|
|
Mar 03 01:32:10 PM PST 24 |
Mar 03 01:32:11 PM PST 24 |
36930082 ps |
T1707 |
/workspace/coverage/default/28.lc_ctrl_state_post_trans.912003589 |
|
|
Mar 03 02:43:06 PM PST 24 |
Mar 03 02:43:15 PM PST 24 |
172119320 ps |
T1708 |
/workspace/coverage/default/6.lc_ctrl_security_escalation.3692831246 |
|
|
Mar 03 02:41:07 PM PST 24 |
Mar 03 02:41:18 PM PST 24 |
942490820 ps |
T1709 |
/workspace/coverage/default/7.lc_ctrl_sec_token_digest.2882961605 |
|
|
Mar 03 01:31:56 PM PST 24 |
Mar 03 01:32:08 PM PST 24 |
278841603 ps |
T143 |
/workspace/coverage/default/39.lc_ctrl_stress_all_with_rand_reset.722657484 |
|
|
Mar 03 02:43:54 PM PST 24 |
Mar 03 02:49:43 PM PST 24 |
45608633261 ps |
T1710 |
/workspace/coverage/default/2.lc_ctrl_jtag_regwen_during_op.4147046093 |
|
|
Mar 03 02:40:27 PM PST 24 |
Mar 03 02:40:49 PM PST 24 |
1214419094 ps |
T1711 |
/workspace/coverage/default/41.lc_ctrl_sec_token_digest.2665490993 |
|
|
Mar 03 02:43:54 PM PST 24 |
Mar 03 02:44:07 PM PST 24 |
387201198 ps |
T1712 |
/workspace/coverage/default/45.lc_ctrl_stress_all_with_rand_reset.1168482646 |
|
|
Mar 03 01:34:25 PM PST 24 |
Mar 03 01:44:25 PM PST 24 |
27042489581 ps |
T1713 |
/workspace/coverage/default/9.lc_ctrl_errors.548101195 |
|
|
Mar 03 02:41:28 PM PST 24 |
Mar 03 02:41:42 PM PST 24 |
770758954 ps |
T1714 |
/workspace/coverage/default/17.lc_ctrl_jtag_errors.1751032795 |
|
|
Mar 03 01:32:53 PM PST 24 |
Mar 03 01:33:58 PM PST 24 |
7972519456 ps |
T1715 |
/workspace/coverage/default/27.lc_ctrl_security_escalation.1899802748 |
|
|
Mar 03 02:43:06 PM PST 24 |
Mar 03 02:43:16 PM PST 24 |
1014414234 ps |
T135 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.2090223727 |
|
|
Mar 03 12:36:34 PM PST 24 |
Mar 03 12:36:36 PM PST 24 |
29155595 ps |
T139 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.103664213 |
|
|
Mar 03 12:36:59 PM PST 24 |
Mar 03 12:37:00 PM PST 24 |
101141372 ps |
T151 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.3288484246 |
|
|
Mar 03 12:36:58 PM PST 24 |
Mar 03 12:37:00 PM PST 24 |
178471367 ps |
T152 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.1744229037 |
|
|
Mar 03 12:36:52 PM PST 24 |
Mar 03 12:36:55 PM PST 24 |
92869861 ps |
T136 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.921762991 |
|
|
Mar 03 12:36:43 PM PST 24 |
Mar 03 12:36:46 PM PST 24 |
243722924 ps |
T145 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.4044674910 |
|
|
Mar 03 12:36:32 PM PST 24 |
Mar 03 12:36:33 PM PST 24 |
19396567 ps |
T255 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.2875457116 |
|
|
Mar 03 02:09:46 PM PST 24 |
Mar 03 02:09:48 PM PST 24 |
17719947 ps |
T188 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.2611655741 |
|
|
Mar 03 02:09:48 PM PST 24 |
Mar 03 02:09:54 PM PST 24 |
365583720 ps |
T169 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.2578012339 |
|
|
Mar 03 02:09:46 PM PST 24 |
Mar 03 02:09:48 PM PST 24 |
37740261 ps |
T246 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.3572047182 |
|
|
Mar 03 12:36:51 PM PST 24 |
Mar 03 12:36:52 PM PST 24 |
24613515 ps |
T1716 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.306487494 |
|
|
Mar 03 02:10:07 PM PST 24 |
Mar 03 02:10:08 PM PST 24 |
11742521 ps |
T190 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.3451672527 |
|
|
Mar 03 12:36:41 PM PST 24 |
Mar 03 12:36:43 PM PST 24 |
141932930 ps |
T191 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.4161560003 |
|
|
Mar 03 12:36:51 PM PST 24 |
Mar 03 12:37:09 PM PST 24 |
19934126622 ps |
T146 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.3546114238 |
|
|
Mar 03 12:36:33 PM PST 24 |
Mar 03 12:36:34 PM PST 24 |
35241980 ps |
T201 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.655359124 |
|
|
Mar 03 12:36:54 PM PST 24 |
Mar 03 12:36:56 PM PST 24 |
42300079 ps |
T230 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.4151650222 |
|
|
Mar 03 02:09:56 PM PST 24 |
Mar 03 02:09:58 PM PST 24 |
25470755 ps |
T144 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.1240170251 |
|
|
Mar 03 02:10:04 PM PST 24 |
Mar 03 02:10:07 PM PST 24 |
42528367 ps |
T1717 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.2885252400 |
|
|
Mar 03 12:36:33 PM PST 24 |
Mar 03 12:36:35 PM PST 24 |
33164247 ps |
T256 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.3771503129 |
|
|
Mar 03 02:09:41 PM PST 24 |
Mar 03 02:09:49 PM PST 24 |
475794237 ps |
T1718 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.3067028077 |
|
|
Mar 03 12:36:48 PM PST 24 |
Mar 03 12:36:58 PM PST 24 |
1640677571 ps |
T202 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.3692204073 |
|
|
Mar 03 02:09:44 PM PST 24 |
Mar 03 02:09:45 PM PST 24 |
243105285 ps |
T189 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.474601093 |
|
|
Mar 03 02:09:54 PM PST 24 |
Mar 03 02:09:58 PM PST 24 |
679110741 ps |
T247 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.4093597523 |
|
|
Mar 03 02:10:06 PM PST 24 |
Mar 03 02:10:08 PM PST 24 |
78918754 ps |
T1719 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.1829714103 |
|
|
Mar 03 02:09:57 PM PST 24 |
Mar 03 02:10:19 PM PST 24 |
3647599642 ps |
T1720 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.2713199234 |
|
|
Mar 03 12:36:45 PM PST 24 |
Mar 03 12:36:47 PM PST 24 |
75934204 ps |
T140 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.127365395 |
|
|
Mar 03 12:36:51 PM PST 24 |
Mar 03 12:36:56 PM PST 24 |
588230243 ps |
T248 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.2497724880 |
|
|
Mar 03 12:36:52 PM PST 24 |
Mar 03 12:36:54 PM PST 24 |
143971691 ps |
T207 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.1978958475 |
|
|
Mar 03 12:36:48 PM PST 24 |
Mar 03 12:36:51 PM PST 24 |
473202998 ps |
T208 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.3127044497 |
|
|
Mar 03 02:09:56 PM PST 24 |
Mar 03 02:09:58 PM PST 24 |
175755301 ps |
T185 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2814700962 |
|
|
Mar 03 02:09:58 PM PST 24 |
Mar 03 02:10:01 PM PST 24 |
88585457 ps |
T203 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.2162881446 |
|
|
Mar 03 12:36:49 PM PST 24 |
Mar 03 12:36:50 PM PST 24 |
100337313 ps |
T1721 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.3900638331 |
|
|
Mar 03 02:09:53 PM PST 24 |
Mar 03 02:09:55 PM PST 24 |
27423349 ps |
T147 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.960820295 |
|
|
Mar 03 12:36:48 PM PST 24 |
Mar 03 12:36:51 PM PST 24 |
312723872 ps |
T1722 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.4161143710 |
|
|
Mar 03 02:09:46 PM PST 24 |
Mar 03 02:09:56 PM PST 24 |
875998757 ps |
T186 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.3841950809 |
|
|
Mar 03 12:36:51 PM PST 24 |
Mar 03 12:36:54 PM PST 24 |
75450634 ps |
T1723 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.4055550544 |
|
|
Mar 03 02:09:31 PM PST 24 |
Mar 03 02:09:32 PM PST 24 |
57963629 ps |
T249 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.3851194322 |
|
|
Mar 03 02:10:00 PM PST 24 |
Mar 03 02:10:02 PM PST 24 |
55701557 ps |
T250 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.4162008918 |
|
|
Mar 03 02:09:57 PM PST 24 |
Mar 03 02:09:59 PM PST 24 |
76616464 ps |
T141 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.2922147914 |
|
|
Mar 03 02:09:57 PM PST 24 |
Mar 03 02:09:59 PM PST 24 |
78038814 ps |
T160 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.3580829277 |
|
|
Mar 03 12:36:51 PM PST 24 |
Mar 03 12:36:54 PM PST 24 |
44768595 ps |
T251 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.331587326 |
|
|
Mar 03 02:09:40 PM PST 24 |
Mar 03 02:09:42 PM PST 24 |
90379259 ps |
T252 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.1449960070 |
|
|
Mar 03 02:09:54 PM PST 24 |
Mar 03 02:09:56 PM PST 24 |
44861497 ps |
T1724 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.196033363 |
|
|
Mar 03 12:36:53 PM PST 24 |
Mar 03 12:36:57 PM PST 24 |
134884711 ps |
T142 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.326527639 |
|
|
Mar 03 12:36:41 PM PST 24 |
Mar 03 12:36:48 PM PST 24 |
90232050 ps |
T1725 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.373141233 |
|
|
Mar 03 02:09:45 PM PST 24 |
Mar 03 02:09:47 PM PST 24 |
101385436 ps |
T1726 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.2709551338 |
|
|
Mar 03 02:09:35 PM PST 24 |
Mar 03 02:09:38 PM PST 24 |
480688537 ps |
T1727 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.1745398345 |
|
|
Mar 03 02:09:38 PM PST 24 |
Mar 03 02:09:48 PM PST 24 |
8511691147 ps |
T1728 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.2340595031 |
|
|
Mar 03 02:09:36 PM PST 24 |
Mar 03 02:09:38 PM PST 24 |
138740193 ps |
T177 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.3253576461 |
|
|
Mar 03 02:09:44 PM PST 24 |
Mar 03 02:09:48 PM PST 24 |
395996998 ps |
T253 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.126840084 |
|
|
Mar 03 02:09:43 PM PST 24 |
Mar 03 02:09:44 PM PST 24 |
83440078 ps |
T254 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.3128484808 |
|
|
Mar 03 12:36:35 PM PST 24 |
Mar 03 12:36:36 PM PST 24 |
17406569 ps |
T1729 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3695036390 |
|
|
Mar 03 02:09:45 PM PST 24 |
Mar 03 02:09:48 PM PST 24 |
233661219 ps |
T1730 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.2483407733 |
|
|
Mar 03 02:09:48 PM PST 24 |
Mar 03 02:10:21 PM PST 24 |
1482195185 ps |
T231 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.2419132493 |
|
|
Mar 03 02:10:03 PM PST 24 |
Mar 03 02:10:04 PM PST 24 |
17786753 ps |
T1731 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.1530942480 |
|
|
Mar 03 02:09:39 PM PST 24 |
Mar 03 02:09:51 PM PST 24 |
2272762910 ps |
T1732 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.3490617615 |
|
|
Mar 03 02:09:46 PM PST 24 |
Mar 03 02:09:48 PM PST 24 |
29427592 ps |
T1733 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.3272276866 |
|
|
Mar 03 02:09:45 PM PST 24 |
Mar 03 02:09:49 PM PST 24 |
534549908 ps |
T162 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2420345182 |
|
|
Mar 03 02:09:48 PM PST 24 |
Mar 03 02:09:51 PM PST 24 |
60267228 ps |
T1734 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.3588464172 |
|
|
Mar 03 12:36:37 PM PST 24 |
Mar 03 12:36:38 PM PST 24 |
35924066 ps |
T187 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.1984755805 |
|
|
Mar 03 02:09:36 PM PST 24 |
Mar 03 02:09:37 PM PST 24 |
776697511 ps |
T1735 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.2164195768 |
|
|
Mar 03 12:36:51 PM PST 24 |
Mar 03 12:37:00 PM PST 24 |
298612967 ps |
T1736 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.2682904106 |
|
|
Mar 03 02:10:08 PM PST 24 |
Mar 03 02:10:09 PM PST 24 |
46875467 ps |
T1737 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.2408108004 |
|
|
Mar 03 02:09:57 PM PST 24 |
Mar 03 02:10:05 PM PST 24 |
813933476 ps |
T1738 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.2247245602 |
|
|
Mar 03 02:10:03 PM PST 24 |
Mar 03 02:10:05 PM PST 24 |
29061208 ps |
T1739 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.3070881248 |
|
|
Mar 03 12:36:35 PM PST 24 |
Mar 03 12:36:38 PM PST 24 |
23473474 ps |
T170 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.2555430682 |
|
|
Mar 03 12:36:49 PM PST 24 |
Mar 03 12:36:52 PM PST 24 |
83415162 ps |
T1740 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.2488719661 |
|
|
Mar 03 02:09:59 PM PST 24 |
Mar 03 02:10:00 PM PST 24 |
123178612 ps |
T1741 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.3504928045 |
|
|
Mar 03 12:36:32 PM PST 24 |
Mar 03 12:36:34 PM PST 24 |
41076121 ps |
T1742 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.2845083704 |
|
|
Mar 03 12:36:51 PM PST 24 |
Mar 03 12:37:15 PM PST 24 |
9423529466 ps |
T1743 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.492654256 |
|
|
Mar 03 12:36:49 PM PST 24 |
Mar 03 12:36:54 PM PST 24 |
1841135703 ps |
T1744 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.899190076 |
|
|
Mar 03 12:36:40 PM PST 24 |
Mar 03 12:36:41 PM PST 24 |
80786948 ps |
T167 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.4170724005 |
|
|
Mar 03 02:10:04 PM PST 24 |
Mar 03 02:10:07 PM PST 24 |
62154119 ps |
T1745 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.710571192 |
|
|
Mar 03 12:36:53 PM PST 24 |
Mar 03 12:36:56 PM PST 24 |
42867624 ps |
T1746 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.525434955 |
|
|
Mar 03 02:09:42 PM PST 24 |
Mar 03 02:09:44 PM PST 24 |
88419085 ps |
T1747 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.1531153038 |
|
|
Mar 03 02:09:46 PM PST 24 |
Mar 03 02:09:48 PM PST 24 |
71001831 ps |
T163 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.2734448866 |
|
|
Mar 03 12:36:54 PM PST 24 |
Mar 03 12:36:58 PM PST 24 |
597101322 ps |
T1748 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.3794896446 |
|
|
Mar 03 12:36:48 PM PST 24 |
Mar 03 12:36:50 PM PST 24 |
419293768 ps |
T174 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.786254360 |
|
|
Mar 03 02:10:02 PM PST 24 |
Mar 03 02:10:04 PM PST 24 |
813094927 ps |
T154 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.2020295130 |
|
|
Mar 03 12:36:32 PM PST 24 |
Mar 03 12:36:41 PM PST 24 |
76909934 ps |
T172 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.2802203264 |
|
|
Mar 03 12:36:33 PM PST 24 |
Mar 03 12:36:35 PM PST 24 |
87973041 ps |
T156 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.290111941 |
|
|
Mar 03 02:10:07 PM PST 24 |
Mar 03 02:10:11 PM PST 24 |
417274565 ps |
T1749 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.2731647573 |
|
|
Mar 03 02:09:45 PM PST 24 |
Mar 03 02:09:47 PM PST 24 |
44259471 ps |
T1750 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.688045585 |
|
|
Mar 03 02:09:44 PM PST 24 |
Mar 03 02:09:47 PM PST 24 |
161111641 ps |
T1751 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.305198490 |
|
|
Mar 03 12:36:47 PM PST 24 |
Mar 03 12:36:51 PM PST 24 |
512691548 ps |
T1752 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.2351652791 |
|
|
Mar 03 12:36:31 PM PST 24 |
Mar 03 12:36:36 PM PST 24 |
1753586300 ps |
T232 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.3328762478 |
|
|
Mar 03 12:36:33 PM PST 24 |
Mar 03 12:36:34 PM PST 24 |
35141672 ps |
T1753 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.2553939317 |
|
|
Mar 03 12:36:54 PM PST 24 |
Mar 03 12:36:56 PM PST 24 |
40276671 ps |
T1754 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.493604303 |
|
|
Mar 03 02:09:52 PM PST 24 |
Mar 03 02:09:54 PM PST 24 |
47181666 ps |
T1755 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.2153029956 |
|
|
Mar 03 12:36:52 PM PST 24 |
Mar 03 12:36:54 PM PST 24 |
128289970 ps |
T1756 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.865746243 |
|
|
Mar 03 02:10:06 PM PST 24 |
Mar 03 02:10:08 PM PST 24 |
141952990 ps |
T1757 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.1703485853 |
|
|
Mar 03 02:09:40 PM PST 24 |
Mar 03 02:09:43 PM PST 24 |
118631957 ps |
T1758 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.4294709485 |
|
|
Mar 03 02:09:48 PM PST 24 |
Mar 03 02:09:57 PM PST 24 |
2843900403 ps |
T157 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.46859409 |
|
|
Mar 03 02:10:07 PM PST 24 |
Mar 03 02:10:09 PM PST 24 |
28272373 ps |
T233 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.2808644300 |
|
|
Mar 03 02:10:01 PM PST 24 |
Mar 03 02:10:03 PM PST 24 |
57830950 ps |
T234 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.2316006179 |
|
|
Mar 03 12:37:00 PM PST 24 |
Mar 03 12:37:01 PM PST 24 |
29542297 ps |
T1759 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.3151894964 |
|
|
Mar 03 12:36:51 PM PST 24 |
Mar 03 12:36:54 PM PST 24 |
50393842 ps |
T1760 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.2069353949 |
|
|
Mar 03 02:10:03 PM PST 24 |
Mar 03 02:10:04 PM PST 24 |
15244627 ps |
T1761 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.1412541963 |
|
|
Mar 03 02:09:38 PM PST 24 |
Mar 03 02:09:41 PM PST 24 |
820276976 ps |
T1762 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.3355017301 |
|
|
Mar 03 12:36:53 PM PST 24 |
Mar 03 12:36:54 PM PST 24 |
15964501 ps |
T1763 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.1932963957 |
|
|
Mar 03 02:10:03 PM PST 24 |
Mar 03 02:10:04 PM PST 24 |
27652458 ps |
T148 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.1404741470 |
|
|
Mar 03 12:36:54 PM PST 24 |
Mar 03 12:36:57 PM PST 24 |
285793804 ps |
T1764 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.2092336339 |
|
|
Mar 03 02:09:42 PM PST 24 |
Mar 03 02:09:45 PM PST 24 |
172972802 ps |
T1765 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.2750008908 |
|
|
Mar 03 02:09:49 PM PST 24 |
Mar 03 02:09:52 PM PST 24 |
268110242 ps |
T1766 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.925827274 |
|
|
Mar 03 12:36:48 PM PST 24 |
Mar 03 12:36:49 PM PST 24 |
38969317 ps |
T1767 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.531600898 |
|
|
Mar 03 02:10:02 PM PST 24 |
Mar 03 02:10:03 PM PST 24 |
51195684 ps |
T168 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.1572049094 |
|
|
Mar 03 02:10:00 PM PST 24 |
Mar 03 02:10:02 PM PST 24 |
137644117 ps |
T1768 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.2997259297 |
|
|
Mar 03 02:09:36 PM PST 24 |
Mar 03 02:09:37 PM PST 24 |
152235351 ps |
T1769 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.3015709049 |
|
|
Mar 03 12:36:51 PM PST 24 |
Mar 03 12:36:55 PM PST 24 |
111146494 ps |
T153 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.515382270 |
|
|
Mar 03 02:09:53 PM PST 24 |
Mar 03 02:09:55 PM PST 24 |
48270978 ps |
T1770 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.3493940695 |
|
|
Mar 03 02:09:50 PM PST 24 |
Mar 03 02:09:51 PM PST 24 |
195696449 ps |
T1771 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.2278434497 |
|
|
Mar 03 12:36:51 PM PST 24 |
Mar 03 12:36:54 PM PST 24 |
27552122 ps |
T1772 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.1423914276 |
|
|
Mar 03 12:36:49 PM PST 24 |
Mar 03 12:36:51 PM PST 24 |
93468849 ps |
T1773 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.3035500655 |
|
|
Mar 03 12:36:47 PM PST 24 |
Mar 03 12:36:54 PM PST 24 |
26048885 ps |
T1774 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.888409054 |
|
|
Mar 03 12:36:34 PM PST 24 |
Mar 03 12:36:46 PM PST 24 |
4357448625 ps |
T1775 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.3797162449 |
|
|
Mar 03 02:09:52 PM PST 24 |
Mar 03 02:09:54 PM PST 24 |
34663204 ps |
T1776 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.2053021348 |
|
|
Mar 03 12:36:32 PM PST 24 |
Mar 03 12:36:33 PM PST 24 |
130381800 ps |
T1777 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.1694942047 |
|
|
Mar 03 02:09:54 PM PST 24 |
Mar 03 02:10:06 PM PST 24 |
1205950544 ps |
T1778 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.437373735 |
|
|
Mar 03 02:10:04 PM PST 24 |
Mar 03 02:10:06 PM PST 24 |
15242533 ps |
T1779 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.1593906309 |
|
|
Mar 03 12:36:58 PM PST 24 |
Mar 03 12:37:05 PM PST 24 |
480821303 ps |
T1780 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.234966941 |
|
|
Mar 03 12:36:53 PM PST 24 |
Mar 03 12:36:57 PM PST 24 |
645977177 ps |
T1781 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.805837896 |
|
|
Mar 03 12:37:04 PM PST 24 |
Mar 03 12:37:07 PM PST 24 |
48180837 ps |