| T1559 |
/workspace/coverage/default/10.lc_ctrl_jtag_prog_failure.3799567031 |
|
|
Mar 10 02:24:38 PM PDT 24 |
Mar 10 02:24:46 PM PDT 24 |
10507980255 ps |
| T1560 |
/workspace/coverage/default/36.lc_ctrl_errors.527175698 |
|
|
Mar 10 02:27:21 PM PDT 24 |
Mar 10 02:27:32 PM PDT 24 |
375257643 ps |
| T1561 |
/workspace/coverage/default/6.lc_ctrl_regwen_during_op.1427036657 |
|
|
Mar 10 01:53:26 PM PDT 24 |
Mar 10 01:53:49 PM PDT 24 |
1480440233 ps |
| T1562 |
/workspace/coverage/default/5.lc_ctrl_sec_token_mux.1174587078 |
|
|
Mar 10 02:23:39 PM PDT 24 |
Mar 10 02:23:48 PM PDT 24 |
3187295378 ps |
| T1563 |
/workspace/coverage/default/41.lc_ctrl_state_post_trans.2872015804 |
|
|
Mar 10 02:27:39 PM PDT 24 |
Mar 10 02:27:46 PM PDT 24 |
341851722 ps |
| T1564 |
/workspace/coverage/default/4.lc_ctrl_jtag_state_failure.1730177939 |
|
|
Mar 10 02:23:22 PM PDT 24 |
Mar 10 02:23:59 PM PDT 24 |
3359611128 ps |
| T1565 |
/workspace/coverage/default/24.lc_ctrl_errors.1826387325 |
|
|
Mar 10 01:54:50 PM PDT 24 |
Mar 10 01:55:02 PM PDT 24 |
728208256 ps |
| T1566 |
/workspace/coverage/default/11.lc_ctrl_jtag_smoke.4003180836 |
|
|
Mar 10 01:53:54 PM PDT 24 |
Mar 10 01:53:58 PM PDT 24 |
221256281 ps |
| T1567 |
/workspace/coverage/default/41.lc_ctrl_stress_all.386057893 |
|
|
Mar 10 01:55:34 PM PDT 24 |
Mar 10 01:57:49 PM PDT 24 |
3462783189 ps |
| T1568 |
/workspace/coverage/default/42.lc_ctrl_errors.2466127239 |
|
|
Mar 10 01:55:39 PM PDT 24 |
Mar 10 01:55:48 PM PDT 24 |
2441162274 ps |
| T170 |
/workspace/coverage/default/26.lc_ctrl_stress_all_with_rand_reset.2003027669 |
|
|
Mar 10 02:26:31 PM PDT 24 |
Mar 10 02:30:24 PM PDT 24 |
9677170499 ps |
| T1569 |
/workspace/coverage/default/14.lc_ctrl_jtag_access.330786784 |
|
|
Mar 10 02:25:08 PM PDT 24 |
Mar 10 02:25:19 PM PDT 24 |
380968945 ps |
| T1570 |
/workspace/coverage/default/39.lc_ctrl_smoke.2166445210 |
|
|
Mar 10 02:27:31 PM PDT 24 |
Mar 10 02:27:32 PM PDT 24 |
17397647 ps |
| T1571 |
/workspace/coverage/default/19.lc_ctrl_smoke.3249538873 |
|
|
Mar 10 02:25:44 PM PDT 24 |
Mar 10 02:25:46 PM PDT 24 |
36995666 ps |
| T1572 |
/workspace/coverage/default/49.lc_ctrl_sec_token_digest.3641622627 |
|
|
Mar 10 02:28:22 PM PDT 24 |
Mar 10 02:28:33 PM PDT 24 |
990846812 ps |
| T1573 |
/workspace/coverage/default/11.lc_ctrl_jtag_state_failure.3569695699 |
|
|
Mar 10 02:24:40 PM PDT 24 |
Mar 10 02:25:15 PM PDT 24 |
933898454 ps |
| T1574 |
/workspace/coverage/default/2.lc_ctrl_jtag_regwen_during_op.303491522 |
|
|
Mar 10 02:22:54 PM PDT 24 |
Mar 10 02:23:25 PM PDT 24 |
1123395878 ps |
| T1575 |
/workspace/coverage/default/5.lc_ctrl_state_failure.3986044349 |
|
|
Mar 10 02:23:32 PM PDT 24 |
Mar 10 02:23:51 PM PDT 24 |
913597444 ps |
| T1576 |
/workspace/coverage/default/17.lc_ctrl_prog_failure.756041281 |
|
|
Mar 10 01:54:21 PM PDT 24 |
Mar 10 01:54:23 PM PDT 24 |
529031709 ps |
| T1577 |
/workspace/coverage/default/10.lc_ctrl_sec_token_digest.2613394347 |
|
|
Mar 10 02:24:42 PM PDT 24 |
Mar 10 02:24:54 PM PDT 24 |
1256735899 ps |
| T1578 |
/workspace/coverage/default/7.lc_ctrl_stress_all.132879244 |
|
|
Mar 10 01:53:36 PM PDT 24 |
Mar 10 01:56:58 PM PDT 24 |
5870738933 ps |
| T1579 |
/workspace/coverage/default/15.lc_ctrl_alert_test.3453500893 |
|
|
Mar 10 02:25:19 PM PDT 24 |
Mar 10 02:25:21 PM PDT 24 |
48301784 ps |
| T1580 |
/workspace/coverage/default/38.lc_ctrl_sec_token_digest.3367227129 |
|
|
Mar 10 01:55:30 PM PDT 24 |
Mar 10 01:55:46 PM PDT 24 |
4950924289 ps |
| T1581 |
/workspace/coverage/default/15.lc_ctrl_security_escalation.1080500234 |
|
|
Mar 10 01:54:11 PM PDT 24 |
Mar 10 01:54:22 PM PDT 24 |
870326807 ps |
| T1582 |
/workspace/coverage/default/23.lc_ctrl_errors.1503425075 |
|
|
Mar 10 02:26:11 PM PDT 24 |
Mar 10 02:26:27 PM PDT 24 |
527723831 ps |
| T1583 |
/workspace/coverage/default/41.lc_ctrl_sec_token_digest.371455311 |
|
|
Mar 10 02:27:46 PM PDT 24 |
Mar 10 02:27:56 PM PDT 24 |
1291318098 ps |
| T1584 |
/workspace/coverage/default/15.lc_ctrl_sec_mubi.2030741683 |
|
|
Mar 10 01:54:12 PM PDT 24 |
Mar 10 01:54:31 PM PDT 24 |
1095562327 ps |
| T1585 |
/workspace/coverage/default/36.lc_ctrl_security_escalation.2391265160 |
|
|
Mar 10 01:55:22 PM PDT 24 |
Mar 10 01:55:31 PM PDT 24 |
2308398089 ps |
| T1586 |
/workspace/coverage/default/0.lc_ctrl_errors.339412642 |
|
|
Mar 10 02:22:01 PM PDT 24 |
Mar 10 02:22:16 PM PDT 24 |
2954418010 ps |
| T1587 |
/workspace/coverage/default/22.lc_ctrl_volatile_unlock_smoke.1861594631 |
|
|
Mar 10 02:26:05 PM PDT 24 |
Mar 10 02:26:06 PM PDT 24 |
16016473 ps |
| T1588 |
/workspace/coverage/default/9.lc_ctrl_jtag_regwen_during_op.2776534136 |
|
|
Mar 10 01:53:46 PM PDT 24 |
Mar 10 01:54:01 PM PDT 24 |
906842520 ps |
| T1589 |
/workspace/coverage/default/13.lc_ctrl_security_escalation.3349419825 |
|
|
Mar 10 02:25:01 PM PDT 24 |
Mar 10 02:25:15 PM PDT 24 |
1299070267 ps |
| T1590 |
/workspace/coverage/default/39.lc_ctrl_sec_token_mux.3092975384 |
|
|
Mar 10 02:27:30 PM PDT 24 |
Mar 10 02:27:41 PM PDT 24 |
289415341 ps |
| T1591 |
/workspace/coverage/default/15.lc_ctrl_stress_all.2831718349 |
|
|
Mar 10 01:54:41 PM PDT 24 |
Mar 10 01:57:09 PM PDT 24 |
16227535708 ps |
| T1592 |
/workspace/coverage/default/37.lc_ctrl_state_failure.3086149485 |
|
|
Mar 10 02:27:20 PM PDT 24 |
Mar 10 02:27:49 PM PDT 24 |
1064583792 ps |
| T1593 |
/workspace/coverage/default/17.lc_ctrl_sec_token_digest.2770957947 |
|
|
Mar 10 02:25:36 PM PDT 24 |
Mar 10 02:26:05 PM PDT 24 |
2633061670 ps |
| T1594 |
/workspace/coverage/default/17.lc_ctrl_state_post_trans.2787320360 |
|
|
Mar 10 02:25:35 PM PDT 24 |
Mar 10 02:25:43 PM PDT 24 |
378215662 ps |
| T1595 |
/workspace/coverage/default/46.lc_ctrl_errors.3188790617 |
|
|
Mar 10 01:55:46 PM PDT 24 |
Mar 10 01:56:00 PM PDT 24 |
1214292826 ps |
| T1596 |
/workspace/coverage/default/28.lc_ctrl_state_failure.2018095956 |
|
|
Mar 10 02:26:37 PM PDT 24 |
Mar 10 02:27:07 PM PDT 24 |
217367692 ps |
| T1597 |
/workspace/coverage/default/5.lc_ctrl_jtag_state_post_trans.3103264289 |
|
|
Mar 10 02:23:36 PM PDT 24 |
Mar 10 02:23:49 PM PDT 24 |
962878600 ps |
| T1598 |
/workspace/coverage/default/37.lc_ctrl_sec_token_mux.2938371646 |
|
|
Mar 10 02:27:29 PM PDT 24 |
Mar 10 02:27:39 PM PDT 24 |
948080682 ps |
| T1599 |
/workspace/coverage/default/29.lc_ctrl_alert_test.3351347130 |
|
|
Mar 10 02:26:45 PM PDT 24 |
Mar 10 02:26:46 PM PDT 24 |
148556105 ps |
| T1600 |
/workspace/coverage/default/9.lc_ctrl_jtag_access.3671475151 |
|
|
Mar 10 02:24:25 PM PDT 24 |
Mar 10 02:24:41 PM PDT 24 |
648738022 ps |
| T1601 |
/workspace/coverage/default/30.lc_ctrl_sec_token_digest.3933251368 |
|
|
Mar 10 02:26:45 PM PDT 24 |
Mar 10 02:26:52 PM PDT 24 |
766068368 ps |
| T1602 |
/workspace/coverage/default/3.lc_ctrl_jtag_priority.1230308427 |
|
|
Mar 10 02:23:12 PM PDT 24 |
Mar 10 02:23:20 PM PDT 24 |
2002336912 ps |
| T1603 |
/workspace/coverage/default/0.lc_ctrl_regwen_during_op.3534459634 |
|
|
Mar 10 01:52:49 PM PDT 24 |
Mar 10 01:52:56 PM PDT 24 |
1129612670 ps |
| T1604 |
/workspace/coverage/default/7.lc_ctrl_sec_token_mux.2377182329 |
|
|
Mar 10 01:53:34 PM PDT 24 |
Mar 10 01:53:48 PM PDT 24 |
388107518 ps |
| T1605 |
/workspace/coverage/default/8.lc_ctrl_security_escalation.2580244110 |
|
|
Mar 10 02:24:11 PM PDT 24 |
Mar 10 02:24:18 PM PDT 24 |
225931201 ps |
| T1606 |
/workspace/coverage/default/48.lc_ctrl_state_failure.1564705308 |
|
|
Mar 10 02:28:11 PM PDT 24 |
Mar 10 02:28:35 PM PDT 24 |
992178785 ps |
| T1607 |
/workspace/coverage/default/38.lc_ctrl_sec_token_mux.2200073263 |
|
|
Mar 10 01:55:29 PM PDT 24 |
Mar 10 01:55:38 PM PDT 24 |
2270741555 ps |
| T1608 |
/workspace/coverage/default/8.lc_ctrl_prog_failure.3243591500 |
|
|
Mar 10 02:24:12 PM PDT 24 |
Mar 10 02:24:15 PM PDT 24 |
1360978778 ps |
| T1609 |
/workspace/coverage/default/49.lc_ctrl_alert_test.345160008 |
|
|
Mar 10 01:56:02 PM PDT 24 |
Mar 10 01:56:03 PM PDT 24 |
107322900 ps |
| T1610 |
/workspace/coverage/default/23.lc_ctrl_volatile_unlock_smoke.3771443941 |
|
|
Mar 10 02:26:11 PM PDT 24 |
Mar 10 02:26:12 PM PDT 24 |
18738980 ps |
| T1611 |
/workspace/coverage/default/5.lc_ctrl_jtag_errors.1416668337 |
|
|
Mar 10 02:23:37 PM PDT 24 |
Mar 10 02:24:07 PM PDT 24 |
1553447004 ps |
| T1612 |
/workspace/coverage/default/15.lc_ctrl_security_escalation.1035255290 |
|
|
Mar 10 02:25:15 PM PDT 24 |
Mar 10 02:25:27 PM PDT 24 |
329775765 ps |
| T1613 |
/workspace/coverage/default/1.lc_ctrl_sec_mubi.1661778084 |
|
|
Mar 10 02:22:38 PM PDT 24 |
Mar 10 02:22:56 PM PDT 24 |
692832395 ps |
| T1614 |
/workspace/coverage/default/13.lc_ctrl_state_post_trans.4037241919 |
|
|
Mar 10 02:24:57 PM PDT 24 |
Mar 10 02:25:04 PM PDT 24 |
110381059 ps |
| T1615 |
/workspace/coverage/default/49.lc_ctrl_volatile_unlock_smoke.1469932137 |
|
|
Mar 10 02:28:15 PM PDT 24 |
Mar 10 02:28:16 PM PDT 24 |
46217669 ps |
| T1616 |
/workspace/coverage/default/29.lc_ctrl_smoke.3220137230 |
|
|
Mar 10 01:55:00 PM PDT 24 |
Mar 10 01:55:03 PM PDT 24 |
74342940 ps |
| T1617 |
/workspace/coverage/default/27.lc_ctrl_jtag_access.4254331982 |
|
|
Mar 10 01:55:01 PM PDT 24 |
Mar 10 01:55:10 PM PDT 24 |
880919147 ps |
| T1618 |
/workspace/coverage/default/19.lc_ctrl_jtag_smoke.1455635006 |
|
|
Mar 10 01:54:27 PM PDT 24 |
Mar 10 01:54:35 PM PDT 24 |
2180898454 ps |
| T1619 |
/workspace/coverage/default/5.lc_ctrl_sec_mubi.151982572 |
|
|
Mar 10 01:53:20 PM PDT 24 |
Mar 10 01:53:29 PM PDT 24 |
281422949 ps |
| T1620 |
/workspace/coverage/default/11.lc_ctrl_sec_token_mux.1086873289 |
|
|
Mar 10 02:24:45 PM PDT 24 |
Mar 10 02:24:58 PM PDT 24 |
355872683 ps |
| T1621 |
/workspace/coverage/default/29.lc_ctrl_state_post_trans.2309496019 |
|
|
Mar 10 01:55:01 PM PDT 24 |
Mar 10 01:55:05 PM PDT 24 |
801142438 ps |
| T1622 |
/workspace/coverage/default/24.lc_ctrl_stress_all.1069755541 |
|
|
Mar 10 01:54:46 PM PDT 24 |
Mar 10 01:58:18 PM PDT 24 |
57199620232 ps |
| T1623 |
/workspace/coverage/default/8.lc_ctrl_smoke.33910458 |
|
|
Mar 10 01:53:35 PM PDT 24 |
Mar 10 01:53:40 PM PDT 24 |
1245373515 ps |
| T1624 |
/workspace/coverage/default/4.lc_ctrl_sec_token_mux.3949223037 |
|
|
Mar 10 01:53:16 PM PDT 24 |
Mar 10 01:53:26 PM PDT 24 |
2194746493 ps |
| T1625 |
/workspace/coverage/default/30.lc_ctrl_stress_all.727358120 |
|
|
Mar 10 01:55:06 PM PDT 24 |
Mar 10 01:58:26 PM PDT 24 |
43753885340 ps |
| T1626 |
/workspace/coverage/default/29.lc_ctrl_prog_failure.3781088932 |
|
|
Mar 10 02:26:41 PM PDT 24 |
Mar 10 02:26:44 PM PDT 24 |
150565740 ps |
| T1627 |
/workspace/coverage/default/20.lc_ctrl_alert_test.3771336962 |
|
|
Mar 10 02:25:58 PM PDT 24 |
Mar 10 02:25:59 PM PDT 24 |
85000457 ps |
| T1628 |
/workspace/coverage/default/1.lc_ctrl_stress_all.1245823497 |
|
|
Mar 10 01:52:58 PM PDT 24 |
Mar 10 01:55:21 PM PDT 24 |
24703564071 ps |
| T1629 |
/workspace/coverage/default/1.lc_ctrl_claim_transition_if.875553735 |
|
|
Mar 10 02:22:29 PM PDT 24 |
Mar 10 02:22:30 PM PDT 24 |
19377045 ps |
| T1630 |
/workspace/coverage/default/3.lc_ctrl_jtag_smoke.1110269616 |
|
|
Mar 10 02:23:11 PM PDT 24 |
Mar 10 02:23:18 PM PDT 24 |
1189551429 ps |
| T1631 |
/workspace/coverage/default/7.lc_ctrl_jtag_regwen_during_op.3022579344 |
|
|
Mar 10 01:53:34 PM PDT 24 |
Mar 10 01:53:49 PM PDT 24 |
916885334 ps |
| T1632 |
/workspace/coverage/default/43.lc_ctrl_stress_all.2747953293 |
|
|
Mar 10 02:27:56 PM PDT 24 |
Mar 10 02:32:43 PM PDT 24 |
14229478841 ps |
| T1633 |
/workspace/coverage/default/28.lc_ctrl_sec_token_digest.1393149269 |
|
|
Mar 10 02:26:41 PM PDT 24 |
Mar 10 02:26:52 PM PDT 24 |
320402384 ps |
| T1634 |
/workspace/coverage/default/31.lc_ctrl_smoke.2829564746 |
|
|
Mar 10 01:55:06 PM PDT 24 |
Mar 10 01:55:08 PM PDT 24 |
157247352 ps |
| T1635 |
/workspace/coverage/default/41.lc_ctrl_alert_test.3446404548 |
|
|
Mar 10 01:55:38 PM PDT 24 |
Mar 10 01:55:40 PM PDT 24 |
121396725 ps |
| T1636 |
/workspace/coverage/default/14.lc_ctrl_jtag_state_post_trans.272299382 |
|
|
Mar 10 01:54:08 PM PDT 24 |
Mar 10 01:54:22 PM PDT 24 |
2259938752 ps |
| T1637 |
/workspace/coverage/default/5.lc_ctrl_jtag_state_failure.2310864572 |
|
|
Mar 10 02:23:39 PM PDT 24 |
Mar 10 02:24:31 PM PDT 24 |
5247637138 ps |
| T1638 |
/workspace/coverage/default/2.lc_ctrl_state_failure.3704008606 |
|
|
Mar 10 02:22:42 PM PDT 24 |
Mar 10 02:22:58 PM PDT 24 |
138818760 ps |
| T1639 |
/workspace/coverage/default/17.lc_ctrl_jtag_errors.1001454492 |
|
|
Mar 10 02:25:37 PM PDT 24 |
Mar 10 02:27:10 PM PDT 24 |
25571348021 ps |
| T1640 |
/workspace/coverage/default/26.lc_ctrl_stress_all_with_rand_reset.3128260785 |
|
|
Mar 10 01:54:50 PM PDT 24 |
Mar 10 02:01:49 PM PDT 24 |
8376988017 ps |
| T1641 |
/workspace/coverage/default/24.lc_ctrl_prog_failure.3549295072 |
|
|
Mar 10 02:26:17 PM PDT 24 |
Mar 10 02:26:21 PM PDT 24 |
86429191 ps |
| T1642 |
/workspace/coverage/default/14.lc_ctrl_volatile_unlock_smoke.3036077677 |
|
|
Mar 10 01:54:06 PM PDT 24 |
Mar 10 01:54:07 PM PDT 24 |
37162464 ps |
| T1643 |
/workspace/coverage/default/39.lc_ctrl_volatile_unlock_smoke.2514360176 |
|
|
Mar 10 01:55:27 PM PDT 24 |
Mar 10 01:55:28 PM PDT 24 |
28041855 ps |
| T1644 |
/workspace/coverage/default/8.lc_ctrl_jtag_prog_failure.3800223839 |
|
|
Mar 10 01:53:38 PM PDT 24 |
Mar 10 01:53:47 PM PDT 24 |
498922234 ps |
| T1645 |
/workspace/coverage/default/3.lc_ctrl_jtag_errors.3827452131 |
|
|
Mar 10 01:53:07 PM PDT 24 |
Mar 10 01:54:22 PM PDT 24 |
18741034017 ps |
| T1646 |
/workspace/coverage/default/40.lc_ctrl_errors.1857566472 |
|
|
Mar 10 02:27:35 PM PDT 24 |
Mar 10 02:27:53 PM PDT 24 |
1261352678 ps |
| T1647 |
/workspace/coverage/default/7.lc_ctrl_security_escalation.3499877114 |
|
|
Mar 10 01:53:31 PM PDT 24 |
Mar 10 01:53:43 PM PDT 24 |
258607302 ps |
| T1648 |
/workspace/coverage/default/45.lc_ctrl_sec_token_digest.2515303232 |
|
|
Mar 10 02:28:01 PM PDT 24 |
Mar 10 02:28:10 PM PDT 24 |
163326612 ps |
| T1649 |
/workspace/coverage/default/16.lc_ctrl_sec_token_digest.1417479320 |
|
|
Mar 10 02:25:31 PM PDT 24 |
Mar 10 02:25:44 PM PDT 24 |
601197345 ps |
| T106 |
/workspace/coverage/default/0.lc_ctrl_sec_cm.48249180 |
|
|
Mar 10 01:52:57 PM PDT 24 |
Mar 10 01:53:34 PM PDT 24 |
213142406 ps |
| T1650 |
/workspace/coverage/default/15.lc_ctrl_volatile_unlock_smoke.2026942352 |
|
|
Mar 10 01:54:11 PM PDT 24 |
Mar 10 01:54:12 PM PDT 24 |
13345311 ps |
| T1651 |
/workspace/coverage/default/33.lc_ctrl_sec_token_mux.786101979 |
|
|
Mar 10 02:27:08 PM PDT 24 |
Mar 10 02:27:25 PM PDT 24 |
2470755493 ps |
| T1652 |
/workspace/coverage/default/20.lc_ctrl_stress_all.4089146451 |
|
|
Mar 10 01:54:38 PM PDT 24 |
Mar 10 01:55:53 PM PDT 24 |
4949791773 ps |
| T1653 |
/workspace/coverage/default/2.lc_ctrl_regwen_during_op.3469363735 |
|
|
Mar 10 01:53:02 PM PDT 24 |
Mar 10 01:53:21 PM PDT 24 |
689385497 ps |
| T1654 |
/workspace/coverage/default/15.lc_ctrl_sec_mubi.2417310164 |
|
|
Mar 10 02:25:25 PM PDT 24 |
Mar 10 02:25:39 PM PDT 24 |
804622780 ps |
| T1655 |
/workspace/coverage/default/11.lc_ctrl_stress_all_with_rand_reset.680567445 |
|
|
Mar 10 02:24:45 PM PDT 24 |
Mar 10 02:26:31 PM PDT 24 |
41388359324 ps |
| T1656 |
/workspace/coverage/default/44.lc_ctrl_stress_all.2480153518 |
|
|
Mar 10 01:55:42 PM PDT 24 |
Mar 10 01:56:23 PM PDT 24 |
2688486947 ps |
| T1657 |
/workspace/coverage/default/0.lc_ctrl_jtag_regwen_during_op.709360829 |
|
|
Mar 10 02:22:11 PM PDT 24 |
Mar 10 02:22:42 PM PDT 24 |
1028499224 ps |
| T1658 |
/workspace/coverage/default/40.lc_ctrl_stress_all.922654741 |
|
|
Mar 10 02:27:35 PM PDT 24 |
Mar 10 02:28:59 PM PDT 24 |
8884484888 ps |
| T1659 |
/workspace/coverage/default/16.lc_ctrl_state_post_trans.1388622322 |
|
|
Mar 10 01:54:20 PM PDT 24 |
Mar 10 01:54:29 PM PDT 24 |
60112875 ps |
| T1660 |
/workspace/coverage/default/19.lc_ctrl_volatile_unlock_smoke.4252043981 |
|
|
Mar 10 01:54:24 PM PDT 24 |
Mar 10 01:54:26 PM PDT 24 |
13946761 ps |
| T1661 |
/workspace/coverage/default/15.lc_ctrl_jtag_errors.3997276639 |
|
|
Mar 10 02:25:20 PM PDT 24 |
Mar 10 02:25:44 PM PDT 24 |
1311424852 ps |
| T1662 |
/workspace/coverage/default/7.lc_ctrl_jtag_state_failure.4042708776 |
|
|
Mar 10 02:24:00 PM PDT 24 |
Mar 10 02:24:39 PM PDT 24 |
1633498824 ps |
| T1663 |
/workspace/coverage/default/4.lc_ctrl_jtag_errors.2032023748 |
|
|
Mar 10 02:23:26 PM PDT 24 |
Mar 10 02:23:58 PM PDT 24 |
10707818919 ps |
| T1664 |
/workspace/coverage/default/10.lc_ctrl_jtag_errors.280390121 |
|
|
Mar 10 01:53:51 PM PDT 24 |
Mar 10 01:54:18 PM PDT 24 |
1530576610 ps |
| T1665 |
/workspace/coverage/default/47.lc_ctrl_alert_test.1075640912 |
|
|
Mar 10 01:56:05 PM PDT 24 |
Mar 10 01:56:06 PM PDT 24 |
21904742 ps |
| T1666 |
/workspace/coverage/default/20.lc_ctrl_sec_mubi.2419556734 |
|
|
Mar 10 01:54:33 PM PDT 24 |
Mar 10 01:54:46 PM PDT 24 |
313218777 ps |
| T1667 |
/workspace/coverage/default/10.lc_ctrl_sec_token_mux.294375171 |
|
|
Mar 10 02:24:35 PM PDT 24 |
Mar 10 02:24:41 PM PDT 24 |
380201687 ps |
| T1668 |
/workspace/coverage/default/36.lc_ctrl_security_escalation.2338936065 |
|
|
Mar 10 02:27:17 PM PDT 24 |
Mar 10 02:27:24 PM PDT 24 |
456741397 ps |
| T1669 |
/workspace/coverage/default/2.lc_ctrl_sec_token_mux.3183286116 |
|
|
Mar 10 02:22:53 PM PDT 24 |
Mar 10 02:23:01 PM PDT 24 |
1088486790 ps |
| T1670 |
/workspace/coverage/default/48.lc_ctrl_jtag_access.3173892290 |
|
|
Mar 10 02:28:14 PM PDT 24 |
Mar 10 02:28:16 PM PDT 24 |
34601086 ps |
| T1671 |
/workspace/coverage/default/26.lc_ctrl_sec_token_digest.2405158203 |
|
|
Mar 10 01:54:53 PM PDT 24 |
Mar 10 01:55:11 PM PDT 24 |
704395661 ps |
| T1672 |
/workspace/coverage/default/4.lc_ctrl_sec_token_mux.3449076687 |
|
|
Mar 10 02:23:29 PM PDT 24 |
Mar 10 02:23:44 PM PDT 24 |
721279037 ps |
| T1673 |
/workspace/coverage/default/29.lc_ctrl_security_escalation.2200886032 |
|
|
Mar 10 01:55:00 PM PDT 24 |
Mar 10 01:55:09 PM PDT 24 |
357597976 ps |
| T1674 |
/workspace/coverage/default/36.lc_ctrl_stress_all.101378186 |
|
|
Mar 10 01:55:28 PM PDT 24 |
Mar 10 01:56:14 PM PDT 24 |
1868100182 ps |
| T1675 |
/workspace/coverage/default/47.lc_ctrl_errors.3505697435 |
|
|
Mar 10 01:55:55 PM PDT 24 |
Mar 10 01:56:08 PM PDT 24 |
506912763 ps |
| T1676 |
/workspace/coverage/default/12.lc_ctrl_sec_token_digest.210365463 |
|
|
Mar 10 02:24:56 PM PDT 24 |
Mar 10 02:25:10 PM PDT 24 |
846587881 ps |
| T1677 |
/workspace/coverage/default/28.lc_ctrl_prog_failure.1366778939 |
|
|
Mar 10 01:54:59 PM PDT 24 |
Mar 10 01:55:03 PM PDT 24 |
101681415 ps |
| T1678 |
/workspace/coverage/default/13.lc_ctrl_state_failure.2539760338 |
|
|
Mar 10 01:54:09 PM PDT 24 |
Mar 10 01:54:27 PM PDT 24 |
280991751 ps |
| T1679 |
/workspace/coverage/default/7.lc_ctrl_smoke.2328512606 |
|
|
Mar 10 02:23:57 PM PDT 24 |
Mar 10 02:23:59 PM PDT 24 |
70829891 ps |
| T1680 |
/workspace/coverage/default/0.lc_ctrl_state_failure.635652368 |
|
|
Mar 10 02:21:56 PM PDT 24 |
Mar 10 02:22:27 PM PDT 24 |
1253874114 ps |
| T1681 |
/workspace/coverage/default/8.lc_ctrl_jtag_priority.1486289312 |
|
|
Mar 10 02:24:20 PM PDT 24 |
Mar 10 02:24:24 PM PDT 24 |
1439661323 ps |
| T1682 |
/workspace/coverage/default/6.lc_ctrl_prog_failure.182334874 |
|
|
Mar 10 01:53:24 PM PDT 24 |
Mar 10 01:53:28 PM PDT 24 |
67231020 ps |
| T1683 |
/workspace/coverage/default/13.lc_ctrl_jtag_prog_failure.200752379 |
|
|
Mar 10 01:54:07 PM PDT 24 |
Mar 10 01:54:13 PM PDT 24 |
1806018287 ps |
| T1684 |
/workspace/coverage/default/4.lc_ctrl_jtag_state_failure.842420000 |
|
|
Mar 10 01:53:11 PM PDT 24 |
Mar 10 01:54:12 PM PDT 24 |
1218455854 ps |
| T1685 |
/workspace/coverage/default/15.lc_ctrl_state_failure.1797839039 |
|
|
Mar 10 02:25:19 PM PDT 24 |
Mar 10 02:25:58 PM PDT 24 |
1375155562 ps |
| T1686 |
/workspace/coverage/default/35.lc_ctrl_sec_token_mux.3247679978 |
|
|
Mar 10 02:27:10 PM PDT 24 |
Mar 10 02:27:22 PM PDT 24 |
550453966 ps |
| T1687 |
/workspace/coverage/default/44.lc_ctrl_errors.1985060241 |
|
|
Mar 10 01:55:44 PM PDT 24 |
Mar 10 01:55:53 PM PDT 24 |
1584896768 ps |
| T1688 |
/workspace/coverage/default/13.lc_ctrl_jtag_errors.2018216631 |
|
|
Mar 10 02:25:02 PM PDT 24 |
Mar 10 02:26:30 PM PDT 24 |
6612011433 ps |
| T122 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.4225453106 |
|
|
Mar 10 01:20:19 PM PDT 24 |
Mar 10 01:20:20 PM PDT 24 |
70360819 ps |
| T123 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.3772335372 |
|
|
Mar 10 01:20:21 PM PDT 24 |
Mar 10 01:20:23 PM PDT 24 |
142442114 ps |
| T128 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.895402650 |
|
|
Mar 10 01:20:05 PM PDT 24 |
Mar 10 01:20:07 PM PDT 24 |
86918035 ps |
| T154 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.3940040107 |
|
|
Mar 10 01:20:05 PM PDT 24 |
Mar 10 01:20:06 PM PDT 24 |
447336947 ps |
| T155 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.1695001132 |
|
|
Mar 10 01:19:57 PM PDT 24 |
Mar 10 01:20:26 PM PDT 24 |
2485569996 ps |
| T119 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.2200909490 |
|
|
Mar 10 01:20:06 PM PDT 24 |
Mar 10 01:20:08 PM PDT 24 |
89223412 ps |
| T152 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.1319420828 |
|
|
Mar 10 01:20:03 PM PDT 24 |
Mar 10 01:20:04 PM PDT 24 |
21603345 ps |
| T184 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.3936540423 |
|
|
Mar 10 01:20:12 PM PDT 24 |
Mar 10 01:20:14 PM PDT 24 |
17060810 ps |
| T193 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.3840210737 |
|
|
Mar 10 01:20:17 PM PDT 24 |
Mar 10 01:20:19 PM PDT 24 |
30962435 ps |
| T129 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.612781753 |
|
|
Mar 10 01:20:11 PM PDT 24 |
Mar 10 01:20:15 PM PDT 24 |
114274284 ps |
| T120 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.2543462893 |
|
|
Mar 10 01:20:21 PM PDT 24 |
Mar 10 01:20:24 PM PDT 24 |
55740697 ps |
| T130 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.530339534 |
|
|
Mar 10 01:20:10 PM PDT 24 |
Mar 10 01:20:11 PM PDT 24 |
58529269 ps |
| T151 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.826976497 |
|
|
Mar 10 01:19:59 PM PDT 24 |
Mar 10 01:20:00 PM PDT 24 |
15950599 ps |
| T136 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.3134281812 |
|
|
Mar 10 01:20:11 PM PDT 24 |
Mar 10 01:20:13 PM PDT 24 |
31818899 ps |
| T1689 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.4067381924 |
|
|
Mar 10 01:20:14 PM PDT 24 |
Mar 10 01:20:16 PM PDT 24 |
14436676 ps |
| T153 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.2460773895 |
|
|
Mar 10 01:19:50 PM PDT 24 |
Mar 10 01:19:52 PM PDT 24 |
41111181 ps |
| T1690 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.454500451 |
|
|
Mar 10 01:19:59 PM PDT 24 |
Mar 10 01:20:05 PM PDT 24 |
187333144 ps |
| T194 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.1971751309 |
|
|
Mar 10 01:20:08 PM PDT 24 |
Mar 10 01:20:10 PM PDT 24 |
46012975 ps |
| T1691 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.344709620 |
|
|
Mar 10 01:19:54 PM PDT 24 |
Mar 10 01:19:56 PM PDT 24 |
112621909 ps |
| T121 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.1860567262 |
|
|
Mar 10 01:20:20 PM PDT 24 |
Mar 10 01:20:22 PM PDT 24 |
144797479 ps |
| T195 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.2446658569 |
|
|
Mar 10 01:20:14 PM PDT 24 |
Mar 10 01:20:17 PM PDT 24 |
42977595 ps |
| T1692 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1069773174 |
|
|
Mar 10 01:19:54 PM PDT 24 |
Mar 10 01:19:56 PM PDT 24 |
277512553 ps |
| T185 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.1227542597 |
|
|
Mar 10 01:19:56 PM PDT 24 |
Mar 10 01:19:58 PM PDT 24 |
55130743 ps |
| T124 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.3515812226 |
|
|
Mar 10 01:19:56 PM PDT 24 |
Mar 10 01:20:01 PM PDT 24 |
130112257 ps |
| T1693 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.1854299495 |
|
|
Mar 10 01:20:07 PM PDT 24 |
Mar 10 01:20:09 PM PDT 24 |
237370126 ps |
| T1694 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.4254630304 |
|
|
Mar 10 01:20:17 PM PDT 24 |
Mar 10 01:20:26 PM PDT 24 |
344911944 ps |
| T1695 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.4064390256 |
|
|
Mar 10 01:19:55 PM PDT 24 |
Mar 10 01:20:05 PM PDT 24 |
322650483 ps |
| T196 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.3302866219 |
|
|
Mar 10 01:20:21 PM PDT 24 |
Mar 10 01:20:23 PM PDT 24 |
113817918 ps |
| T1696 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.1000043300 |
|
|
Mar 10 01:20:11 PM PDT 24 |
Mar 10 01:20:19 PM PDT 24 |
919718436 ps |
| T125 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.1717900659 |
|
|
Mar 10 01:20:16 PM PDT 24 |
Mar 10 01:20:19 PM PDT 24 |
136479662 ps |
| T126 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.1604131535 |
|
|
Mar 10 01:20:22 PM PDT 24 |
Mar 10 01:20:24 PM PDT 24 |
322975122 ps |
| T1697 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.3566937334 |
|
|
Mar 10 01:19:51 PM PDT 24 |
Mar 10 01:19:53 PM PDT 24 |
159590146 ps |
| T1698 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.310347380 |
|
|
Mar 10 01:20:22 PM PDT 24 |
Mar 10 01:20:23 PM PDT 24 |
61558796 ps |
| T197 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.3939658316 |
|
|
Mar 10 01:20:11 PM PDT 24 |
Mar 10 01:20:13 PM PDT 24 |
33949976 ps |
| T198 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.631587875 |
|
|
Mar 10 01:20:04 PM PDT 24 |
Mar 10 01:20:06 PM PDT 24 |
76431556 ps |
| T1699 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.3527102282 |
|
|
Mar 10 01:20:01 PM PDT 24 |
Mar 10 01:20:03 PM PDT 24 |
251440660 ps |
| T143 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.4232811147 |
|
|
Mar 10 01:20:10 PM PDT 24 |
Mar 10 01:20:11 PM PDT 24 |
197880473 ps |
| T1700 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.2717343698 |
|
|
Mar 10 01:19:56 PM PDT 24 |
Mar 10 01:19:59 PM PDT 24 |
33910280 ps |
| T131 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.500735100 |
|
|
Mar 10 01:20:14 PM PDT 24 |
Mar 10 01:20:17 PM PDT 24 |
58209918 ps |
| T1701 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.3864865907 |
|
|
Mar 10 01:19:56 PM PDT 24 |
Mar 10 01:19:59 PM PDT 24 |
116067353 ps |
| T1702 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.33148945 |
|
|
Mar 10 01:19:53 PM PDT 24 |
Mar 10 01:19:55 PM PDT 24 |
83601886 ps |
| T1703 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.3472081240 |
|
|
Mar 10 01:19:49 PM PDT 24 |
Mar 10 01:20:10 PM PDT 24 |
5102940274 ps |
| T127 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.966461795 |
|
|
Mar 10 01:19:59 PM PDT 24 |
Mar 10 01:20:02 PM PDT 24 |
106646492 ps |
| T1704 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.355747632 |
|
|
Mar 10 01:19:59 PM PDT 24 |
Mar 10 01:20:00 PM PDT 24 |
16890267 ps |
| T1705 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.402420971 |
|
|
Mar 10 01:20:18 PM PDT 24 |
Mar 10 01:20:23 PM PDT 24 |
755417249 ps |
| T1706 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.3019411864 |
|
|
Mar 10 01:20:14 PM PDT 24 |
Mar 10 01:20:19 PM PDT 24 |
107002418 ps |
| T137 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.1759559965 |
|
|
Mar 10 01:20:09 PM PDT 24 |
Mar 10 01:20:13 PM PDT 24 |
85195364 ps |
| T1707 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.1447118827 |
|
|
Mar 10 01:20:09 PM PDT 24 |
Mar 10 01:20:10 PM PDT 24 |
565813467 ps |
| T138 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.2672612913 |
|
|
Mar 10 01:20:20 PM PDT 24 |
Mar 10 01:20:23 PM PDT 24 |
168811055 ps |
| T132 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.3181896893 |
|
|
Mar 10 01:20:04 PM PDT 24 |
Mar 10 01:20:09 PM PDT 24 |
527001395 ps |
| T1708 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.1627210590 |
|
|
Mar 10 01:20:10 PM PDT 24 |
Mar 10 01:20:12 PM PDT 24 |
65125077 ps |
| T1709 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.857230049 |
|
|
Mar 10 01:19:52 PM PDT 24 |
Mar 10 01:20:01 PM PDT 24 |
814051827 ps |
| T150 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.1277461119 |
|
|
Mar 10 01:20:22 PM PDT 24 |
Mar 10 01:20:24 PM PDT 24 |
46108796 ps |
| T199 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.2123330212 |
|
|
Mar 10 01:20:18 PM PDT 24 |
Mar 10 01:20:20 PM PDT 24 |
16738949 ps |
| T186 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.2770532845 |
|
|
Mar 10 01:20:09 PM PDT 24 |
Mar 10 01:20:10 PM PDT 24 |
15458123 ps |
| T1710 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.3041489365 |
|
|
Mar 10 01:20:06 PM PDT 24 |
Mar 10 01:20:07 PM PDT 24 |
53983285 ps |
| T149 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.3999937339 |
|
|
Mar 10 01:20:22 PM PDT 24 |
Mar 10 01:20:25 PM PDT 24 |
1529673942 ps |
| T1711 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.602521984 |
|
|
Mar 10 01:19:56 PM PDT 24 |
Mar 10 01:20:14 PM PDT 24 |
1614917747 ps |
| T1712 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.4181225727 |
|
|
Mar 10 01:20:14 PM PDT 24 |
Mar 10 01:20:16 PM PDT 24 |
67254441 ps |
| T1713 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.4200354717 |
|
|
Mar 10 01:19:50 PM PDT 24 |
Mar 10 01:19:51 PM PDT 24 |
42637913 ps |
| T146 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.1581611129 |
|
|
Mar 10 01:20:19 PM PDT 24 |
Mar 10 01:20:23 PM PDT 24 |
104853047 ps |
| T1714 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.412267015 |
|
|
Mar 10 01:19:57 PM PDT 24 |
Mar 10 01:20:00 PM PDT 24 |
243883026 ps |
| T1715 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.2746946724 |
|
|
Mar 10 01:20:10 PM PDT 24 |
Mar 10 01:20:11 PM PDT 24 |
108051680 ps |
| T1716 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.3429450546 |
|
|
Mar 10 01:20:13 PM PDT 24 |
Mar 10 01:20:15 PM PDT 24 |
74118694 ps |
| T1717 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.3133151601 |
|
|
Mar 10 01:20:04 PM PDT 24 |
Mar 10 01:20:05 PM PDT 24 |
64888617 ps |
| T1718 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.1296573158 |
|
|
Mar 10 01:20:19 PM PDT 24 |
Mar 10 01:20:20 PM PDT 24 |
18535421 ps |
| T145 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.459314505 |
|
|
Mar 10 01:20:14 PM PDT 24 |
Mar 10 01:20:17 PM PDT 24 |
25521345 ps |
| T148 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.1797775033 |
|
|
Mar 10 01:19:53 PM PDT 24 |
Mar 10 01:19:55 PM PDT 24 |
46090618 ps |
| T1719 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.4258830913 |
|
|
Mar 10 01:20:05 PM PDT 24 |
Mar 10 01:20:10 PM PDT 24 |
1692080779 ps |
| T1720 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.1779718225 |
|
|
Mar 10 01:19:58 PM PDT 24 |
Mar 10 01:20:01 PM PDT 24 |
69857495 ps |
| T1721 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.3759793615 |
|
|
Mar 10 01:20:03 PM PDT 24 |
Mar 10 01:20:21 PM PDT 24 |
784739390 ps |
| T1722 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.3394713599 |
|
|
Mar 10 01:20:12 PM PDT 24 |
Mar 10 01:20:14 PM PDT 24 |
237496441 ps |
| T200 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.312923142 |
|
|
Mar 10 01:20:00 PM PDT 24 |
Mar 10 01:20:02 PM PDT 24 |
20320783 ps |
| T133 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.477436769 |
|
|
Mar 10 01:20:19 PM PDT 24 |
Mar 10 01:20:21 PM PDT 24 |
212366303 ps |
| T1723 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.3818880396 |
|
|
Mar 10 01:20:09 PM PDT 24 |
Mar 10 01:20:14 PM PDT 24 |
2461189840 ps |
| T1724 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.2062590174 |
|
|
Mar 10 01:19:56 PM PDT 24 |
Mar 10 01:19:58 PM PDT 24 |
48054604 ps |
| T1725 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.2450649369 |
|
|
Mar 10 01:19:57 PM PDT 24 |
Mar 10 01:20:00 PM PDT 24 |
123941788 ps |
| T1726 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2834760417 |
|
|
Mar 10 01:20:08 PM PDT 24 |
Mar 10 01:20:12 PM PDT 24 |
208719926 ps |
| T1727 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.1572546952 |
|
|
Mar 10 01:20:08 PM PDT 24 |
Mar 10 01:20:11 PM PDT 24 |
1099863123 ps |
| T201 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.1997291859 |
|
|
Mar 10 01:20:11 PM PDT 24 |
Mar 10 01:20:11 PM PDT 24 |
55393704 ps |
| T1728 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.3927109485 |
|
|
Mar 10 01:19:56 PM PDT 24 |
Mar 10 01:20:00 PM PDT 24 |
294389423 ps |
| T1729 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.1028520765 |
|
|
Mar 10 01:19:47 PM PDT 24 |
Mar 10 01:19:50 PM PDT 24 |
72334482 ps |
| T1730 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.3418792531 |
|
|
Mar 10 01:20:04 PM PDT 24 |
Mar 10 01:20:05 PM PDT 24 |
13350074 ps |
| T1731 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.294288517 |
|
|
Mar 10 01:19:48 PM PDT 24 |
Mar 10 01:19:49 PM PDT 24 |
81092141 ps |
| T1732 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.2638725843 |
|
|
Mar 10 01:20:20 PM PDT 24 |
Mar 10 01:20:22 PM PDT 24 |
51336669 ps |
| T1733 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.2031595687 |
|
|
Mar 10 01:20:03 PM PDT 24 |
Mar 10 01:20:05 PM PDT 24 |
58539935 ps |
| T1734 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.438634322 |
|
|
Mar 10 01:19:59 PM PDT 24 |
Mar 10 01:20:01 PM PDT 24 |
36682576 ps |
| T1735 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2886214295 |
|
|
Mar 10 01:19:57 PM PDT 24 |
Mar 10 01:20:03 PM PDT 24 |
1065479451 ps |
| T1736 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.1334194140 |
|
|
Mar 10 01:19:50 PM PDT 24 |
Mar 10 01:19:52 PM PDT 24 |
206418420 ps |
| T1737 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.2272306256 |
|
|
Mar 10 01:19:51 PM PDT 24 |
Mar 10 01:19:52 PM PDT 24 |
56856111 ps |
| T1738 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.50783556 |
|
|
Mar 10 01:20:04 PM PDT 24 |
Mar 10 01:20:05 PM PDT 24 |
158442280 ps |
| T187 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.2828750478 |
|
|
Mar 10 01:19:53 PM PDT 24 |
Mar 10 01:19:54 PM PDT 24 |
62710629 ps |
| T1739 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.4200397897 |
|
|
Mar 10 01:20:05 PM PDT 24 |
Mar 10 01:20:07 PM PDT 24 |
76688374 ps |
| T1740 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.2976198272 |
|
|
Mar 10 01:20:03 PM PDT 24 |
Mar 10 01:20:39 PM PDT 24 |
3356814281 ps |
| T1741 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.3096876891 |
|
|
Mar 10 01:19:58 PM PDT 24 |
Mar 10 01:20:00 PM PDT 24 |
79163878 ps |
| T188 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.562218924 |
|
|
Mar 10 01:20:04 PM PDT 24 |
Mar 10 01:20:05 PM PDT 24 |
45859533 ps |
| T1742 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.3833938890 |
|
|
Mar 10 01:19:56 PM PDT 24 |
Mar 10 01:19:58 PM PDT 24 |
13518633 ps |
| T134 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.238903615 |
|
|
Mar 10 01:20:25 PM PDT 24 |
Mar 10 01:20:28 PM PDT 24 |
263470173 ps |
| T1743 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.1347814608 |
|
|
Mar 10 01:20:17 PM PDT 24 |
Mar 10 01:20:18 PM PDT 24 |
16486026 ps |
| T1744 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.600482679 |
|
|
Mar 10 01:19:49 PM PDT 24 |
Mar 10 01:19:50 PM PDT 24 |
71348110 ps |
| T1745 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.2623837804 |
|
|
Mar 10 01:20:18 PM PDT 24 |
Mar 10 01:20:20 PM PDT 24 |
30985160 ps |
| T139 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.3450215980 |
|
|
Mar 10 01:20:04 PM PDT 24 |
Mar 10 01:20:08 PM PDT 24 |
111298448 ps |
| T1746 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.1735289035 |
|
|
Mar 10 01:20:17 PM PDT 24 |
Mar 10 01:20:19 PM PDT 24 |
158502500 ps |
| T189 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.3622644744 |
|
|
Mar 10 01:19:47 PM PDT 24 |
Mar 10 01:19:49 PM PDT 24 |
80026801 ps |
| T1747 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.1305041417 |
|
|
Mar 10 01:20:10 PM PDT 24 |
Mar 10 01:20:11 PM PDT 24 |
81792981 ps |
| T1748 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.3439147774 |
|
|
Mar 10 01:20:18 PM PDT 24 |
Mar 10 01:20:20 PM PDT 24 |
36467136 ps |
| T1749 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.862024879 |
|
|
Mar 10 01:20:19 PM PDT 24 |
Mar 10 01:20:20 PM PDT 24 |
33253839 ps |
| T1750 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.767676933 |
|
|
Mar 10 01:20:19 PM PDT 24 |
Mar 10 01:20:21 PM PDT 24 |
143534587 ps |
| T1751 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.3875297610 |
|
|
Mar 10 01:19:56 PM PDT 24 |
Mar 10 01:19:58 PM PDT 24 |
29993804 ps |
| T1752 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.3445379041 |
|
|
Mar 10 01:20:11 PM PDT 24 |
Mar 10 01:20:14 PM PDT 24 |
195440151 ps |
| T1753 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.3084546148 |
|
|
Mar 10 01:20:00 PM PDT 24 |
Mar 10 01:20:02 PM PDT 24 |
32569478 ps |
| T1754 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.2242772491 |
|
|
Mar 10 01:20:08 PM PDT 24 |
Mar 10 01:20:10 PM PDT 24 |
51340373 ps |
| T1755 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.1211450107 |
|
|
Mar 10 01:20:20 PM PDT 24 |
Mar 10 01:20:22 PM PDT 24 |
39449133 ps |
| T190 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.724740424 |
|
|
Mar 10 01:19:51 PM PDT 24 |
Mar 10 01:19:52 PM PDT 24 |
78025278 ps |
| T1756 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.2188884654 |
|
|
Mar 10 01:20:13 PM PDT 24 |
Mar 10 01:20:14 PM PDT 24 |
41668136 ps |
| T1757 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.3340381983 |
|
|
Mar 10 01:20:21 PM PDT 24 |
Mar 10 01:20:22 PM PDT 24 |
26303625 ps |
| T140 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.3832895188 |
|
|
Mar 10 01:19:59 PM PDT 24 |
Mar 10 01:20:04 PM PDT 24 |
1317545515 ps |
| T1758 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.3837352253 |
|
|
Mar 10 01:20:09 PM PDT 24 |
Mar 10 01:20:10 PM PDT 24 |
102887434 ps |