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LINE 1289
EXPRESSION (addr_hit[32] & reg_re & ((!reg_error)))
------1----- ---2-- -------3------
| -1- | -2- | -3- | Status | Tests |
|---|
| 0 | 1 | 1 | Covered | T1,T2,T5 |
| 1 | 0 | 1 | Covered | T2,T4,T10 |
| 1 | 1 | 0 | Covered | T139,T156,T138 |
| 1 | 1 | 1 | Covered | T2,T4,T10 |
LINE 1290
EXPRESSION (addr_hit[33] & reg_re & ((!reg_error)))
------1----- ---2-- -------3------
| -1- | -2- | -3- | Status | Tests |
|---|
| 0 | 1 | 1 | Covered | T1,T2,T5 |
| 1 | 0 | 1 | Covered | T2,T3,T4 |
| 1 | 1 | 0 | Covered | T121,T133 |
| 1 | 1 | 1 | Covered | T2,T4,T10 |
LINE 1291
EXPRESSION (addr_hit[34] & reg_re & ((!reg_error)))
------1----- ---2-- -------3------
| -1- | -2- | -3- | Status | Tests |
|---|
| 0 | 1 | 1 | Covered | T1,T2,T5 |
| 1 | 0 | 1 | Covered | T2,T3,T4 |
| 1 | 1 | 0 | Covered | T121,T122 |
| 1 | 1 | 1 | Covered | T2,T4,T10 |