| T849 |
/workspace/coverage/default/42.lc_ctrl_prog_failure.2598165147 |
|
|
Mar 17 02:51:00 PM PDT 24 |
Mar 17 02:51:06 PM PDT 24 |
112497154 ps |
| T850 |
/workspace/coverage/default/11.lc_ctrl_jtag_state_post_trans.2158887296 |
|
|
Mar 17 02:50:06 PM PDT 24 |
Mar 17 02:50:16 PM PDT 24 |
4162054146 ps |
| T851 |
/workspace/coverage/default/35.lc_ctrl_smoke.3331614474 |
|
|
Mar 17 02:50:43 PM PDT 24 |
Mar 17 02:50:47 PM PDT 24 |
93872112 ps |
| T852 |
/workspace/coverage/default/30.lc_ctrl_sec_mubi.1753553692 |
|
|
Mar 17 02:50:31 PM PDT 24 |
Mar 17 02:50:45 PM PDT 24 |
2717046951 ps |
| T853 |
/workspace/coverage/default/13.lc_ctrl_errors.2129591641 |
|
|
Mar 17 02:50:01 PM PDT 24 |
Mar 17 02:50:17 PM PDT 24 |
372096959 ps |
| T854 |
/workspace/coverage/default/0.lc_ctrl_jtag_state_failure.3961962186 |
|
|
Mar 17 02:49:17 PM PDT 24 |
Mar 17 02:49:55 PM PDT 24 |
1214314191 ps |
| T855 |
/workspace/coverage/default/29.lc_ctrl_sec_token_digest.3033127265 |
|
|
Mar 17 02:50:33 PM PDT 24 |
Mar 17 02:50:51 PM PDT 24 |
590128239 ps |
| T856 |
/workspace/coverage/default/13.lc_ctrl_jtag_state_failure.1714012653 |
|
|
Mar 17 02:50:02 PM PDT 24 |
Mar 17 02:50:32 PM PDT 24 |
18390402680 ps |
| T857 |
/workspace/coverage/default/5.lc_ctrl_security_escalation.1167765221 |
|
|
Mar 17 02:49:20 PM PDT 24 |
Mar 17 02:49:33 PM PDT 24 |
1596096782 ps |
| T858 |
/workspace/coverage/default/45.lc_ctrl_sec_token_digest.1373087081 |
|
|
Mar 17 02:51:05 PM PDT 24 |
Mar 17 02:51:14 PM PDT 24 |
1162463885 ps |
| T859 |
/workspace/coverage/default/6.lc_ctrl_claim_transition_if.1346557802 |
|
|
Mar 17 02:49:26 PM PDT 24 |
Mar 17 02:49:27 PM PDT 24 |
13923934 ps |
| T860 |
/workspace/coverage/default/12.lc_ctrl_prog_failure.3644648173 |
|
|
Mar 17 02:49:52 PM PDT 24 |
Mar 17 02:49:54 PM PDT 24 |
300240965 ps |
| T861 |
/workspace/coverage/default/10.lc_ctrl_jtag_prog_failure.434261130 |
|
|
Mar 17 02:49:53 PM PDT 24 |
Mar 17 02:50:07 PM PDT 24 |
3654368579 ps |
| T862 |
/workspace/coverage/default/29.lc_ctrl_volatile_unlock_smoke.1423733097 |
|
|
Mar 17 02:50:26 PM PDT 24 |
Mar 17 02:50:27 PM PDT 24 |
11440491 ps |
| T863 |
/workspace/coverage/default/30.lc_ctrl_smoke.4014245906 |
|
|
Mar 17 02:50:35 PM PDT 24 |
Mar 17 02:50:38 PM PDT 24 |
56556043 ps |
| T864 |
/workspace/coverage/default/14.lc_ctrl_stress_all.247043981 |
|
|
Mar 17 02:49:54 PM PDT 24 |
Mar 17 02:53:08 PM PDT 24 |
10145820919 ps |
| T865 |
/workspace/coverage/default/18.lc_ctrl_jtag_smoke.659098370 |
|
|
Mar 17 02:49:59 PM PDT 24 |
Mar 17 02:50:16 PM PDT 24 |
2825806011 ps |
| T866 |
/workspace/coverage/default/43.lc_ctrl_sec_token_digest.3245546844 |
|
|
Mar 17 02:51:04 PM PDT 24 |
Mar 17 02:51:20 PM PDT 24 |
1684019208 ps |
| T867 |
/workspace/coverage/default/0.lc_ctrl_claim_transition_if.856874040 |
|
|
Mar 17 02:49:12 PM PDT 24 |
Mar 17 02:49:13 PM PDT 24 |
26564995 ps |
| T868 |
/workspace/coverage/default/6.lc_ctrl_sec_token_digest.4072717500 |
|
|
Mar 17 02:49:12 PM PDT 24 |
Mar 17 02:49:24 PM PDT 24 |
1478840750 ps |
| T869 |
/workspace/coverage/default/1.lc_ctrl_jtag_state_failure.3561616857 |
|
|
Mar 17 02:49:13 PM PDT 24 |
Mar 17 02:50:40 PM PDT 24 |
9871956579 ps |
| T870 |
/workspace/coverage/default/33.lc_ctrl_jtag_access.705085552 |
|
|
Mar 17 02:50:35 PM PDT 24 |
Mar 17 02:50:47 PM PDT 24 |
2485547911 ps |
| T871 |
/workspace/coverage/default/32.lc_ctrl_state_failure.1196084720 |
|
|
Mar 17 02:50:33 PM PDT 24 |
Mar 17 02:50:52 PM PDT 24 |
557895292 ps |
| T872 |
/workspace/coverage/default/27.lc_ctrl_state_post_trans.107023430 |
|
|
Mar 17 02:50:15 PM PDT 24 |
Mar 17 02:50:24 PM PDT 24 |
154068036 ps |
| T873 |
/workspace/coverage/default/19.lc_ctrl_state_post_trans.1801149679 |
|
|
Mar 17 02:50:09 PM PDT 24 |
Mar 17 02:50:16 PM PDT 24 |
882297883 ps |
| T874 |
/workspace/coverage/default/28.lc_ctrl_stress_all_with_rand_reset.3982729088 |
|
|
Mar 17 02:50:25 PM PDT 24 |
Mar 17 02:53:06 PM PDT 24 |
15742365175 ps |
| T875 |
/workspace/coverage/default/12.lc_ctrl_jtag_errors.2854158267 |
|
|
Mar 17 02:49:47 PM PDT 24 |
Mar 17 02:50:34 PM PDT 24 |
14804481012 ps |
| T200 |
/workspace/coverage/default/43.lc_ctrl_stress_all_with_rand_reset.650218348 |
|
|
Mar 17 02:51:03 PM PDT 24 |
Mar 17 02:59:06 PM PDT 24 |
44452855113 ps |
| T98 |
/workspace/coverage/default/36.lc_ctrl_stress_all_with_rand_reset.3400028244 |
|
|
Mar 17 02:50:52 PM PDT 24 |
Mar 17 02:58:16 PM PDT 24 |
13004763685 ps |
| T99 |
/workspace/coverage/default/48.lc_ctrl_alert_test.1638232160 |
|
|
Mar 17 02:51:16 PM PDT 24 |
Mar 17 02:51:17 PM PDT 24 |
15844127 ps |
| T100 |
/workspace/coverage/default/43.lc_ctrl_state_failure.897821275 |
|
|
Mar 17 02:51:03 PM PDT 24 |
Mar 17 02:51:35 PM PDT 24 |
364561210 ps |
| T101 |
/workspace/coverage/default/14.lc_ctrl_sec_token_mux.4208905674 |
|
|
Mar 17 02:49:56 PM PDT 24 |
Mar 17 02:50:08 PM PDT 24 |
293996924 ps |
| T102 |
/workspace/coverage/default/16.lc_ctrl_state_post_trans.447475009 |
|
|
Mar 17 02:49:56 PM PDT 24 |
Mar 17 02:49:59 PM PDT 24 |
299658837 ps |
| T103 |
/workspace/coverage/default/41.lc_ctrl_security_escalation.1415363674 |
|
|
Mar 17 02:51:04 PM PDT 24 |
Mar 17 02:51:18 PM PDT 24 |
717889817 ps |
| T104 |
/workspace/coverage/default/7.lc_ctrl_jtag_state_post_trans.3304629114 |
|
|
Mar 17 02:49:18 PM PDT 24 |
Mar 17 02:49:29 PM PDT 24 |
351017137 ps |
| T105 |
/workspace/coverage/default/5.lc_ctrl_state_failure.2197294784 |
|
|
Mar 17 02:49:16 PM PDT 24 |
Mar 17 02:49:44 PM PDT 24 |
960170282 ps |
| T106 |
/workspace/coverage/default/9.lc_ctrl_alert_test.844294927 |
|
|
Mar 17 02:49:48 PM PDT 24 |
Mar 17 02:49:49 PM PDT 24 |
34954845 ps |
| T107 |
/workspace/coverage/default/44.lc_ctrl_security_escalation.1858371657 |
|
|
Mar 17 02:51:03 PM PDT 24 |
Mar 17 02:51:16 PM PDT 24 |
1482280306 ps |
| T876 |
/workspace/coverage/default/43.lc_ctrl_alert_test.3954789486 |
|
|
Mar 17 02:51:00 PM PDT 24 |
Mar 17 02:51:01 PM PDT 24 |
13640530 ps |
| T877 |
/workspace/coverage/default/39.lc_ctrl_alert_test.2439677731 |
|
|
Mar 17 02:50:50 PM PDT 24 |
Mar 17 02:50:51 PM PDT 24 |
55640295 ps |
| T878 |
/workspace/coverage/default/18.lc_ctrl_jtag_state_failure.3432866796 |
|
|
Mar 17 02:50:11 PM PDT 24 |
Mar 17 02:50:58 PM PDT 24 |
3066933885 ps |
| T879 |
/workspace/coverage/default/8.lc_ctrl_jtag_access.3200234217 |
|
|
Mar 17 02:49:26 PM PDT 24 |
Mar 17 02:49:29 PM PDT 24 |
758916460 ps |
| T880 |
/workspace/coverage/default/7.lc_ctrl_jtag_smoke.3975969339 |
|
|
Mar 17 02:49:25 PM PDT 24 |
Mar 17 02:49:33 PM PDT 24 |
1172676039 ps |
| T881 |
/workspace/coverage/default/35.lc_ctrl_sec_token_mux.3597231558 |
|
|
Mar 17 02:50:44 PM PDT 24 |
Mar 17 02:50:58 PM PDT 24 |
706245733 ps |
| T882 |
/workspace/coverage/default/2.lc_ctrl_state_failure.921678448 |
|
|
Mar 17 02:49:13 PM PDT 24 |
Mar 17 02:49:47 PM PDT 24 |
333177354 ps |
| T883 |
/workspace/coverage/default/0.lc_ctrl_jtag_access.2682158432 |
|
|
Mar 17 02:49:20 PM PDT 24 |
Mar 17 02:49:27 PM PDT 24 |
397153682 ps |
| T884 |
/workspace/coverage/default/33.lc_ctrl_sec_token_digest.3153847795 |
|
|
Mar 17 02:50:40 PM PDT 24 |
Mar 17 02:50:48 PM PDT 24 |
970620765 ps |
| T885 |
/workspace/coverage/default/5.lc_ctrl_jtag_regwen_during_op.420877595 |
|
|
Mar 17 02:49:14 PM PDT 24 |
Mar 17 02:49:35 PM PDT 24 |
846479946 ps |
| T886 |
/workspace/coverage/default/29.lc_ctrl_sec_mubi.2530315892 |
|
|
Mar 17 02:50:35 PM PDT 24 |
Mar 17 02:50:45 PM PDT 24 |
400191900 ps |
| T887 |
/workspace/coverage/default/32.lc_ctrl_stress_all.1368087261 |
|
|
Mar 17 02:50:32 PM PDT 24 |
Mar 17 02:52:40 PM PDT 24 |
19301578959 ps |
| T888 |
/workspace/coverage/default/15.lc_ctrl_jtag_state_failure.3363587282 |
|
|
Mar 17 02:49:57 PM PDT 24 |
Mar 17 02:50:37 PM PDT 24 |
879404323 ps |
| T889 |
/workspace/coverage/default/49.lc_ctrl_errors.4291733039 |
|
|
Mar 17 02:51:11 PM PDT 24 |
Mar 17 02:51:23 PM PDT 24 |
421450276 ps |
| T890 |
/workspace/coverage/default/43.lc_ctrl_stress_all.787214784 |
|
|
Mar 17 02:51:02 PM PDT 24 |
Mar 17 02:52:34 PM PDT 24 |
12447345555 ps |
| T891 |
/workspace/coverage/default/45.lc_ctrl_jtag_access.3768046911 |
|
|
Mar 17 02:51:03 PM PDT 24 |
Mar 17 02:51:05 PM PDT 24 |
48817963 ps |
| T892 |
/workspace/coverage/default/42.lc_ctrl_errors.1463619561 |
|
|
Mar 17 02:51:02 PM PDT 24 |
Mar 17 02:51:14 PM PDT 24 |
365866242 ps |
| T893 |
/workspace/coverage/default/2.lc_ctrl_claim_transition_if.1338823042 |
|
|
Mar 17 02:49:17 PM PDT 24 |
Mar 17 02:49:19 PM PDT 24 |
13374965 ps |
| T894 |
/workspace/coverage/default/24.lc_ctrl_alert_test.1329582684 |
|
|
Mar 17 02:50:07 PM PDT 24 |
Mar 17 02:50:08 PM PDT 24 |
17832483 ps |
| T895 |
/workspace/coverage/default/0.lc_ctrl_stress_all_with_rand_reset.1311494154 |
|
|
Mar 17 02:49:19 PM PDT 24 |
Mar 17 02:53:29 PM PDT 24 |
10580368974 ps |
| T896 |
/workspace/coverage/default/47.lc_ctrl_volatile_unlock_smoke.3664099753 |
|
|
Mar 17 02:51:07 PM PDT 24 |
Mar 17 02:51:08 PM PDT 24 |
15113860 ps |
| T897 |
/workspace/coverage/default/0.lc_ctrl_jtag_priority.11955959 |
|
|
Mar 17 02:49:15 PM PDT 24 |
Mar 17 02:49:20 PM PDT 24 |
619577135 ps |
| T898 |
/workspace/coverage/default/16.lc_ctrl_jtag_access.1034365072 |
|
|
Mar 17 02:50:08 PM PDT 24 |
Mar 17 02:50:10 PM PDT 24 |
111170445 ps |
| T108 |
/workspace/coverage/default/2.lc_ctrl_sec_cm.2657256629 |
|
|
Mar 17 02:49:18 PM PDT 24 |
Mar 17 02:49:45 PM PDT 24 |
1708557590 ps |
| T899 |
/workspace/coverage/default/0.lc_ctrl_smoke.1122707081 |
|
|
Mar 17 02:49:15 PM PDT 24 |
Mar 17 02:49:18 PM PDT 24 |
225121760 ps |
| T900 |
/workspace/coverage/default/31.lc_ctrl_jtag_access.2173387084 |
|
|
Mar 17 02:50:34 PM PDT 24 |
Mar 17 02:50:43 PM PDT 24 |
1659631127 ps |
| T901 |
/workspace/coverage/default/19.lc_ctrl_volatile_unlock_smoke.3662442028 |
|
|
Mar 17 02:50:06 PM PDT 24 |
Mar 17 02:50:07 PM PDT 24 |
21874280 ps |
| T116 |
/workspace/coverage/default/11.lc_ctrl_stress_all.2338348363 |
|
|
Mar 17 02:49:53 PM PDT 24 |
Mar 17 02:54:22 PM PDT 24 |
7174045240 ps |
| T902 |
/workspace/coverage/default/21.lc_ctrl_jtag_access.1846816348 |
|
|
Mar 17 02:50:09 PM PDT 24 |
Mar 17 02:50:10 PM PDT 24 |
37680412 ps |
| T903 |
/workspace/coverage/default/0.lc_ctrl_jtag_prog_failure.3531143131 |
|
|
Mar 17 02:49:14 PM PDT 24 |
Mar 17 02:49:24 PM PDT 24 |
1109774811 ps |
| T904 |
/workspace/coverage/default/28.lc_ctrl_security_escalation.340156791 |
|
|
Mar 17 02:50:22 PM PDT 24 |
Mar 17 02:50:33 PM PDT 24 |
474217936 ps |
| T120 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.2080211650 |
|
|
Mar 17 02:37:55 PM PDT 24 |
Mar 17 02:37:57 PM PDT 24 |
27969119 ps |
| T117 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.3737926901 |
|
|
Mar 17 02:38:10 PM PDT 24 |
Mar 17 02:38:14 PM PDT 24 |
597617253 ps |
| T128 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.2303524082 |
|
|
Mar 17 03:02:40 PM PDT 24 |
Mar 17 03:02:41 PM PDT 24 |
78194745 ps |
| T124 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.4278582817 |
|
|
Mar 17 02:37:50 PM PDT 24 |
Mar 17 02:37:51 PM PDT 24 |
141672669 ps |
| T118 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.2596644297 |
|
|
Mar 17 02:37:30 PM PDT 24 |
Mar 17 02:37:33 PM PDT 24 |
82324898 ps |
| T905 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.2000580269 |
|
|
Mar 17 02:37:24 PM PDT 24 |
Mar 17 02:37:27 PM PDT 24 |
237133260 ps |
| T163 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.4003205079 |
|
|
Mar 17 02:37:57 PM PDT 24 |
Mar 17 02:37:59 PM PDT 24 |
168047818 ps |
| T125 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.1965195738 |
|
|
Mar 17 03:02:52 PM PDT 24 |
Mar 17 03:02:53 PM PDT 24 |
24293481 ps |
| T187 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.413873990 |
|
|
Mar 17 03:03:07 PM PDT 24 |
Mar 17 03:03:09 PM PDT 24 |
23217187 ps |
| T119 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.2647572345 |
|
|
Mar 17 03:02:51 PM PDT 24 |
Mar 17 03:02:55 PM PDT 24 |
436674089 ps |
| T236 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.2473492305 |
|
|
Mar 17 02:38:10 PM PDT 24 |
Mar 17 02:38:11 PM PDT 24 |
21308207 ps |
| T188 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.3168104137 |
|
|
Mar 17 03:03:06 PM PDT 24 |
Mar 17 03:03:07 PM PDT 24 |
17357190 ps |
| T121 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.4069221666 |
|
|
Mar 17 02:37:50 PM PDT 24 |
Mar 17 02:37:52 PM PDT 24 |
110324516 ps |
| T123 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.611015057 |
|
|
Mar 17 02:38:02 PM PDT 24 |
Mar 17 02:38:05 PM PDT 24 |
230994504 ps |
| T237 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.717865289 |
|
|
Mar 17 02:38:04 PM PDT 24 |
Mar 17 02:38:06 PM PDT 24 |
37718764 ps |
| T238 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.509052368 |
|
|
Mar 17 03:02:49 PM PDT 24 |
Mar 17 03:02:50 PM PDT 24 |
37621294 ps |
| T239 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.3768179385 |
|
|
Mar 17 02:37:43 PM PDT 24 |
Mar 17 02:37:44 PM PDT 24 |
17514760 ps |
| T127 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.1904316883 |
|
|
Mar 17 02:36:58 PM PDT 24 |
Mar 17 02:37:01 PM PDT 24 |
147258001 ps |
| T175 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.377910619 |
|
|
Mar 17 02:38:26 PM PDT 24 |
Mar 17 02:38:27 PM PDT 24 |
222464730 ps |
| T122 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.3333808471 |
|
|
Mar 17 03:02:56 PM PDT 24 |
Mar 17 03:03:00 PM PDT 24 |
2013756183 ps |
| T176 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.2402610403 |
|
|
Mar 17 02:38:16 PM PDT 24 |
Mar 17 02:38:18 PM PDT 24 |
65063395 ps |
| T164 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.2576023334 |
|
|
Mar 17 02:37:09 PM PDT 24 |
Mar 17 02:37:19 PM PDT 24 |
746803563 ps |
| T240 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.661348477 |
|
|
Mar 17 02:37:25 PM PDT 24 |
Mar 17 02:37:26 PM PDT 24 |
154499771 ps |
| T906 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.3199965840 |
|
|
Mar 17 02:38:05 PM PDT 24 |
Mar 17 02:38:06 PM PDT 24 |
75292373 ps |
| T141 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.111437033 |
|
|
Mar 17 03:03:07 PM PDT 24 |
Mar 17 03:03:11 PM PDT 24 |
379465144 ps |
| T177 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.3070281893 |
|
|
Mar 17 03:02:40 PM PDT 24 |
Mar 17 03:02:41 PM PDT 24 |
70909267 ps |
| T178 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.748150316 |
|
|
Mar 17 02:38:06 PM PDT 24 |
Mar 17 02:38:07 PM PDT 24 |
15570523 ps |
| T241 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.502052250 |
|
|
Mar 17 02:37:57 PM PDT 24 |
Mar 17 02:37:58 PM PDT 24 |
14302850 ps |
| T907 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.4263690629 |
|
|
Mar 17 02:37:18 PM PDT 24 |
Mar 17 02:37:20 PM PDT 24 |
76488249 ps |
| T160 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.1914004830 |
|
|
Mar 17 03:02:52 PM PDT 24 |
Mar 17 03:02:55 PM PDT 24 |
1329937666 ps |
| T242 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.65663016 |
|
|
Mar 17 03:03:01 PM PDT 24 |
Mar 17 03:03:02 PM PDT 24 |
113765011 ps |
| T243 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.3266864452 |
|
|
Mar 17 02:38:17 PM PDT 24 |
Mar 17 02:38:19 PM PDT 24 |
183508516 ps |
| T908 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.4236327761 |
|
|
Mar 17 02:38:16 PM PDT 24 |
Mar 17 02:38:18 PM PDT 24 |
124912343 ps |
| T132 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.1628444055 |
|
|
Mar 17 03:02:39 PM PDT 24 |
Mar 17 03:02:42 PM PDT 24 |
109175032 ps |
| T161 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.2756205213 |
|
|
Mar 17 03:02:44 PM PDT 24 |
Mar 17 03:02:46 PM PDT 24 |
97271655 ps |
| T135 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.753614018 |
|
|
Mar 17 03:03:12 PM PDT 24 |
Mar 17 03:03:13 PM PDT 24 |
87592221 ps |
| T217 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.614608571 |
|
|
Mar 17 02:38:05 PM PDT 24 |
Mar 17 02:38:06 PM PDT 24 |
23528735 ps |
| T244 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.3042353251 |
|
|
Mar 17 02:37:18 PM PDT 24 |
Mar 17 02:37:19 PM PDT 24 |
15902851 ps |
| T245 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.574826548 |
|
|
Mar 17 03:02:54 PM PDT 24 |
Mar 17 03:02:56 PM PDT 24 |
19443979 ps |
| T909 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.3065422855 |
|
|
Mar 17 03:02:42 PM PDT 24 |
Mar 17 03:02:43 PM PDT 24 |
27497869 ps |
| T910 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.191984739 |
|
|
Mar 17 03:02:48 PM PDT 24 |
Mar 17 03:02:49 PM PDT 24 |
88515400 ps |
| T911 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.151584281 |
|
|
Mar 17 02:38:18 PM PDT 24 |
Mar 17 02:38:19 PM PDT 24 |
45575706 ps |
| T912 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.1576192339 |
|
|
Mar 17 03:02:32 PM PDT 24 |
Mar 17 03:02:33 PM PDT 24 |
104098458 ps |
| T913 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.2837712022 |
|
|
Mar 17 02:38:06 PM PDT 24 |
Mar 17 02:38:09 PM PDT 24 |
827519424 ps |
| T914 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.3883847454 |
|
|
Mar 17 02:38:29 PM PDT 24 |
Mar 17 02:38:31 PM PDT 24 |
30245601 ps |
| T915 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.1471201739 |
|
|
Mar 17 03:02:33 PM PDT 24 |
Mar 17 03:02:34 PM PDT 24 |
90764225 ps |
| T916 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.752288277 |
|
|
Mar 17 02:37:17 PM PDT 24 |
Mar 17 02:37:22 PM PDT 24 |
126715406 ps |
| T917 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.3514967821 |
|
|
Mar 17 02:38:15 PM PDT 24 |
Mar 17 02:38:16 PM PDT 24 |
127838384 ps |
| T918 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.2430363695 |
|
|
Mar 17 02:36:59 PM PDT 24 |
Mar 17 02:37:24 PM PDT 24 |
1072226869 ps |
| T162 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.1052753692 |
|
|
Mar 17 03:02:44 PM PDT 24 |
Mar 17 03:02:46 PM PDT 24 |
195127423 ps |
| T919 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.2067105457 |
|
|
Mar 17 02:38:09 PM PDT 24 |
Mar 17 02:38:11 PM PDT 24 |
152579828 ps |
| T920 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.920318365 |
|
|
Mar 17 03:02:42 PM PDT 24 |
Mar 17 03:02:47 PM PDT 24 |
1130825179 ps |
| T151 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.3202715970 |
|
|
Mar 17 02:38:03 PM PDT 24 |
Mar 17 02:38:05 PM PDT 24 |
424847213 ps |
| T921 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.485404894 |
|
|
Mar 17 02:37:25 PM PDT 24 |
Mar 17 02:37:31 PM PDT 24 |
675342980 ps |
| T922 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.502765160 |
|
|
Mar 17 02:37:33 PM PDT 24 |
Mar 17 02:37:36 PM PDT 24 |
352716414 ps |
| T923 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.1762897581 |
|
|
Mar 17 02:37:36 PM PDT 24 |
Mar 17 02:37:41 PM PDT 24 |
251251987 ps |
| T924 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.1201625597 |
|
|
Mar 17 02:36:54 PM PDT 24 |
Mar 17 02:36:56 PM PDT 24 |
144027045 ps |
| T144 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.2780017086 |
|
|
Mar 17 02:38:04 PM PDT 24 |
Mar 17 02:38:06 PM PDT 24 |
214743987 ps |
| T218 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.2229573134 |
|
|
Mar 17 03:02:44 PM PDT 24 |
Mar 17 03:02:46 PM PDT 24 |
155924760 ps |
| T925 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.1344790244 |
|
|
Mar 17 02:37:24 PM PDT 24 |
Mar 17 02:37:28 PM PDT 24 |
466729023 ps |
| T926 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.2819531892 |
|
|
Mar 17 03:02:33 PM PDT 24 |
Mar 17 03:02:56 PM PDT 24 |
13956437944 ps |
| T927 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.4061774138 |
|
|
Mar 17 03:02:34 PM PDT 24 |
Mar 17 03:02:44 PM PDT 24 |
2231422195 ps |
| T928 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.3406187968 |
|
|
Mar 17 03:02:38 PM PDT 24 |
Mar 17 03:02:39 PM PDT 24 |
102245735 ps |
| T929 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.1261841104 |
|
|
Mar 17 02:37:40 PM PDT 24 |
Mar 17 02:37:41 PM PDT 24 |
515771744 ps |
| T930 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.602000737 |
|
|
Mar 17 02:37:55 PM PDT 24 |
Mar 17 02:37:58 PM PDT 24 |
419619075 ps |
| T219 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.2646133574 |
|
|
Mar 17 03:02:37 PM PDT 24 |
Mar 17 03:02:38 PM PDT 24 |
32967393 ps |
| T931 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.3812242238 |
|
|
Mar 17 02:37:10 PM PDT 24 |
Mar 17 02:37:11 PM PDT 24 |
577469430 ps |
| T932 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.2393477966 |
|
|
Mar 17 03:02:58 PM PDT 24 |
Mar 17 03:03:01 PM PDT 24 |
54543274 ps |
| T933 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.3470889950 |
|
|
Mar 17 02:37:48 PM PDT 24 |
Mar 17 02:37:49 PM PDT 24 |
12239098 ps |
| T934 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.994068764 |
|
|
Mar 17 03:03:02 PM PDT 24 |
Mar 17 03:03:05 PM PDT 24 |
287989814 ps |
| T935 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.282671029 |
|
|
Mar 17 03:02:35 PM PDT 24 |
Mar 17 03:02:36 PM PDT 24 |
237037320 ps |
| T936 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.3348537339 |
|
|
Mar 17 02:37:17 PM PDT 24 |
Mar 17 02:37:18 PM PDT 24 |
48045414 ps |
| T937 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.1851261034 |
|
|
Mar 17 03:02:52 PM PDT 24 |
Mar 17 03:02:57 PM PDT 24 |
1486820116 ps |
| T159 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.2895477923 |
|
|
Mar 17 03:03:00 PM PDT 24 |
Mar 17 03:03:02 PM PDT 24 |
380445438 ps |
| T938 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.3076079412 |
|
|
Mar 17 02:37:03 PM PDT 24 |
Mar 17 02:37:04 PM PDT 24 |
30338562 ps |
| T939 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.966466362 |
|
|
Mar 17 03:02:42 PM PDT 24 |
Mar 17 03:02:48 PM PDT 24 |
606532737 ps |
| T940 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.3716049624 |
|
|
Mar 17 02:37:16 PM PDT 24 |
Mar 17 02:37:37 PM PDT 24 |
1955649479 ps |
| T220 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.1570210882 |
|
|
Mar 17 03:02:36 PM PDT 24 |
Mar 17 03:02:37 PM PDT 24 |
54860025 ps |
| T941 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.2288242768 |
|
|
Mar 17 03:02:48 PM PDT 24 |
Mar 17 03:02:49 PM PDT 24 |
68507934 ps |
| T942 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.2810508700 |
|
|
Mar 17 02:38:26 PM PDT 24 |
Mar 17 02:38:27 PM PDT 24 |
45738676 ps |
| T943 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.338672777 |
|
|
Mar 17 03:02:29 PM PDT 24 |
Mar 17 03:02:32 PM PDT 24 |
436485571 ps |
| T944 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.4221795875 |
|
|
Mar 17 02:38:08 PM PDT 24 |
Mar 17 02:38:09 PM PDT 24 |
83812078 ps |
| T221 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.3802108345 |
|
|
Mar 17 03:03:07 PM PDT 24 |
Mar 17 03:03:09 PM PDT 24 |
17474158 ps |
| T945 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.3200194075 |
|
|
Mar 17 03:02:43 PM PDT 24 |
Mar 17 03:02:45 PM PDT 24 |
211285481 ps |
| T140 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.224876856 |
|
|
Mar 17 02:38:07 PM PDT 24 |
Mar 17 02:38:10 PM PDT 24 |
67708913 ps |
| T946 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.2512082608 |
|
|
Mar 17 03:02:49 PM PDT 24 |
Mar 17 03:02:50 PM PDT 24 |
87201845 ps |
| T222 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.3724342225 |
|
|
Mar 17 02:37:31 PM PDT 24 |
Mar 17 02:37:32 PM PDT 24 |
47053539 ps |
| T947 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.2517531321 |
|
|
Mar 17 03:02:32 PM PDT 24 |
Mar 17 03:02:33 PM PDT 24 |
30673068 ps |
| T948 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.1931013400 |
|
|
Mar 17 03:02:48 PM PDT 24 |
Mar 17 03:02:50 PM PDT 24 |
53851507 ps |
| T949 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.3371902201 |
|
|
Mar 17 03:02:56 PM PDT 24 |
Mar 17 03:02:58 PM PDT 24 |
21497519 ps |
| T223 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.3192761619 |
|
|
Mar 17 02:37:04 PM PDT 24 |
Mar 17 02:37:05 PM PDT 24 |
16944970 ps |
| T950 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.973060782 |
|
|
Mar 17 03:03:00 PM PDT 24 |
Mar 17 03:03:02 PM PDT 24 |
36612804 ps |
| T126 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.3703935205 |
|
|
Mar 17 02:37:42 PM PDT 24 |
Mar 17 02:37:45 PM PDT 24 |
729996670 ps |
| T951 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3463025971 |
|
|
Mar 17 03:02:56 PM PDT 24 |
Mar 17 03:03:01 PM PDT 24 |
2245865541 ps |
| T952 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1658763097 |
|
|
Mar 17 03:02:35 PM PDT 24 |
Mar 17 03:02:37 PM PDT 24 |
126726474 ps |
| T953 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.4053218878 |
|
|
Mar 17 03:02:51 PM PDT 24 |
Mar 17 03:02:53 PM PDT 24 |
26417954 ps |
| T954 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.1337664086 |
|
|
Mar 17 02:37:03 PM PDT 24 |
Mar 17 02:37:05 PM PDT 24 |
58019594 ps |
| T955 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.1958762268 |
|
|
Mar 17 02:38:17 PM PDT 24 |
Mar 17 02:38:18 PM PDT 24 |
46476494 ps |
| T956 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.3424509163 |
|
|
Mar 17 02:37:31 PM PDT 24 |
Mar 17 02:37:32 PM PDT 24 |
53901753 ps |
| T158 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.978896860 |
|
|
Mar 17 03:02:32 PM PDT 24 |
Mar 17 03:02:35 PM PDT 24 |
110547048 ps |
| T154 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.801867761 |
|
|
Mar 17 03:02:48 PM PDT 24 |
Mar 17 03:02:50 PM PDT 24 |
88970408 ps |
| T957 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.1342705360 |
|
|
Mar 17 02:37:31 PM PDT 24 |
Mar 17 02:37:33 PM PDT 24 |
153905128 ps |
| T958 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.2018695434 |
|
|
Mar 17 03:03:03 PM PDT 24 |
Mar 17 03:03:06 PM PDT 24 |
290101952 ps |
| T959 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2955603632 |
|
|
Mar 17 02:37:47 PM PDT 24 |
Mar 17 02:37:50 PM PDT 24 |
246536631 ps |
| T142 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.991814779 |
|
|
Mar 17 03:02:41 PM PDT 24 |
Mar 17 03:02:45 PM PDT 24 |
287911095 ps |
| T960 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.1267657585 |
|
|
Mar 17 02:37:11 PM PDT 24 |
Mar 17 02:37:12 PM PDT 24 |
42148919 ps |
| T961 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.887073522 |
|
|
Mar 17 03:03:02 PM PDT 24 |
Mar 17 03:03:03 PM PDT 24 |
20116909 ps |
| T962 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.3944722692 |
|
|
Mar 17 02:37:30 PM PDT 24 |
Mar 17 02:37:37 PM PDT 24 |
362033723 ps |
| T224 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.3673096148 |
|
|
Mar 17 03:02:34 PM PDT 24 |
Mar 17 03:02:35 PM PDT 24 |
36302187 ps |
| T963 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.3955608835 |
|
|
Mar 17 02:38:27 PM PDT 24 |
Mar 17 02:38:29 PM PDT 24 |
25669942 ps |
| T964 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.1740960112 |
|
|
Mar 17 02:38:06 PM PDT 24 |
Mar 17 02:38:08 PM PDT 24 |
38835285 ps |
| T225 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.653193255 |
|
|
Mar 17 02:38:06 PM PDT 24 |
Mar 17 02:38:07 PM PDT 24 |
50386019 ps |
| T251 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.33099476 |
|
|
Mar 17 03:02:49 PM PDT 24 |
Mar 17 03:02:53 PM PDT 24 |
437185561 ps |
| T147 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.3824361232 |
|
|
Mar 17 03:02:59 PM PDT 24 |
Mar 17 03:03:01 PM PDT 24 |
54841164 ps |
| T965 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.3371582252 |
|
|
Mar 17 03:02:50 PM PDT 24 |
Mar 17 03:03:03 PM PDT 24 |
544440925 ps |
| T966 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.2776846084 |
|
|
Mar 17 03:02:57 PM PDT 24 |
Mar 17 03:02:58 PM PDT 24 |
47365841 ps |
| T967 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2218053441 |
|
|
Mar 17 03:02:33 PM PDT 24 |
Mar 17 03:02:38 PM PDT 24 |
852484710 ps |
| T968 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1940316293 |
|
|
Mar 17 03:02:43 PM PDT 24 |
Mar 17 03:02:46 PM PDT 24 |
168671795 ps |
| T969 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.2469025434 |
|
|
Mar 17 03:02:47 PM PDT 24 |
Mar 17 03:02:48 PM PDT 24 |
20190807 ps |
| T231 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.298300954 |
|
|
Mar 17 02:38:07 PM PDT 24 |
Mar 17 02:38:08 PM PDT 24 |
64878969 ps |
| T970 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3274501506 |
|
|
Mar 17 03:02:47 PM PDT 24 |
Mar 17 03:02:50 PM PDT 24 |
77712477 ps |
| T250 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.1535603480 |
|
|
Mar 17 03:03:05 PM PDT 24 |
Mar 17 03:03:07 PM PDT 24 |
79271003 ps |
| T971 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.706972324 |
|
|
Mar 17 03:02:43 PM PDT 24 |
Mar 17 03:02:45 PM PDT 24 |
105230980 ps |
| T972 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.2561621157 |
|
|
Mar 17 03:03:07 PM PDT 24 |
Mar 17 03:03:09 PM PDT 24 |
131701636 ps |
| T143 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.2010112382 |
|
|
Mar 17 03:03:02 PM PDT 24 |
Mar 17 03:03:07 PM PDT 24 |
498475292 ps |
| T973 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.2997967825 |
|
|
Mar 17 02:37:00 PM PDT 24 |
Mar 17 02:37:03 PM PDT 24 |
320759245 ps |
| T974 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.3398355029 |
|
|
Mar 17 03:02:42 PM PDT 24 |
Mar 17 03:02:46 PM PDT 24 |
1273094164 ps |
| T975 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.209873007 |
|
|
Mar 17 03:03:06 PM PDT 24 |
Mar 17 03:03:10 PM PDT 24 |
96082311 ps |
| T976 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.961292503 |
|
|
Mar 17 03:02:42 PM PDT 24 |
Mar 17 03:02:58 PM PDT 24 |
680311716 ps |
| T228 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.83331269 |
|
|
Mar 17 02:37:04 PM PDT 24 |
Mar 17 02:37:06 PM PDT 24 |
26257899 ps |
| T977 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.800920528 |
|
|
Mar 17 02:37:56 PM PDT 24 |
Mar 17 02:37:59 PM PDT 24 |
90350096 ps |
| T978 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.2744058648 |
|
|
Mar 17 03:02:34 PM PDT 24 |
Mar 17 03:02:36 PM PDT 24 |
43523823 ps |
| T979 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.3441298302 |
|
|
Mar 17 03:02:43 PM PDT 24 |
Mar 17 03:02:44 PM PDT 24 |
45849949 ps |
| T980 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.2230977502 |
|
|
Mar 17 02:38:03 PM PDT 24 |
Mar 17 02:38:05 PM PDT 24 |
45676138 ps |
| T981 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.2558757749 |
|
|
Mar 17 02:37:47 PM PDT 24 |
Mar 17 02:37:49 PM PDT 24 |
91262465 ps |
| T982 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.3640872740 |
|
|
Mar 17 03:02:56 PM PDT 24 |
Mar 17 03:02:59 PM PDT 24 |
71127153 ps |
| T983 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.3067261686 |
|
|
Mar 17 02:37:09 PM PDT 24 |
Mar 17 02:37:13 PM PDT 24 |
158122237 ps |
| T984 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.2316315744 |
|
|
Mar 17 02:37:24 PM PDT 24 |
Mar 17 02:37:26 PM PDT 24 |
37849153 ps |
| T985 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.407215460 |
|
|
Mar 17 03:02:43 PM PDT 24 |
Mar 17 03:02:46 PM PDT 24 |
248637145 ps |
| T986 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.3366087283 |
|
|
Mar 17 03:03:10 PM PDT 24 |
Mar 17 03:03:12 PM PDT 24 |
60223700 ps |
| T139 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.1501155559 |
|
|
Mar 17 02:37:49 PM PDT 24 |
Mar 17 02:37:51 PM PDT 24 |
268384155 ps |
| T148 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.1957753112 |
|
|
Mar 17 03:02:47 PM PDT 24 |
Mar 17 03:02:49 PM PDT 24 |
61492031 ps |
| T987 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.3400954254 |
|
|
Mar 17 02:37:29 PM PDT 24 |
Mar 17 02:37:31 PM PDT 24 |
169289811 ps |
| T988 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.3343673031 |
|
|
Mar 17 02:37:03 PM PDT 24 |
Mar 17 02:37:04 PM PDT 24 |
26725011 ps |
| T989 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.3962720949 |
|
|
Mar 17 02:37:56 PM PDT 24 |
Mar 17 02:37:57 PM PDT 24 |
78497688 ps |
| T990 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.4042915937 |
|
|
Mar 17 03:02:51 PM PDT 24 |
Mar 17 03:02:53 PM PDT 24 |
40778251 ps |
| T991 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.151635093 |
|
|
Mar 17 03:02:56 PM PDT 24 |
Mar 17 03:02:58 PM PDT 24 |
95643457 ps |
| T229 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.2076519919 |
|
|
Mar 17 02:38:14 PM PDT 24 |
Mar 17 02:38:15 PM PDT 24 |
71936512 ps |
| T230 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.3520375939 |
|
|
Mar 17 03:02:43 PM PDT 24 |
Mar 17 03:02:44 PM PDT 24 |
21173969 ps |
| T992 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.2982186880 |
|
|
Mar 17 03:02:43 PM PDT 24 |
Mar 17 03:02:51 PM PDT 24 |
803095465 ps |
| T993 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.166426077 |
|
|
Mar 17 03:02:53 PM PDT 24 |
Mar 17 03:02:55 PM PDT 24 |
142479917 ps |
| T994 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.4287532848 |
|
|
Mar 17 02:37:09 PM PDT 24 |
Mar 17 02:37:10 PM PDT 24 |
20811783 ps |
| T995 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.1916338904 |
|
|
Mar 17 03:03:06 PM PDT 24 |
Mar 17 03:03:08 PM PDT 24 |
65597807 ps |
| T996 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.1924492700 |
|
|
Mar 17 02:37:16 PM PDT 24 |
Mar 17 02:37:19 PM PDT 24 |
185233315 ps |
| T997 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.3019827179 |
|
|
Mar 17 02:37:42 PM PDT 24 |
Mar 17 02:37:48 PM PDT 24 |
368244769 ps |
| T998 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.1291733311 |
|
|
Mar 17 03:02:36 PM PDT 24 |
Mar 17 03:02:37 PM PDT 24 |
37251207 ps |
| T999 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.4129292382 |
|
|
Mar 17 03:02:37 PM PDT 24 |
Mar 17 03:02:38 PM PDT 24 |
107804118 ps |
| T1000 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.3631169303 |
|
|
Mar 17 02:38:07 PM PDT 24 |
Mar 17 02:38:08 PM PDT 24 |
23603328 ps |
| T136 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.119330970 |
|
|
Mar 17 02:38:09 PM PDT 24 |
Mar 17 02:38:11 PM PDT 24 |
330062667 ps |
| T1001 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.435328261 |
|
|
Mar 17 03:02:47 PM PDT 24 |
Mar 17 03:02:57 PM PDT 24 |
4596036440 ps |
| T1002 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.2322621592 |
|
|
Mar 17 02:38:17 PM PDT 24 |
Mar 17 02:38:20 PM PDT 24 |
81944467 ps |
| T1003 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.1383310869 |
|
|
Mar 17 03:03:02 PM PDT 24 |
Mar 17 03:03:04 PM PDT 24 |
27197264 ps |
| T232 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.3239980995 |
|
|
Mar 17 03:02:52 PM PDT 24 |
Mar 17 03:02:53 PM PDT 24 |
23791486 ps |
| T1004 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.3641842984 |
|
|
Mar 17 02:38:15 PM PDT 24 |
Mar 17 02:38:16 PM PDT 24 |
83541000 ps |
| T1005 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.3442128459 |
|
|
Mar 17 02:37:36 PM PDT 24 |
Mar 17 02:37:40 PM PDT 24 |
24297009 ps |
| T1006 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.427214014 |
|
|
Mar 17 02:37:04 PM PDT 24 |
Mar 17 02:37:06 PM PDT 24 |
92735894 ps |
| T233 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.2438367845 |
|
|
Mar 17 03:02:33 PM PDT 24 |
Mar 17 03:02:34 PM PDT 24 |
35296572 ps |
| T1007 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.1741479333 |
|
|
Mar 17 02:37:24 PM PDT 24 |
Mar 17 02:37:56 PM PDT 24 |
9463977756 ps |
| T145 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.2566125721 |
|
|
Mar 17 02:37:00 PM PDT 24 |
Mar 17 02:37:03 PM PDT 24 |
52102471 ps |
| T1008 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.592730646 |
|
|
Mar 17 03:02:49 PM PDT 24 |
Mar 17 03:02:50 PM PDT 24 |
51722611 ps |
| T1009 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.3899411106 |
|
|
Mar 17 02:37:31 PM PDT 24 |
Mar 17 02:37:34 PM PDT 24 |
243314146 ps |
| T1010 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.720842522 |
|
|
Mar 17 03:02:46 PM PDT 24 |
Mar 17 03:02:48 PM PDT 24 |
29487059 ps |
| T1011 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.1792477504 |
|
|
Mar 17 02:37:55 PM PDT 24 |
Mar 17 02:37:57 PM PDT 24 |
127874553 ps |
| T1012 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.1596788023 |
|
|
Mar 17 03:03:04 PM PDT 24 |
Mar 17 03:03:05 PM PDT 24 |
80490413 ps |
| T1013 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.373261917 |
|
|
Mar 17 03:02:56 PM PDT 24 |
Mar 17 03:02:59 PM PDT 24 |
295741722 ps |
| T1014 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1213839140 |
|
|
Mar 17 03:02:40 PM PDT 24 |
Mar 17 03:02:43 PM PDT 24 |
164584085 ps |
| T1015 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.3246697922 |
|
|
Mar 17 02:37:19 PM PDT 24 |
Mar 17 02:37:23 PM PDT 24 |
158501407 ps |
| T1016 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.4119330990 |
|
|
Mar 17 03:02:49 PM PDT 24 |
Mar 17 03:02:52 PM PDT 24 |
881397712 ps |
| T1017 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.604566358 |
|
|
Mar 17 03:02:57 PM PDT 24 |
Mar 17 03:02:59 PM PDT 24 |
96475693 ps |
| T1018 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.332971763 |
|
|
Mar 17 02:38:08 PM PDT 24 |
Mar 17 02:38:09 PM PDT 24 |
92437242 ps |
| T1019 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.4237555504 |
|
|
Mar 17 02:37:15 PM PDT 24 |
Mar 17 02:37:17 PM PDT 24 |
62419308 ps |