Group : lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
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Group : lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
99.30 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_lc_ctrl_env_0.1/lc_ctrl_env_cov.sv


Summary for Group lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 58 1 57 98.28
Crosses 84 0 84 100.00


Variables for Group lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
clk_byp_error_rsp_cp 2 0 2 100.00 100 1 1 2
clk_byp_rsp_mubi_err_cp 2 0 2 100.00 100 1 1 2
count_backdoor_err_cp 2 0 2 100.00 100 1 1 2
count_err_cp 2 0 2 100.00 100 1 1 2
count_illegal_err_cp 2 0 2 100.00 100 1 1 2
err_inj_cp 2 0 2 100.00 100 1 1 0
flash_rma_error_rsp_cp 2 0 2 100.00 100 1 1 2
flash_rma_rsp_mubi_err_cp 2 0 2 100.00 100 1 1 2
jtag_csr_cp 2 0 2 100.00 100 1 1 2
kmac_fsm_backdoor_err_cp 2 0 2 100.00 100 1 1 2
lc_fsm_backdoor_err_cp 2 0 2 100.00 100 1 1 2
otp_lc_data_i_valid_err_cp 2 0 2 100.00 100 1 1 2
otp_partition_err_cp 2 0 2 100.00 100 1 1 2
otp_prog_err_cp 2 0 2 100.00 100 1 1 2
otp_rma_token_valid_mubi_err_cp 2 0 2 100.00 100 1 1 2
otp_secrets_valid_mubi_err_cp 2 0 2 100.00 100 1 1 2
otp_test_tokens_valid_mubi_err_cp 2 0 2 100.00 100 1 1 2
post_trans_err_cp 2 0 2 100.00 100 1 1 2
security_escalation_err_cp 2 0 2 100.00 100 1 1 2
state_backdoor_err_cp 2 0 2 100.00 100 1 1 2
state_err_cp 2 0 2 100.00 100 1 1 2
state_illegal_err_cp 2 0 2 100.00 100 1 1 2
token_invalid_err_cp 2 0 2 100.00 100 1 1 2
token_mismatch_err_cp 2 0 2 100.00 100 1 1 2
token_mux_ctrl_redun_err_cp 2 0 2 100.00 100 1 1 2
token_mux_digest_err_cp 2 1 1 50.00 100 1 1 2
token_response_err_cp 2 0 2 100.00 100 1 1 2
transition_count_err_cp 2 0 2 100.00 100 1 1 2
transition_err_cp 2 0 2 100.00 100 1 1 2


Crosses for Group lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
post_trans_err_inj_xp 4 0 4 100.00 100 1 1 0
post_trans_state_err_xp 4 0 4 100.00 100 1 1 0
post_trans_lc_fsm_backdoor_err_xp 4 0 4 100.00 100 1 1 0
post_trans_state_illegal_err_xp 4 0 4 100.00 100 1 1 0
post_trans_count_err_xp 4 0 4 100.00 100 1 1 0
post_trans_count_illegal_err_xp 4 0 4 100.00 100 1 1 0
post_trans_count_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_clk_byp_error_rsp_xp 4 0 4 100.00 100 1 1 0
jtag_flash_rma_error_rsp_xp 4 0 4 100.00 100 1 1 0
jtag_otp_prog_err_xp 4 0 4 100.00 100 1 1 0
jtag_otp_partition_err_xp 4 0 4 100.00 100 1 1 0
jtag_token_mismatch_err_xp 4 0 4 100.00 100 1 1 0
jtag_state_err_xp 4 0 4 100.00 100 1 1 0
jtag_state_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_lc_fsm_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_kmac_fsm_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_count_err_xp 4 0 4 100.00 100 1 1 0
jtag_count_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_transition_err_xp 4 0 4 100.00 100 1 1 0
jtag_transition_count_err_xp 4 0 4 100.00 100 1 1 0
jtag_post_trans_err_xp 4 0 4 100.00 100 1 1 0


Summary for Variable clk_byp_error_rsp_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for clk_byp_error_rsp_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54159 1 T1 134 T2 18 T3 69
auto[1] 2028 1 T30 18 T18 5 T36 9


Summary for Variable clk_byp_rsp_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for clk_byp_rsp_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 55447 1 T1 134 T2 18 T3 69
auto[1] 740 1 T42 16 T64 12 T65 14


Summary for Variable count_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for count_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54359 1 T1 132 T2 18 T3 69
auto[1] 1828 1 T1 2 T15 1 T87 1


Summary for Variable count_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for count_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54334 1 T1 122 T2 18 T3 69
auto[1] 1853 1 T1 12 T14 1 T41 1


Summary for Variable count_illegal_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for count_illegal_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54350 1 T1 130 T2 18 T3 69
auto[1] 1837 1 T1 4 T14 1 T41 1


Summary for Variable err_inj_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for err_inj_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
err_inj 50822 1 T1 71 T2 18 T3 69
no_err_inj 5365 1 T1 63 T9 12 T13 9


Summary for Variable flash_rma_error_rsp_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for flash_rma_error_rsp_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54266 1 T1 134 T2 18 T3 69
auto[1] 1921 1 T30 14 T18 15 T36 10


Summary for Variable flash_rma_rsp_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for flash_rma_rsp_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 55453 1 T1 134 T2 18 T3 69
auto[1] 734 1 T42 15 T64 7 T65 21


Summary for Variable jtag_csr_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for jtag_csr_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 39467 1 T1 29 T3 69 T8 51
auto[1] 16720 1 T1 105 T2 18 T4 7


Summary for Variable kmac_fsm_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for kmac_fsm_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54263 1 T1 130 T2 18 T3 69
auto[1] 1924 1 T1 4 T15 2 T41 3


Summary for Variable lc_fsm_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for lc_fsm_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54303 1 T1 125 T2 18 T3 69
auto[1] 1884 1 T1 9 T14 1 T15 1


Summary for Variable otp_lc_data_i_valid_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_lc_data_i_valid_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54242 1 T1 122 T2 18 T3 69
auto[1] 1945 1 T1 12 T41 1 T19 2


Summary for Variable otp_partition_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_partition_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54169 1 T1 134 T2 18 T3 69
auto[1] 2018 1 T30 13 T18 5 T36 5


Summary for Variable otp_prog_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_prog_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53500 1 T1 129 T3 69 T8 51
auto[1] 2687 1 T1 5 T2 18 T4 7


Summary for Variable otp_rma_token_valid_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_rma_token_valid_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 55453 1 T1 134 T2 18 T3 69
auto[1] 734 1 T42 13 T64 11 T65 21


Summary for Variable otp_secrets_valid_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_secrets_valid_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 55474 1 T1 134 T2 18 T3 69
auto[1] 713 1 T42 21 T64 11 T65 10


Summary for Variable otp_test_tokens_valid_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_test_tokens_valid_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 55410 1 T1 134 T2 18 T3 69
auto[1] 777 1 T42 25 T64 12 T65 19


Summary for Variable post_trans_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for post_trans_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53059 1 T1 134 T2 18 T3 69
auto[1] 3128 1 T14 13 T15 12 T41 14


Summary for Variable security_escalation_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for security_escalation_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 52449 1 T1 134 T2 18 T4 7
auto[1] 3738 1 T3 69 T8 51 T40 51


Summary for Variable state_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for state_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54262 1 T1 125 T2 18 T3 69
auto[1] 1925 1 T1 9 T14 2 T15 1


Summary for Variable state_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for state_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54280 1 T1 128 T2 18 T3 69
auto[1] 1907 1 T1 6 T14 3 T87 1


Summary for Variable state_illegal_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for state_illegal_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54346 1 T1 126 T2 18 T3 69
auto[1] 1841 1 T1 8 T14 1 T19 1


Summary for Variable token_invalid_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_invalid_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54185 1 T1 134 T2 18 T3 69
auto[1] 2002 1 T30 10 T18 2 T36 9


Summary for Variable token_mismatch_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_mismatch_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50242 1 T1 134 T2 18 T3 69
auto[1] 5945 1 T30 5 T18 10 T36 3


Summary for Variable token_mux_ctrl_redun_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_mux_ctrl_redun_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 52415 1 T1 134 T2 18 T3 69
auto[1] 3772 1 T10 53 T50 94 T63 86


Summary for Variable token_mux_digest_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for token_mux_digest_err_cp

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 56187 1 T1 134 T2 18 T3 69


Summary for Variable token_response_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_response_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54183 1 T1 134 T2 18 T3 69
auto[1] 2004 1 T30 7 T18 5 T36 13


Summary for Variable transition_count_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for transition_count_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54172 1 T1 134 T2 18 T3 69
auto[1] 2015 1 T30 18 T18 8 T36 4


Summary for Variable transition_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for transition_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54137 1 T1 134 T2 18 T3 69
auto[1] 2050 1 T30 11 T18 4 T36 7


Summary for Cross post_trans_err_inj_xp

Samples crossed: post_trans_err_cp err_inj_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_err_inj_xp

Bins
post_trans_err_cperr_inj_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] err_inj 49206 1 T1 71 T2 18 T3 69
auto[0] no_err_inj 3853 1 T1 63 T9 12 T13 9
auto[1] err_inj 1616 1 T14 9 T15 5 T41 8
auto[1] no_err_inj 1512 1 T14 4 T15 7 T41 6


Summary for Cross post_trans_state_err_xp

Samples crossed: post_trans_err_cp state_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_state_err_xp

Bins
post_trans_err_cpstate_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 51322 1 T1 128 T2 18 T3 69
auto[0] auto[1] 1737 1 T1 6 T88 5 T252 5
auto[1] auto[0] 2958 1 T14 10 T15 12 T41 14
auto[1] auto[1] 170 1 T14 3 T87 1 T253 1


Summary for Cross post_trans_lc_fsm_backdoor_err_xp

Samples crossed: post_trans_err_cp lc_fsm_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_lc_fsm_backdoor_err_xp

Bins
post_trans_err_cplc_fsm_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 51356 1 T1 125 T2 18 T3 69
auto[0] auto[1] 1703 1 T1 9 T88 9 T252 7
auto[1] auto[0] 2947 1 T14 12 T15 11 T41 14
auto[1] auto[1] 181 1 T14 1 T15 1 T19 4


Summary for Cross post_trans_state_illegal_err_xp

Samples crossed: post_trans_err_cp state_illegal_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_state_illegal_err_xp

Bins
post_trans_err_cpstate_illegal_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 51418 1 T1 126 T2 18 T3 69
auto[0] auto[1] 1641 1 T1 8 T88 7 T252 5
auto[1] auto[0] 2928 1 T14 12 T15 12 T41 14
auto[1] auto[1] 200 1 T14 1 T19 1 T118 1


Summary for Cross post_trans_count_err_xp

Samples crossed: post_trans_err_cp count_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_count_err_xp

Bins
post_trans_err_cpcount_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 51373 1 T1 122 T2 18 T3 69
auto[0] auto[1] 1686 1 T1 12 T88 8 T252 8
auto[1] auto[0] 2961 1 T14 12 T15 12 T41 13
auto[1] auto[1] 167 1 T14 1 T41 1 T19 1


Summary for Cross post_trans_count_illegal_err_xp

Samples crossed: post_trans_err_cp count_illegal_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_count_illegal_err_xp

Bins
post_trans_err_cpcount_illegal_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 51403 1 T1 130 T2 18 T3 69
auto[0] auto[1] 1656 1 T1 4 T88 1 T252 4
auto[1] auto[0] 2947 1 T14 12 T15 12 T41 13
auto[1] auto[1] 181 1 T14 1 T41 1 T87 1


Summary for Cross post_trans_count_backdoor_err_xp

Samples crossed: post_trans_err_cp count_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_count_backdoor_err_xp

Bins
post_trans_err_cpcount_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 51412 1 T1 132 T2 18 T3 69
auto[0] auto[1] 1647 1 T1 2 T88 8 T252 8
auto[1] auto[0] 2947 1 T14 13 T15 11 T41 14
auto[1] auto[1] 181 1 T15 1 T87 1 T253 1


Summary for Cross jtag_clk_byp_error_rsp_xp

Samples crossed: jtag_csr_cp clk_byp_error_rsp_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_clk_byp_error_rsp_xp

Bins
jtag_csr_cpclk_byp_error_rsp_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38280 1 T1 29 T3 69 T8 51
auto[0] auto[1] 1187 1 T30 18 T36 9 T254 13
auto[1] auto[0] 15879 1 T1 105 T2 18 T4 7
auto[1] auto[1] 841 1 T18 5 T89 10 T39 42


Summary for Cross jtag_flash_rma_error_rsp_xp

Samples crossed: jtag_csr_cp flash_rma_error_rsp_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_flash_rma_error_rsp_xp

Bins
jtag_csr_cpflash_rma_error_rsp_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38361 1 T1 29 T3 69 T8 51
auto[0] auto[1] 1106 1 T30 14 T36 10 T254 10
auto[1] auto[0] 15905 1 T1 105 T2 18 T4 7
auto[1] auto[1] 815 1 T18 15 T89 4 T39 38


Summary for Cross jtag_otp_prog_err_xp

Samples crossed: jtag_csr_cp otp_prog_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_otp_prog_err_xp

Bins
jtag_csr_cpotp_prog_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38039 1 T1 24 T3 69 T8 51
auto[0] auto[1] 1428 1 T1 5 T31 13 T255 9
auto[1] auto[0] 15461 1 T1 105 T16 19 T17 9
auto[1] auto[1] 1259 1 T2 18 T4 7 T21 11


Summary for Cross jtag_otp_partition_err_xp

Samples crossed: jtag_csr_cp otp_partition_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_otp_partition_err_xp

Bins
jtag_csr_cpotp_partition_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38274 1 T1 29 T3 69 T8 51
auto[0] auto[1] 1193 1 T30 13 T36 5 T254 13
auto[1] auto[0] 15895 1 T1 105 T2 18 T4 7
auto[1] auto[1] 825 1 T18 5 T89 4 T39 28


Summary for Cross jtag_token_mismatch_err_xp

Samples crossed: jtag_csr_cp token_mismatch_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_token_mismatch_err_xp

Bins
jtag_csr_cptoken_mismatch_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34388 1 T1 29 T3 69 T8 51
auto[0] auto[1] 5079 1 T30 5 T36 3 T254 7
auto[1] auto[0] 15854 1 T1 105 T2 18 T4 7
auto[1] auto[1] 866 1 T18 10 T89 4 T39 26


Summary for Cross jtag_state_err_xp

Samples crossed: jtag_csr_cp state_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_state_err_xp

Bins
jtag_csr_cpstate_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38239 1 T1 29 T3 69 T8 51
auto[0] auto[1] 1228 1 T14 3 T87 1 T88 5
auto[1] auto[0] 16041 1 T1 99 T2 18 T4 7
auto[1] auto[1] 679 1 T1 6 T39 11 T90 6


Summary for Cross jtag_state_backdoor_err_xp

Samples crossed: jtag_csr_cp state_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_state_backdoor_err_xp

Bins
jtag_csr_cpstate_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38246 1 T1 29 T3 69 T8 51
auto[0] auto[1] 1221 1 T14 2 T15 1 T41 2
auto[1] auto[0] 16016 1 T1 96 T2 18 T4 7
auto[1] auto[1] 704 1 T1 9 T19 1 T39 22


Summary for Cross jtag_lc_fsm_backdoor_err_xp

Samples crossed: jtag_csr_cp lc_fsm_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_lc_fsm_backdoor_err_xp

Bins
jtag_csr_cplc_fsm_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38300 1 T1 29 T3 69 T8 51
auto[0] auto[1] 1167 1 T14 1 T15 1 T88 9
auto[1] auto[0] 16003 1 T1 96 T2 18 T4 7
auto[1] auto[1] 717 1 T1 9 T19 4 T256 1


Summary for Cross jtag_kmac_fsm_backdoor_err_xp

Samples crossed: jtag_csr_cp kmac_fsm_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_kmac_fsm_backdoor_err_xp

Bins
jtag_csr_cpkmac_fsm_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38227 1 T1 29 T3 69 T8 51
auto[0] auto[1] 1240 1 T15 2 T41 3 T88 5
auto[1] auto[0] 16036 1 T1 101 T2 18 T4 7
auto[1] auto[1] 684 1 T1 4 T256 1 T39 22


Summary for Cross jtag_count_err_xp

Samples crossed: jtag_csr_cp count_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_count_err_xp

Bins
jtag_csr_cpcount_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38307 1 T1 29 T3 69 T8 51
auto[0] auto[1] 1160 1 T14 1 T41 1 T87 1
auto[1] auto[0] 16027 1 T1 93 T2 18 T4 7
auto[1] auto[1] 693 1 T1 12 T19 1 T256 1


Summary for Cross jtag_count_backdoor_err_xp

Samples crossed: jtag_csr_cp count_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_count_backdoor_err_xp

Bins
jtag_csr_cpcount_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38310 1 T1 29 T3 69 T8 51
auto[0] auto[1] 1157 1 T15 1 T87 1 T88 8
auto[1] auto[0] 16049 1 T1 103 T2 18 T4 7
auto[1] auto[1] 671 1 T1 2 T39 23 T90 8


Summary for Cross jtag_transition_err_xp

Samples crossed: jtag_csr_cp transition_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_transition_err_xp

Bins
jtag_csr_cptransition_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38309 1 T1 29 T3 69 T8 51
auto[0] auto[1] 1158 1 T30 11 T36 7 T254 10
auto[1] auto[0] 15828 1 T1 105 T2 18 T4 7
auto[1] auto[1] 892 1 T18 4 T89 7 T39 32


Summary for Cross jtag_transition_count_err_xp

Samples crossed: jtag_csr_cp transition_count_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_transition_count_err_xp

Bins
jtag_csr_cptransition_count_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38264 1 T1 29 T3 69 T8 51
auto[0] auto[1] 1203 1 T30 18 T36 4 T254 12
auto[1] auto[0] 15908 1 T1 105 T2 18 T4 7
auto[1] auto[1] 812 1 T18 8 T89 15 T39 37


Summary for Cross jtag_post_trans_err_xp

Samples crossed: jtag_csr_cp post_trans_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_post_trans_err_xp

Bins
jtag_csr_cppost_trans_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 37747 1 T1 29 T3 69 T8 51
auto[0] auto[1] 1720 1 T14 13 T15 12 T41 14
auto[1] auto[0] 15312 1 T1 105 T2 18 T4 7
auto[1] auto[1] 1408 1 T19 14 T256 13 T39 15

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