LINE 1290 EXPRESSION (addr_hit[33] & reg_re & ((!reg_error))) ------1----- ---2-- -------3------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Covered | T1,T2,T3 |
1 | 0 | 1 | Covered | T1,T2,T3 |
1 | 1 | 0 | Covered | T106,T144,T125 |
1 | 1 | 1 | Covered | T1,T2,T3 |
LINE 1291 EXPRESSION (addr_hit[34] & reg_re & ((!reg_error))) ------1----- ---2-- -------3------
-1- | -2- | -3- | Status | Tests |
---|---|---|---|---|
0 | 1 | 1 | Covered | T1,T2,T3 |
1 | 0 | 1 | Covered | T1,T2,T3 |
1 | 1 | 0 | Covered | T141,T133,T135 |
1 | 1 | 1 | Covered | T1,T2,T3 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |