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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.88 97.82 96.03 93.31 97.62 98.52 98.76 96.11


Total test records in report: 1003
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T815 /workspace/coverage/default/16.lc_ctrl_sec_token_digest.1727903699 May 02 02:55:56 PM PDT 24 May 02 02:56:07 PM PDT 24 318762893 ps
T78 /workspace/coverage/default/3.lc_ctrl_jtag_smoke.1036547921 May 02 02:54:43 PM PDT 24 May 02 02:54:47 PM PDT 24 282489935 ps
T816 /workspace/coverage/default/19.lc_ctrl_state_failure.3244342811 May 02 02:56:13 PM PDT 24 May 02 02:56:34 PM PDT 24 270923102 ps
T817 /workspace/coverage/default/3.lc_ctrl_jtag_regwen_during_op.4187328991 May 02 02:54:55 PM PDT 24 May 02 02:55:11 PM PDT 24 3141553063 ps
T52 /workspace/coverage/default/0.lc_ctrl_sec_cm.2464502920 May 02 02:54:38 PM PDT 24 May 02 02:55:15 PM PDT 24 2057882266 ps
T818 /workspace/coverage/default/46.lc_ctrl_errors.2384746199 May 02 02:57:47 PM PDT 24 May 02 02:57:58 PM PDT 24 221577353 ps
T819 /workspace/coverage/default/40.lc_ctrl_errors.2553630274 May 02 02:57:19 PM PDT 24 May 02 02:57:28 PM PDT 24 184187326 ps
T820 /workspace/coverage/default/2.lc_ctrl_jtag_state_post_trans.581037960 May 02 02:54:47 PM PDT 24 May 02 02:54:59 PM PDT 24 797559248 ps
T821 /workspace/coverage/default/20.lc_ctrl_state_post_trans.3863299336 May 02 02:56:16 PM PDT 24 May 02 02:56:21 PM PDT 24 85160140 ps
T822 /workspace/coverage/default/44.lc_ctrl_sec_token_mux.3601848128 May 02 02:57:38 PM PDT 24 May 02 02:57:52 PM PDT 24 1367311774 ps
T823 /workspace/coverage/default/31.lc_ctrl_sec_mubi.928101570 May 02 02:56:53 PM PDT 24 May 02 02:57:06 PM PDT 24 1815611286 ps
T824 /workspace/coverage/default/35.lc_ctrl_security_escalation.2839055717 May 02 02:57:12 PM PDT 24 May 02 02:57:25 PM PDT 24 1119417860 ps
T825 /workspace/coverage/default/20.lc_ctrl_prog_failure.3569827726 May 02 02:56:12 PM PDT 24 May 02 02:56:14 PM PDT 24 18118652 ps
T826 /workspace/coverage/default/0.lc_ctrl_sec_mubi.3619563287 May 02 02:54:33 PM PDT 24 May 02 02:54:47 PM PDT 24 418729758 ps
T827 /workspace/coverage/default/13.lc_ctrl_sec_token_digest.651336336 May 02 02:55:45 PM PDT 24 May 02 02:55:54 PM PDT 24 527751954 ps
T828 /workspace/coverage/default/4.lc_ctrl_jtag_errors.738288450 May 02 02:54:58 PM PDT 24 May 02 02:55:35 PM PDT 24 7653996626 ps
T829 /workspace/coverage/default/13.lc_ctrl_jtag_prog_failure.1667608650 May 02 02:55:44 PM PDT 24 May 02 02:55:49 PM PDT 24 819200373 ps
T830 /workspace/coverage/default/10.lc_ctrl_alert_test.4174739288 May 02 02:55:26 PM PDT 24 May 02 02:55:29 PM PDT 24 70324525 ps
T831 /workspace/coverage/default/6.lc_ctrl_state_post_trans.3135416531 May 02 02:55:04 PM PDT 24 May 02 02:55:15 PM PDT 24 100359731 ps
T832 /workspace/coverage/default/0.lc_ctrl_alert_test.3430347734 May 02 02:54:40 PM PDT 24 May 02 02:54:42 PM PDT 24 68621238 ps
T833 /workspace/coverage/default/21.lc_ctrl_smoke.3859364227 May 02 02:56:13 PM PDT 24 May 02 02:56:16 PM PDT 24 53445471 ps
T834 /workspace/coverage/default/26.lc_ctrl_security_escalation.1557729814 May 02 02:56:30 PM PDT 24 May 02 02:56:39 PM PDT 24 896315275 ps
T835 /workspace/coverage/default/1.lc_ctrl_errors.3967874563 May 02 02:54:43 PM PDT 24 May 02 02:54:58 PM PDT 24 442176726 ps
T836 /workspace/coverage/default/35.lc_ctrl_state_failure.1851767857 May 02 02:57:07 PM PDT 24 May 02 02:57:38 PM PDT 24 840387948 ps
T837 /workspace/coverage/default/5.lc_ctrl_jtag_access.1840138483 May 02 02:55:02 PM PDT 24 May 02 02:55:11 PM PDT 24 307145157 ps
T838 /workspace/coverage/default/35.lc_ctrl_alert_test.1443971957 May 02 02:57:18 PM PDT 24 May 02 02:57:21 PM PDT 24 15815944 ps
T839 /workspace/coverage/default/41.lc_ctrl_sec_token_mux.3512621773 May 02 02:57:26 PM PDT 24 May 02 02:57:39 PM PDT 24 1119672466 ps
T840 /workspace/coverage/default/8.lc_ctrl_sec_token_mux.4161345221 May 02 02:55:21 PM PDT 24 May 02 02:55:34 PM PDT 24 6507652242 ps
T841 /workspace/coverage/default/8.lc_ctrl_jtag_regwen_during_op.909523280 May 02 02:55:13 PM PDT 24 May 02 02:55:53 PM PDT 24 1122415255 ps
T842 /workspace/coverage/default/11.lc_ctrl_jtag_state_post_trans.612294074 May 02 02:55:34 PM PDT 24 May 02 02:56:05 PM PDT 24 880779255 ps
T843 /workspace/coverage/default/43.lc_ctrl_prog_failure.410816838 May 02 02:57:35 PM PDT 24 May 02 02:57:39 PM PDT 24 64980755 ps
T844 /workspace/coverage/default/17.lc_ctrl_alert_test.292416674 May 02 02:56:12 PM PDT 24 May 02 02:56:15 PM PDT 24 43504358 ps
T845 /workspace/coverage/default/8.lc_ctrl_smoke.1267202918 May 02 02:55:15 PM PDT 24 May 02 02:55:26 PM PDT 24 207049581 ps
T846 /workspace/coverage/default/16.lc_ctrl_jtag_errors.1869211960 May 02 02:55:56 PM PDT 24 May 02 02:57:01 PM PDT 24 2061156630 ps
T847 /workspace/coverage/default/0.lc_ctrl_errors.3372991792 May 02 02:54:33 PM PDT 24 May 02 02:54:49 PM PDT 24 2579395919 ps
T848 /workspace/coverage/default/6.lc_ctrl_jtag_errors.3723903154 May 02 02:55:07 PM PDT 24 May 02 02:55:44 PM PDT 24 10290388792 ps
T849 /workspace/coverage/default/45.lc_ctrl_security_escalation.3182220128 May 02 02:57:41 PM PDT 24 May 02 02:57:55 PM PDT 24 731561249 ps
T201 /workspace/coverage/default/7.lc_ctrl_claim_transition_if.264251413 May 02 02:55:05 PM PDT 24 May 02 02:55:15 PM PDT 24 18655356 ps
T850 /workspace/coverage/default/8.lc_ctrl_jtag_smoke.945911283 May 02 02:55:16 PM PDT 24 May 02 02:55:30 PM PDT 24 226730460 ps
T851 /workspace/coverage/default/24.lc_ctrl_stress_all_with_rand_reset.3647598748 May 02 02:56:26 PM PDT 24 May 02 03:01:15 PM PDT 24 138435111230 ps
T852 /workspace/coverage/default/29.lc_ctrl_smoke.763796350 May 02 02:56:48 PM PDT 24 May 02 02:56:51 PM PDT 24 236160182 ps
T853 /workspace/coverage/default/35.lc_ctrl_stress_all.1647528220 May 02 02:57:16 PM PDT 24 May 02 02:58:11 PM PDT 24 4450560773 ps
T854 /workspace/coverage/default/47.lc_ctrl_state_failure.4174027890 May 02 02:57:44 PM PDT 24 May 02 02:58:00 PM PDT 24 393511238 ps
T855 /workspace/coverage/default/2.lc_ctrl_regwen_during_op.2743508474 May 02 02:54:42 PM PDT 24 May 02 02:54:55 PM PDT 24 529270698 ps
T79 /workspace/coverage/default/5.lc_ctrl_jtag_smoke.1984460555 May 02 02:55:02 PM PDT 24 May 02 02:55:13 PM PDT 24 897887227 ps
T856 /workspace/coverage/default/48.lc_ctrl_jtag_access.1777453069 May 02 02:57:56 PM PDT 24 May 02 02:58:02 PM PDT 24 72016535 ps
T857 /workspace/coverage/default/16.lc_ctrl_volatile_unlock_smoke.2506868604 May 02 02:56:04 PM PDT 24 May 02 02:56:06 PM PDT 24 11186272 ps
T858 /workspace/coverage/default/49.lc_ctrl_state_failure.127353187 May 02 02:57:51 PM PDT 24 May 02 02:58:17 PM PDT 24 678918915 ps
T859 /workspace/coverage/default/12.lc_ctrl_security_escalation.2578942759 May 02 02:55:34 PM PDT 24 May 02 02:55:48 PM PDT 24 2436118379 ps
T860 /workspace/coverage/default/15.lc_ctrl_sec_token_mux.3817017243 May 02 02:55:57 PM PDT 24 May 02 02:56:10 PM PDT 24 901615579 ps
T861 /workspace/coverage/default/7.lc_ctrl_jtag_errors.1727707 May 02 02:55:12 PM PDT 24 May 02 02:56:03 PM PDT 24 1335524380 ps
T862 /workspace/coverage/default/40.lc_ctrl_sec_token_mux.3369436127 May 02 02:57:58 PM PDT 24 May 02 02:58:10 PM PDT 24 998658669 ps
T863 /workspace/coverage/default/43.lc_ctrl_stress_all.447660191 May 02 02:57:31 PM PDT 24 May 02 02:58:25 PM PDT 24 1767682564 ps
T864 /workspace/coverage/default/26.lc_ctrl_errors.2770488565 May 02 02:56:31 PM PDT 24 May 02 02:56:49 PM PDT 24 1419871523 ps
T865 /workspace/coverage/default/27.lc_ctrl_state_failure.616538800 May 02 02:56:39 PM PDT 24 May 02 02:57:05 PM PDT 24 162198647 ps
T866 /workspace/coverage/default/9.lc_ctrl_security_escalation.1111405045 May 02 02:55:17 PM PDT 24 May 02 02:55:34 PM PDT 24 238853438 ps
T867 /workspace/coverage/default/14.lc_ctrl_volatile_unlock_smoke.2979114611 May 02 02:55:44 PM PDT 24 May 02 02:55:47 PM PDT 24 42089323 ps
T868 /workspace/coverage/default/30.lc_ctrl_smoke.2173190293 May 02 02:56:52 PM PDT 24 May 02 02:56:56 PM PDT 24 27292014 ps
T869 /workspace/coverage/default/40.lc_ctrl_smoke.2718302133 May 02 02:57:22 PM PDT 24 May 02 02:57:26 PM PDT 24 238983886 ps
T870 /workspace/coverage/default/43.lc_ctrl_smoke.1661187744 May 02 02:57:33 PM PDT 24 May 02 02:57:36 PM PDT 24 14866341 ps
T871 /workspace/coverage/default/9.lc_ctrl_jtag_regwen_during_op.618298836 May 02 02:55:20 PM PDT 24 May 02 02:55:49 PM PDT 24 1589137697 ps
T872 /workspace/coverage/default/28.lc_ctrl_state_failure.1195998729 May 02 02:56:41 PM PDT 24 May 02 02:57:07 PM PDT 24 719272624 ps
T873 /workspace/coverage/default/34.lc_ctrl_state_post_trans.3344938545 May 02 02:57:04 PM PDT 24 May 02 02:57:13 PM PDT 24 204445646 ps
T874 /workspace/coverage/default/21.lc_ctrl_state_post_trans.2726980036 May 02 02:56:14 PM PDT 24 May 02 02:56:24 PM PDT 24 67750421 ps
T875 /workspace/coverage/default/6.lc_ctrl_regwen_during_op.3654620366 May 02 02:55:03 PM PDT 24 May 02 02:55:21 PM PDT 24 368251948 ps
T876 /workspace/coverage/default/6.lc_ctrl_prog_failure.2400670901 May 02 02:55:02 PM PDT 24 May 02 02:55:12 PM PDT 24 64637111 ps
T877 /workspace/coverage/default/12.lc_ctrl_smoke.3442844358 May 02 02:55:28 PM PDT 24 May 02 02:55:31 PM PDT 24 148524617 ps
T878 /workspace/coverage/default/8.lc_ctrl_jtag_priority.1499759550 May 02 02:55:13 PM PDT 24 May 02 02:55:44 PM PDT 24 3478779544 ps
T119 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.1009513547 May 02 02:50:59 PM PDT 24 May 02 02:51:02 PM PDT 24 35971431 ps
T128 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.3184678314 May 02 02:51:04 PM PDT 24 May 02 02:51:08 PM PDT 24 288955246 ps
T112 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.2353282124 May 02 02:51:05 PM PDT 24 May 02 02:51:08 PM PDT 24 28383379 ps
T113 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.1121513350 May 02 02:51:04 PM PDT 24 May 02 02:51:07 PM PDT 24 44206883 ps
T120 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.1960009102 May 02 02:50:24 PM PDT 24 May 02 02:50:27 PM PDT 24 631089021 ps
T149 /workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.745179732 May 02 02:50:48 PM PDT 24 May 02 02:50:50 PM PDT 24 39404458 ps
T114 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.774105312 May 02 02:50:57 PM PDT 24 May 02 02:51:02 PM PDT 24 130440642 ps
T154 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.2698496872 May 02 02:50:44 PM PDT 24 May 02 02:50:49 PM PDT 24 102963043 ps
T118 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3041503821 May 02 02:50:52 PM PDT 24 May 02 02:50:58 PM PDT 24 883714379 ps
T187 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.1267308974 May 02 02:50:19 PM PDT 24 May 02 02:50:21 PM PDT 24 169140854 ps
T188 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.3747282430 May 02 02:51:19 PM PDT 24 May 02 02:51:21 PM PDT 24 43830559 ps
T196 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.3018336004 May 02 02:50:51 PM PDT 24 May 02 02:51:31 PM PDT 24 1746459473 ps
T116 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.572547984 May 02 02:51:11 PM PDT 24 May 02 02:51:14 PM PDT 24 912437718 ps
T189 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.3757655725 May 02 02:50:56 PM PDT 24 May 02 02:50:58 PM PDT 24 38679486 ps
T879 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.676616985 May 02 02:50:59 PM PDT 24 May 02 02:51:02 PM PDT 24 135165934 ps
T190 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.1540277170 May 02 02:50:23 PM PDT 24 May 02 02:50:25 PM PDT 24 66986640 ps
T155 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.1942848827 May 02 02:50:51 PM PDT 24 May 02 02:50:54 PM PDT 24 43785405 ps
T880 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.1911162688 May 02 02:50:22 PM PDT 24 May 02 02:50:25 PM PDT 24 698660429 ps
T117 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.2056007543 May 02 02:51:05 PM PDT 24 May 02 02:51:07 PM PDT 24 52249583 ps
T156 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.2384006821 May 02 02:51:13 PM PDT 24 May 02 02:51:16 PM PDT 24 190156404 ps
T144 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.2272039010 May 02 02:50:58 PM PDT 24 May 02 02:51:01 PM PDT 24 371281024 ps
T137 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.3294393503 May 02 02:51:13 PM PDT 24 May 02 02:51:17 PM PDT 24 226558748 ps
T881 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.3115772129 May 02 02:50:59 PM PDT 24 May 02 02:51:41 PM PDT 24 6957128542 ps
T882 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.4111557129 May 02 02:51:14 PM PDT 24 May 02 02:51:16 PM PDT 24 38732399 ps
T148 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3591075606 May 02 02:50:43 PM PDT 24 May 02 02:50:46 PM PDT 24 314275114 ps
T883 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.2093474932 May 02 02:50:51 PM PDT 24 May 02 02:50:53 PM PDT 24 113053354 ps
T884 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.1860316823 May 02 02:50:49 PM PDT 24 May 02 02:50:58 PM PDT 24 1408037507 ps
T157 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.2546062416 May 02 02:50:57 PM PDT 24 May 02 02:51:00 PM PDT 24 23071254 ps
T885 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.2009863182 May 02 02:50:44 PM PDT 24 May 02 02:50:59 PM PDT 24 1199182177 ps
T191 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.4068182279 May 02 02:51:18 PM PDT 24 May 02 02:51:20 PM PDT 24 15690856 ps
T192 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.3135599203 May 02 02:51:01 PM PDT 24 May 02 02:51:03 PM PDT 24 127902321 ps
T886 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.366548440 May 02 02:51:11 PM PDT 24 May 02 02:51:14 PM PDT 24 21618965 ps
T122 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.421874252 May 02 02:51:04 PM PDT 24 May 02 02:51:08 PM PDT 24 524568026 ps
T158 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.1315025088 May 02 02:51:15 PM PDT 24 May 02 02:51:17 PM PDT 24 16087481 ps
T887 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.1991564255 May 02 02:50:59 PM PDT 24 May 02 02:51:01 PM PDT 24 25473934 ps
T126 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.3881782706 May 02 02:51:15 PM PDT 24 May 02 02:51:17 PM PDT 24 79062570 ps
T888 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.339608301 May 02 02:50:21 PM PDT 24 May 02 02:50:39 PM PDT 24 1342863331 ps
T123 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.375704559 May 02 02:51:06 PM PDT 24 May 02 02:51:10 PM PDT 24 225595381 ps
T889 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.1424669329 May 02 02:51:12 PM PDT 24 May 02 02:51:15 PM PDT 24 33979063 ps
T890 /workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.887943478 May 02 02:51:13 PM PDT 24 May 02 02:51:15 PM PDT 24 26981523 ps
T175 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.845126260 May 02 02:50:43 PM PDT 24 May 02 02:50:46 PM PDT 24 16881379 ps
T891 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.2801916216 May 02 02:50:43 PM PDT 24 May 02 02:50:50 PM PDT 24 8785107153 ps
T127 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.337746021 May 02 02:51:01 PM PDT 24 May 02 02:51:07 PM PDT 24 470182252 ps
T892 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.912990149 May 02 02:50:20 PM PDT 24 May 02 02:50:29 PM PDT 24 9367737078 ps
T893 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.3847639696 May 02 02:50:59 PM PDT 24 May 02 02:51:02 PM PDT 24 152246167 ps
T894 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.1511144096 May 02 02:50:58 PM PDT 24 May 02 02:51:00 PM PDT 24 86123252 ps
T895 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.2830149985 May 02 02:50:42 PM PDT 24 May 02 02:50:45 PM PDT 24 27182885 ps
T896 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.3414405887 May 02 02:50:42 PM PDT 24 May 02 02:50:52 PM PDT 24 341894061 ps
T897 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.2807437117 May 02 02:50:54 PM PDT 24 May 02 02:50:56 PM PDT 24 52073984 ps
T898 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.4247159511 May 02 02:50:42 PM PDT 24 May 02 02:50:46 PM PDT 24 109557585 ps
T899 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.1063096638 May 02 02:50:58 PM PDT 24 May 02 02:51:04 PM PDT 24 356012618 ps
T900 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.4271663060 May 02 02:50:57 PM PDT 24 May 02 02:51:00 PM PDT 24 451035242 ps
T134 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.2155725399 May 02 02:50:30 PM PDT 24 May 02 02:50:33 PM PDT 24 84303474 ps
T901 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2742082734 May 02 02:51:04 PM PDT 24 May 02 02:51:06 PM PDT 24 122497989 ps
T176 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.3041842558 May 02 02:50:50 PM PDT 24 May 02 02:50:53 PM PDT 24 17652536 ps
T902 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.1070615087 May 02 02:51:19 PM PDT 24 May 02 02:51:21 PM PDT 24 21633585 ps
T133 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.3553983865 May 02 02:50:19 PM PDT 24 May 02 02:50:23 PM PDT 24 223166234 ps
T903 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.2894531875 May 02 02:51:11 PM PDT 24 May 02 02:51:13 PM PDT 24 40246837 ps
T904 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.3846148524 May 02 02:50:31 PM PDT 24 May 02 02:50:34 PM PDT 24 59368018 ps
T905 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.1208598977 May 02 02:50:24 PM PDT 24 May 02 02:50:26 PM PDT 24 67016214 ps
T906 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.4202094439 May 02 02:50:24 PM PDT 24 May 02 02:50:27 PM PDT 24 482329200 ps
T907 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.3612368832 May 02 02:50:28 PM PDT 24 May 02 02:50:31 PM PDT 24 352528826 ps
T177 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.3231188126 May 02 02:51:07 PM PDT 24 May 02 02:51:09 PM PDT 24 95019822 ps
T908 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3024764729 May 02 02:50:57 PM PDT 24 May 02 02:51:00 PM PDT 24 545047548 ps
T909 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.510149127 May 02 02:50:42 PM PDT 24 May 02 02:50:46 PM PDT 24 245783245 ps
T910 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.1021598655 May 02 02:50:21 PM PDT 24 May 02 02:50:32 PM PDT 24 467262093 ps
T911 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.2970405788 May 02 02:50:51 PM PDT 24 May 02 02:50:53 PM PDT 24 89342896 ps
T912 /workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.2337594931 May 02 02:51:06 PM PDT 24 May 02 02:51:08 PM PDT 24 32433325 ps
T131 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.3715799843 May 02 02:51:12 PM PDT 24 May 02 02:51:15 PM PDT 24 119778461 ps
T913 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.2234351969 May 02 02:50:43 PM PDT 24 May 02 02:50:47 PM PDT 24 95452903 ps
T914 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.2388472869 May 02 02:50:18 PM PDT 24 May 02 02:50:21 PM PDT 24 21506995 ps
T139 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.4218880170 May 02 02:50:16 PM PDT 24 May 02 02:50:20 PM PDT 24 214410445 ps
T915 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.1745843279 May 02 02:50:59 PM PDT 24 May 02 02:51:14 PM PDT 24 5996334644 ps
T132 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.1784917404 May 02 02:50:41 PM PDT 24 May 02 02:50:44 PM PDT 24 96797394 ps
T916 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.3943653001 May 02 02:50:30 PM PDT 24 May 02 02:51:11 PM PDT 24 3471000040 ps
T917 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.3837147234 May 02 02:50:18 PM PDT 24 May 02 02:50:20 PM PDT 24 19237435 ps
T918 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.81852511 May 02 02:50:21 PM PDT 24 May 02 02:50:25 PM PDT 24 184426236 ps
T919 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.4152957540 May 02 02:50:39 PM PDT 24 May 02 02:50:43 PM PDT 24 44145625 ps
T178 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.2319376684 May 02 02:50:43 PM PDT 24 May 02 02:50:46 PM PDT 24 56535838 ps
T920 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.654615051 May 02 02:50:41 PM PDT 24 May 02 02:50:43 PM PDT 24 15495521 ps
T142 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.3548398760 May 02 02:50:22 PM PDT 24 May 02 02:50:26 PM PDT 24 119905026 ps
T921 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.1448247301 May 02 02:50:46 PM PDT 24 May 02 02:50:48 PM PDT 24 43344500 ps
T922 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.3009752213 May 02 02:51:04 PM PDT 24 May 02 02:51:07 PM PDT 24 112337148 ps
T923 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3805528775 May 02 02:50:45 PM PDT 24 May 02 02:50:49 PM PDT 24 74139008 ps
T138 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.1936170118 May 02 02:51:19 PM PDT 24 May 02 02:51:24 PM PDT 24 90494650 ps
T179 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.998794488 May 02 02:51:13 PM PDT 24 May 02 02:51:15 PM PDT 24 20832060 ps
T180 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.3074844902 May 02 02:50:23 PM PDT 24 May 02 02:50:24 PM PDT 24 35143622 ps
T140 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.2567112525 May 02 02:50:51 PM PDT 24 May 02 02:50:55 PM PDT 24 309453963 ps
T924 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.1365798779 May 02 02:51:06 PM PDT 24 May 02 02:51:08 PM PDT 24 35040875 ps
T925 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.3945118652 May 02 02:51:11 PM PDT 24 May 02 02:51:13 PM PDT 24 80065234 ps
T926 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.1142446170 May 02 02:50:42 PM PDT 24 May 02 02:50:45 PM PDT 24 51777553 ps
T927 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.733691307 May 02 02:50:17 PM PDT 24 May 02 02:50:23 PM PDT 24 500378857 ps
T928 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.2049072594 May 02 02:50:23 PM PDT 24 May 02 02:50:26 PM PDT 24 33375128 ps
T929 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.1047664746 May 02 02:51:05 PM PDT 24 May 02 02:51:09 PM PDT 24 640900613 ps
T143 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.3302605766 May 02 02:51:13 PM PDT 24 May 02 02:51:18 PM PDT 24 114146213 ps
T930 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.2081092774 May 02 02:50:30 PM PDT 24 May 02 02:50:32 PM PDT 24 145493144 ps
T136 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.276172860 May 02 02:51:05 PM PDT 24 May 02 02:51:10 PM PDT 24 214070548 ps
T931 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.2564984470 May 02 02:51:04 PM PDT 24 May 02 02:51:06 PM PDT 24 35279471 ps
T932 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.318567540 May 02 02:50:28 PM PDT 24 May 02 02:50:31 PM PDT 24 193018554 ps
T933 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.1845672433 May 02 02:50:50 PM PDT 24 May 02 02:50:53 PM PDT 24 206309882 ps
T934 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.441724556 May 02 02:50:57 PM PDT 24 May 02 02:50:59 PM PDT 24 93811280 ps
T935 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.1107181335 May 02 02:50:59 PM PDT 24 May 02 02:51:01 PM PDT 24 31615199 ps
T936 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.4150353858 May 02 02:51:05 PM PDT 24 May 02 02:51:09 PM PDT 24 87216218 ps
T937 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.2808621699 May 02 02:51:12 PM PDT 24 May 02 02:51:14 PM PDT 24 16323261 ps
T938 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.526610558 May 02 02:50:48 PM PDT 24 May 02 02:50:50 PM PDT 24 97771090 ps
T939 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2722175249 May 02 02:50:29 PM PDT 24 May 02 02:50:32 PM PDT 24 262787716 ps
T124 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.2009618580 May 02 02:50:31 PM PDT 24 May 02 02:50:35 PM PDT 24 659857834 ps
T940 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.622226956 May 02 02:50:18 PM PDT 24 May 02 02:50:20 PM PDT 24 101667095 ps
T941 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.1011759611 May 02 02:50:29 PM PDT 24 May 02 02:50:31 PM PDT 24 25002809 ps
T942 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.2059778483 May 02 02:51:04 PM PDT 24 May 02 02:51:08 PM PDT 24 441979548 ps
T943 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.567197702 May 02 02:51:12 PM PDT 24 May 02 02:51:15 PM PDT 24 50966155 ps
T944 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.1386733320 May 02 02:50:44 PM PDT 24 May 02 02:50:48 PM PDT 24 53271840 ps
T181 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.882495422 May 02 02:50:40 PM PDT 24 May 02 02:50:43 PM PDT 24 42300240 ps
T945 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.2779646592 May 02 02:50:50 PM PDT 24 May 02 02:50:53 PM PDT 24 130188062 ps
T946 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.1120122538 May 02 02:50:51 PM PDT 24 May 02 02:50:55 PM PDT 24 82347451 ps
T182 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.1628278549 May 02 02:50:29 PM PDT 24 May 02 02:50:32 PM PDT 24 70107329 ps
T947 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.2167425988 May 02 02:50:22 PM PDT 24 May 02 02:50:24 PM PDT 24 53289711 ps
T948 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.3438519166 May 02 02:50:51 PM PDT 24 May 02 02:50:54 PM PDT 24 248510039 ps
T129 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.770114907 May 02 02:51:04 PM PDT 24 May 02 02:51:09 PM PDT 24 3732797571 ps
T949 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.2332437674 May 02 02:50:58 PM PDT 24 May 02 02:51:00 PM PDT 24 15011049 ps
T950 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.354964388 May 02 02:50:31 PM PDT 24 May 02 02:50:34 PM PDT 24 68231895 ps
T951 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.1062397714 May 02 02:51:06 PM PDT 24 May 02 02:51:08 PM PDT 24 21265882 ps
T952 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.3959847647 May 02 02:50:21 PM PDT 24 May 02 02:50:23 PM PDT 24 56399355 ps
T953 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.1814200666 May 02 02:51:06 PM PDT 24 May 02 02:51:09 PM PDT 24 113876794 ps
T954 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.3536543073 May 02 02:51:07 PM PDT 24 May 02 02:51:09 PM PDT 24 50936464 ps
T955 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.527352466 May 02 02:51:04 PM PDT 24 May 02 02:51:07 PM PDT 24 44416236 ps
T183 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.4260446757 May 02 02:50:25 PM PDT 24 May 02 02:50:28 PM PDT 24 37470706 ps
T956 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.1415802860 May 02 02:50:23 PM PDT 24 May 02 02:50:26 PM PDT 24 401642318 ps
T957 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.2797784521 May 02 02:51:07 PM PDT 24 May 02 02:51:09 PM PDT 24 101295146 ps
T958 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.2271529734 May 02 02:50:25 PM PDT 24 May 02 02:50:28 PM PDT 24 90127296 ps
T959 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.3603721035 May 02 02:50:28 PM PDT 24 May 02 02:50:30 PM PDT 24 250004488 ps
T960 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.996838306 May 02 02:51:11 PM PDT 24 May 02 02:51:14 PM PDT 24 92500890 ps
T961 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.2927042325 May 02 02:51:07 PM PDT 24 May 02 02:51:09 PM PDT 24 13964284 ps
T184 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.669832457 May 02 02:50:51 PM PDT 24 May 02 02:50:53 PM PDT 24 15323764 ps
T962 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.1375790830 May 02 02:50:42 PM PDT 24 May 02 02:50:56 PM PDT 24 1921861651 ps
T963 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.589555217 May 02 02:51:00 PM PDT 24 May 02 02:51:12 PM PDT 24 410282581 ps
T185 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.502069976 May 02 02:50:21 PM PDT 24 May 02 02:50:23 PM PDT 24 24924523 ps
T964 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.1081940402 May 02 02:50:23 PM PDT 24 May 02 02:50:25 PM PDT 24 23809213 ps
T965 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2847509030 May 02 02:50:41 PM PDT 24 May 02 02:50:45 PM PDT 24 397082695 ps
T966 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.803324525 May 02 02:50:41 PM PDT 24 May 02 02:50:44 PM PDT 24 171410128 ps
T130 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.2790983659 May 02 02:51:17 PM PDT 24 May 02 02:51:20 PM PDT 24 67787295 ps
T967 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.1357857046 May 02 02:50:29 PM PDT 24 May 02 02:50:35 PM PDT 24 1693907958 ps
T968 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.3120668155 May 02 02:50:49 PM PDT 24 May 02 02:50:53 PM PDT 24 224906257 ps
T969 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.978346046 May 02 02:51:19 PM PDT 24 May 02 02:51:21 PM PDT 24 58825800 ps
T970 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.3489819525 May 02 02:50:43 PM PDT 24 May 02 02:50:47 PM PDT 24 108115765 ps
T971 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.4105324427 May 02 02:51:18 PM PDT 24 May 02 02:51:22 PM PDT 24 70570053 ps
T972 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.2032964036 May 02 02:51:01 PM PDT 24 May 02 02:51:04 PM PDT 24 25104652 ps
T973 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.2429380863 May 02 02:51:17 PM PDT 24 May 02 02:51:18 PM PDT 24 52254657 ps
T974 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.245504941 May 02 02:50:58 PM PDT 24 May 02 02:51:01 PM PDT 24 26093707 ps
T975 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.1135429487 May 02 02:51:05 PM PDT 24 May 02 02:51:07 PM PDT 24 21355959 ps
T976 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.2577928807 May 02 02:50:21 PM PDT 24 May 02 02:50:23 PM PDT 24 12914619 ps
T977 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.2303042313 May 02 02:51:21 PM PDT 24 May 02 02:51:23 PM PDT 24 71924823 ps
T978 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.2023340290 May 02 02:50:24 PM PDT 24 May 02 02:50:26 PM PDT 24 23466353 ps
T979 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.4289762511 May 02 02:51:04 PM PDT 24 May 02 02:51:07 PM PDT 24 116966292 ps
T980 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.197044321 May 02 02:50:59 PM PDT 24 May 02 02:51:04 PM PDT 24 730957258 ps
T981 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3990727050 May 02 02:51:00 PM PDT 24 May 02 02:51:03 PM PDT 24 108521774 ps
T141 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.750931913 May 02 02:51:18 PM PDT 24 May 02 02:51:22 PM PDT 24 286909652 ps
T982 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.2684945182 May 02 02:51:13 PM PDT 24 May 02 02:51:16 PM PDT 24 29762516 ps
T983 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.104553167 May 02 02:50:49 PM PDT 24 May 02 02:50:52 PM PDT 24 86874154 ps
T984 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.2362732674 May 02 02:51:18 PM PDT 24 May 02 02:51:20 PM PDT 24 136460580 ps
T145 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.649138970 May 02 02:50:45 PM PDT 24 May 02 02:50:48 PM PDT 24 69578908 ps
T147 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.1779218065 May 02 02:51:03 PM PDT 24 May 02 02:51:08 PM PDT 24 87646674 ps
T985 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.3613861642 May 02 02:51:14 PM PDT 24 May 02 02:51:16 PM PDT 24 109946965 ps
T986 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.1381173617 May 02 02:50:50 PM PDT 24 May 02 02:50:53 PM PDT 24 103235983 ps
T987 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.597007498 May 02 02:50:28 PM PDT 24 May 02 02:50:46 PM PDT 24 10142091724 ps
T988 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.597304506 May 02 02:50:45 PM PDT 24 May 02 02:50:54 PM PDT 24 712071802 ps
T989 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.2618032890 May 02 02:50:46 PM PDT 24 May 02 02:50:49 PM PDT 24 62789922 ps
T990 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.1030047455 May 02 02:50:45 PM PDT 24 May 02 02:50:48 PM PDT 24 38886394 ps
T991 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.4117059836 May 02 02:51:17 PM PDT 24 May 02 02:51:22 PM PDT 24 108070200 ps
T992 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.3873288900 May 02 02:50:53 PM PDT 24 May 02 02:50:55 PM PDT 24 75788289 ps
T993 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.157396079 May 02 02:50:57 PM PDT 24 May 02 02:51:14 PM PDT 24 675546637 ps
T125 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.1937386138 May 02 02:50:51 PM PDT 24 May 02 02:50:56 PM PDT 24 568603018 ps
T994 /workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.990554236 May 02 02:50:51 PM PDT 24 May 02 02:50:53 PM PDT 24 125468767 ps
T186 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.2623926016 May 02 02:50:18 PM PDT 24 May 02 02:50:21 PM PDT 24 15812255 ps
T135 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.2422355467 May 02 02:51:19 PM PDT 24 May 02 02:51:23 PM PDT 24 291837585 ps
T995 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.1561091926 May 02 02:50:29 PM PDT 24 May 02 02:50:31 PM PDT 24 104078689 ps
T996 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.1617468229 May 02 02:50:18 PM PDT 24 May 02 02:50:20 PM PDT 24 109901014 ps
T997 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.665538091 May 02 02:50:53 PM PDT 24 May 02 02:50:55 PM PDT 24 186868438 ps
T998 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.736636631 May 02 02:50:24 PM PDT 24 May 02 02:50:27 PM PDT 24 505370188 ps
T146 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.53139779 May 02 02:50:42 PM PDT 24 May 02 02:50:46 PM PDT 24 139308992 ps
T999 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.863391458 May 02 02:51:11 PM PDT 24 May 02 02:51:14 PM PDT 24 62532224 ps
T1000 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.1814797465 May 02 02:50:51 PM PDT 24 May 02 02:50:55 PM PDT 24 24160337 ps
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