Group : lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
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Group : lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
99.30 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_lc_ctrl_env_0.1/lc_ctrl_env_cov.sv


Summary for Group lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 58 1 57 98.28
Crosses 84 0 84 100.00


Variables for Group lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
clk_byp_error_rsp_cp 2 0 2 100.00 100 1 1 2
clk_byp_rsp_mubi_err_cp 2 0 2 100.00 100 1 1 2
count_backdoor_err_cp 2 0 2 100.00 100 1 1 2
count_err_cp 2 0 2 100.00 100 1 1 2
count_illegal_err_cp 2 0 2 100.00 100 1 1 2
err_inj_cp 2 0 2 100.00 100 1 1 0
flash_rma_error_rsp_cp 2 0 2 100.00 100 1 1 2
flash_rma_rsp_mubi_err_cp 2 0 2 100.00 100 1 1 2
jtag_csr_cp 2 0 2 100.00 100 1 1 2
kmac_fsm_backdoor_err_cp 2 0 2 100.00 100 1 1 2
lc_fsm_backdoor_err_cp 2 0 2 100.00 100 1 1 2
otp_lc_data_i_valid_err_cp 2 0 2 100.00 100 1 1 2
otp_partition_err_cp 2 0 2 100.00 100 1 1 2
otp_prog_err_cp 2 0 2 100.00 100 1 1 2
otp_rma_token_valid_mubi_err_cp 2 0 2 100.00 100 1 1 2
otp_secrets_valid_mubi_err_cp 2 0 2 100.00 100 1 1 2
otp_test_tokens_valid_mubi_err_cp 2 0 2 100.00 100 1 1 2
post_trans_err_cp 2 0 2 100.00 100 1 1 2
security_escalation_err_cp 2 0 2 100.00 100 1 1 2
state_backdoor_err_cp 2 0 2 100.00 100 1 1 2
state_err_cp 2 0 2 100.00 100 1 1 2
state_illegal_err_cp 2 0 2 100.00 100 1 1 2
token_invalid_err_cp 2 0 2 100.00 100 1 1 2
token_mismatch_err_cp 2 0 2 100.00 100 1 1 2
token_mux_ctrl_redun_err_cp 2 0 2 100.00 100 1 1 2
token_mux_digest_err_cp 2 1 1 50.00 100 1 1 2
token_response_err_cp 2 0 2 100.00 100 1 1 2
transition_count_err_cp 2 0 2 100.00 100 1 1 2
transition_err_cp 2 0 2 100.00 100 1 1 2


Crosses for Group lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
post_trans_err_inj_xp 4 0 4 100.00 100 1 1 0
post_trans_state_err_xp 4 0 4 100.00 100 1 1 0
post_trans_lc_fsm_backdoor_err_xp 4 0 4 100.00 100 1 1 0
post_trans_state_illegal_err_xp 4 0 4 100.00 100 1 1 0
post_trans_count_err_xp 4 0 4 100.00 100 1 1 0
post_trans_count_illegal_err_xp 4 0 4 100.00 100 1 1 0
post_trans_count_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_clk_byp_error_rsp_xp 4 0 4 100.00 100 1 1 0
jtag_flash_rma_error_rsp_xp 4 0 4 100.00 100 1 1 0
jtag_otp_prog_err_xp 4 0 4 100.00 100 1 1 0
jtag_otp_partition_err_xp 4 0 4 100.00 100 1 1 0
jtag_token_mismatch_err_xp 4 0 4 100.00 100 1 1 0
jtag_state_err_xp 4 0 4 100.00 100 1 1 0
jtag_state_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_lc_fsm_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_kmac_fsm_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_count_err_xp 4 0 4 100.00 100 1 1 0
jtag_count_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_transition_err_xp 4 0 4 100.00 100 1 1 0
jtag_transition_count_err_xp 4 0 4 100.00 100 1 1 0
jtag_post_trans_err_xp 4 0 4 100.00 100 1 1 0


Summary for Variable clk_byp_error_rsp_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for clk_byp_error_rsp_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50543 1 T1 15 T2 18 T3 13
auto[1] 1757 1 T4 15 T5 94 T11 11


Summary for Variable clk_byp_rsp_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for clk_byp_rsp_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 51536 1 T1 15 T2 18 T3 13
auto[1] 764 1 T35 13 T36 12 T55 20


Summary for Variable count_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for count_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50551 1 T1 15 T2 18 T3 13
auto[1] 1749 1 T5 64 T11 19 T33 3


Summary for Variable count_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for count_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50550 1 T1 15 T2 18 T3 12
auto[1] 1750 1 T3 1 T10 1 T5 69


Summary for Variable count_illegal_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for count_illegal_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50624 1 T1 15 T2 18 T3 12
auto[1] 1676 1 T3 1 T5 61 T11 17


Summary for Variable err_inj_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for err_inj_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
err_inj 47468 1 T1 15 T2 18 T3 6
no_err_inj 4832 1 T3 7 T10 10 T5 194


Summary for Variable flash_rma_error_rsp_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for flash_rma_error_rsp_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50627 1 T1 15 T2 18 T3 13
auto[1] 1673 1 T4 12 T5 72 T11 8


Summary for Variable flash_rma_rsp_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for flash_rma_rsp_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 51552 1 T1 15 T2 18 T3 13
auto[1] 748 1 T35 12 T36 21 T55 20


Summary for Variable jtag_csr_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for jtag_csr_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 37184 1 T1 15 T3 13 T10 14
auto[1] 15116 1 T2 18 T4 92 T5 576


Summary for Variable kmac_fsm_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for kmac_fsm_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50558 1 T1 15 T2 18 T3 12
auto[1] 1742 1 T3 1 T10 1 T5 67


Summary for Variable lc_fsm_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for lc_fsm_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50539 1 T1 15 T2 18 T3 13
auto[1] 1761 1 T10 1 T5 56 T11 17


Summary for Variable otp_lc_data_i_valid_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_lc_data_i_valid_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50472 1 T1 15 T2 18 T3 12
auto[1] 1828 1 T3 1 T10 1 T5 66


Summary for Variable otp_partition_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_partition_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50539 1 T1 15 T2 18 T3 13
auto[1] 1761 1 T4 7 T5 86 T11 23


Summary for Variable otp_prog_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_prog_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 49855 1 T3 13 T10 14 T4 92
auto[1] 2445 1 T1 15 T2 18 T5 103


Summary for Variable otp_rma_token_valid_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_rma_token_valid_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 51567 1 T1 15 T2 18 T3 13
auto[1] 733 1 T35 15 T36 11 T55 11


Summary for Variable otp_secrets_valid_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_secrets_valid_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 51603 1 T1 15 T2 18 T3 13
auto[1] 697 1 T35 15 T36 11 T55 15


Summary for Variable otp_test_tokens_valid_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_test_tokens_valid_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 51547 1 T1 15 T2 18 T3 13
auto[1] 753 1 T35 18 T36 11 T55 14


Summary for Variable post_trans_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for post_trans_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 49772 1 T1 15 T2 18 T4 92
auto[1] 2528 1 T3 13 T10 14 T5 40


Summary for Variable security_escalation_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for security_escalation_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48440 1 T1 15 T2 18 T3 13
auto[1] 3860 1 T42 100 T16 97 T44 75


Summary for Variable state_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for state_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50581 1 T1 15 T2 18 T3 12
auto[1] 1719 1 T3 1 T5 59 T11 23


Summary for Variable state_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for state_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50500 1 T1 15 T2 18 T3 12
auto[1] 1800 1 T3 1 T5 51 T11 25


Summary for Variable state_illegal_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for state_illegal_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50513 1 T1 15 T2 18 T3 13
auto[1] 1787 1 T5 68 T11 21 T33 1


Summary for Variable token_invalid_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_invalid_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50537 1 T1 15 T2 18 T3 13
auto[1] 1763 1 T4 15 T5 87 T11 15


Summary for Variable token_mismatch_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_mismatch_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 46736 1 T1 15 T2 18 T3 13
auto[1] 5564 1 T4 10 T5 88 T11 12


Summary for Variable token_mux_ctrl_redun_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_mux_ctrl_redun_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48570 1 T1 15 T2 18 T3 13
auto[1] 3730 1 T13 78 T53 53 T54 86


Summary for Variable token_mux_digest_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for token_mux_digest_err_cp

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 52300 1 T1 15 T2 18 T3 13


Summary for Variable token_response_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_response_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50443 1 T1 15 T2 18 T3 13
auto[1] 1857 1 T4 7 T5 79 T11 16


Summary for Variable transition_count_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for transition_count_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50525 1 T1 15 T2 18 T3 13
auto[1] 1775 1 T4 14 T5 79 T11 10


Summary for Variable transition_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for transition_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50524 1 T1 15 T2 18 T3 13
auto[1] 1776 1 T4 12 T5 69 T11 11


Summary for Cross post_trans_err_inj_xp

Samples crossed: post_trans_err_cp err_inj_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_err_inj_xp

Bins
post_trans_err_cperr_inj_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] err_inj 46222 1 T1 15 T2 18 T4 92
auto[0] no_err_inj 3550 1 T5 172 T11 60 T32 3
auto[1] err_inj 1246 1 T3 6 T10 4 T5 18
auto[1] no_err_inj 1282 1 T3 7 T10 10 T5 22


Summary for Cross post_trans_state_err_xp

Samples crossed: post_trans_err_cp state_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_state_err_xp

Bins
post_trans_err_cpstate_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 48100 1 T1 15 T2 18 T4 92
auto[0] auto[1] 1672 1 T5 48 T11 19 T78 13
auto[1] auto[0] 2400 1 T3 12 T10 14 T5 37
auto[1] auto[1] 128 1 T3 1 T5 3 T11 6


Summary for Cross post_trans_lc_fsm_backdoor_err_xp

Samples crossed: post_trans_err_cp lc_fsm_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_lc_fsm_backdoor_err_xp

Bins
post_trans_err_cplc_fsm_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 48165 1 T1 15 T2 18 T4 92
auto[0] auto[1] 1607 1 T5 55 T11 12 T78 9
auto[1] auto[0] 2374 1 T3 13 T10 13 T5 39
auto[1] auto[1] 154 1 T10 1 T5 1 T11 5


Summary for Cross post_trans_state_illegal_err_xp

Samples crossed: post_trans_err_cp state_illegal_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_state_illegal_err_xp

Bins
post_trans_err_cpstate_illegal_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 48133 1 T1 15 T2 18 T4 92
auto[0] auto[1] 1639 1 T5 66 T11 14 T78 6
auto[1] auto[0] 2380 1 T3 13 T10 14 T5 38
auto[1] auto[1] 148 1 T5 2 T11 7 T33 1


Summary for Cross post_trans_count_err_xp

Samples crossed: post_trans_err_cp count_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_count_err_xp

Bins
post_trans_err_cpcount_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 48161 1 T1 15 T2 18 T4 92
auto[0] auto[1] 1611 1 T5 67 T11 19 T78 9
auto[1] auto[0] 2389 1 T3 12 T10 13 T5 38
auto[1] auto[1] 139 1 T3 1 T10 1 T5 2


Summary for Cross post_trans_count_illegal_err_xp

Samples crossed: post_trans_err_cp count_illegal_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_count_illegal_err_xp

Bins
post_trans_err_cpcount_illegal_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 48219 1 T1 15 T2 18 T4 92
auto[0] auto[1] 1553 1 T5 58 T11 12 T78 5
auto[1] auto[0] 2405 1 T3 12 T10 14 T5 37
auto[1] auto[1] 123 1 T3 1 T5 3 T11 5


Summary for Cross post_trans_count_backdoor_err_xp

Samples crossed: post_trans_err_cp count_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_count_backdoor_err_xp

Bins
post_trans_err_cpcount_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 48182 1 T1 15 T2 18 T4 92
auto[0] auto[1] 1590 1 T5 62 T11 16 T78 10
auto[1] auto[0] 2369 1 T3 13 T10 14 T5 38
auto[1] auto[1] 159 1 T5 2 T11 3 T33 3


Summary for Cross jtag_clk_byp_error_rsp_xp

Samples crossed: jtag_csr_cp clk_byp_error_rsp_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_clk_byp_error_rsp_xp

Bins
jtag_csr_cpclk_byp_error_rsp_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 36126 1 T1 15 T3 13 T10 14
auto[0] auto[1] 1058 1 T5 58 T11 8 T14 7
auto[1] auto[0] 14417 1 T2 18 T4 77 T5 540
auto[1] auto[1] 699 1 T4 15 T5 36 T11 3


Summary for Cross jtag_flash_rma_error_rsp_xp

Samples crossed: jtag_csr_cp flash_rma_error_rsp_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_flash_rma_error_rsp_xp

Bins
jtag_csr_cpflash_rma_error_rsp_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 36216 1 T1 15 T3 13 T10 14
auto[0] auto[1] 968 1 T5 46 T11 5 T14 7
auto[1] auto[0] 14411 1 T2 18 T4 80 T5 550
auto[1] auto[1] 705 1 T4 12 T5 26 T11 3


Summary for Cross jtag_otp_prog_err_xp

Samples crossed: jtag_csr_cp otp_prog_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_otp_prog_err_xp

Bins
jtag_csr_cpotp_prog_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 35840 1 T3 13 T10 14 T5 846
auto[0] auto[1] 1344 1 T1 15 T5 90 T11 33
auto[1] auto[0] 14015 1 T4 92 T5 563 T11 173
auto[1] auto[1] 1101 1 T2 18 T5 13 T11 27


Summary for Cross jtag_otp_partition_err_xp

Samples crossed: jtag_csr_cp otp_partition_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_otp_partition_err_xp

Bins
jtag_csr_cpotp_partition_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 36156 1 T1 15 T3 13 T10 14
auto[0] auto[1] 1028 1 T5 57 T11 18 T14 11
auto[1] auto[0] 14383 1 T2 18 T4 85 T5 547
auto[1] auto[1] 733 1 T4 7 T5 29 T11 5


Summary for Cross jtag_token_mismatch_err_xp

Samples crossed: jtag_csr_cp token_mismatch_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_token_mismatch_err_xp

Bins
jtag_csr_cptoken_mismatch_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 32374 1 T1 15 T3 13 T10 14
auto[0] auto[1] 4810 1 T5 55 T11 8 T12 75
auto[1] auto[0] 14362 1 T2 18 T4 82 T5 543
auto[1] auto[1] 754 1 T4 10 T5 33 T11 4


Summary for Cross jtag_state_err_xp

Samples crossed: jtag_csr_cp state_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_state_err_xp

Bins
jtag_csr_cpstate_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 36067 1 T1 15 T3 12 T10 14
auto[0] auto[1] 1117 1 T3 1 T5 29 T11 11
auto[1] auto[0] 14433 1 T2 18 T4 92 T5 554
auto[1] auto[1] 683 1 T5 22 T11 14 T17 1


Summary for Cross jtag_state_backdoor_err_xp

Samples crossed: jtag_csr_cp state_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_state_backdoor_err_xp

Bins
jtag_csr_cpstate_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 36108 1 T1 15 T3 12 T10 14
auto[0] auto[1] 1076 1 T3 1 T5 37 T11 12
auto[1] auto[0] 14473 1 T2 18 T4 92 T5 554
auto[1] auto[1] 643 1 T5 22 T11 11 T17 2


Summary for Cross jtag_lc_fsm_backdoor_err_xp

Samples crossed: jtag_csr_cp lc_fsm_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_lc_fsm_backdoor_err_xp

Bins
jtag_csr_cplc_fsm_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 36114 1 T1 15 T3 13 T10 13
auto[0] auto[1] 1070 1 T10 1 T5 32 T11 6
auto[1] auto[0] 14425 1 T2 18 T4 92 T5 552
auto[1] auto[1] 691 1 T5 24 T11 11 T15 17


Summary for Cross jtag_kmac_fsm_backdoor_err_xp

Samples crossed: jtag_csr_cp kmac_fsm_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_kmac_fsm_backdoor_err_xp

Bins
jtag_csr_cpkmac_fsm_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 36135 1 T1 15 T3 12 T10 13
auto[0] auto[1] 1049 1 T3 1 T10 1 T5 38
auto[1] auto[0] 14423 1 T2 18 T4 92 T5 547
auto[1] auto[1] 693 1 T5 29 T11 7 T15 13


Summary for Cross jtag_count_err_xp

Samples crossed: jtag_csr_cp count_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_count_err_xp

Bins
jtag_csr_cpcount_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 36133 1 T1 15 T3 12 T10 13
auto[0] auto[1] 1051 1 T3 1 T10 1 T5 42
auto[1] auto[0] 14417 1 T2 18 T4 92 T5 549
auto[1] auto[1] 699 1 T5 27 T11 13 T15 11


Summary for Cross jtag_count_backdoor_err_xp

Samples crossed: jtag_csr_cp count_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_count_backdoor_err_xp

Bins
jtag_csr_cpcount_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 36123 1 T1 15 T3 13 T10 14
auto[0] auto[1] 1061 1 T5 39 T11 11 T33 3
auto[1] auto[0] 14428 1 T2 18 T4 92 T5 551
auto[1] auto[1] 688 1 T5 25 T11 8 T15 15


Summary for Cross jtag_transition_err_xp

Samples crossed: jtag_csr_cp transition_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_transition_err_xp

Bins
jtag_csr_cptransition_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 36098 1 T1 15 T3 13 T10 14
auto[0] auto[1] 1086 1 T5 33 T11 9 T14 12
auto[1] auto[0] 14426 1 T2 18 T4 80 T5 540
auto[1] auto[1] 690 1 T4 12 T5 36 T11 2


Summary for Cross jtag_transition_count_err_xp

Samples crossed: jtag_csr_cp transition_count_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_transition_count_err_xp

Bins
jtag_csr_cptransition_count_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 36124 1 T1 15 T3 13 T10 14
auto[0] auto[1] 1060 1 T5 51 T11 10 T14 8
auto[1] auto[0] 14401 1 T2 18 T4 78 T5 548
auto[1] auto[1] 715 1 T4 14 T5 28 T15 24


Summary for Cross jtag_post_trans_err_xp

Samples crossed: jtag_csr_cp post_trans_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_post_trans_err_xp

Bins
jtag_csr_cppost_trans_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 35679 1 T1 15 T5 921 T11 211
auto[0] auto[1] 1505 1 T3 13 T10 14 T5 15
auto[1] auto[0] 14093 1 T2 18 T4 92 T5 551
auto[1] auto[1] 1023 1 T5 25 T11 55 T17 10

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